xref: /llvm-project/llvm/test/CodeGen/AMDGPU/extra-lds-size.ll (revision 5a556d55fb753d7e6e7a310a3fc0f7e83f8f9144)
1; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 < %s | FileCheck -check-prefix=GFX10-PAL %s
2; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 < %s | FileCheck -check-prefix=GFX10-MESA %s
3; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX11-PAL %s
4; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX11-MESA %s
5; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx950 < %s | FileCheck -check-prefix=GFX950-PAL %s
6; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx950 < %s | FileCheck -check-prefix=GFX950-MESA %s
7; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 < %s | FileCheck -check-prefix=GFX1200-PAL %s
8; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200 < %s | FileCheck -check-prefix=GFX1200-MESA %s
9
10; Check EXTRA_LDS_SIZE in SPI_SHADER_PGM_RSRC2_PS.
11
12; GFX10-PAL: '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x800
13
14; GFX10-MESA: .long 45100
15; GFX10-MESA-NEXT: .long 2048
16
17; GFX11-PAL: '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x400
18
19; GFX11-MESA: .long 45100
20; GFX11-MESA-NEXT: .long 1024
21
22; GFX950-PAL: '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x200
23
24; GFX950-MESA: .long 45100
25; GFX950-MESA-NEXT: .long 512
26
27; GFX1200-PAL: '0x2c0b (SPI_SHADER_PGM_RSRC2_PS)': 0x400
28
29; GFX1200-MESA: .long 45100
30; GFX1200-MESA-NEXT: .long 1024
31
32@lds = internal addrspace(3) global [4096 x i8] undef
33
34define amdgpu_ps void @global_store_saddr_uniform_ptr_in_vgprs(i32 %voffset) {
35  %ptr = getelementptr [4096 x i8], ptr addrspace(3) @lds, i32 0, i32 %voffset
36  store i8 0, ptr addrspace(3) %ptr
37  ret void
38}
39