1; RUN: llc -mtriple=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN %s 2; RUN: llc -mtriple=amdgcn -mcpu=gfx906 -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN_DL %s 3; RUN: llc -mtriple=amdgcn -enable-new-pm -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN %s 4; RUN: llc -mtriple=amdgcn -mcpu=gfx906 -enable-new-pm -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN_DL %s 5 6; GCN-LABEL: name: uniform_xnor_i64 7; GCN: S_XNOR_B64 8define amdgpu_kernel void @uniform_xnor_i64(ptr addrspace(1) %out, i64 %a, i64 %b) { 9 %xor = xor i64 %a, %b 10 %res = xor i64 %xor, -1 11 store i64 %res, ptr addrspace(1) %out 12 ret void 13} 14; GCN-LABEL: name: divergent_xnor_i64 15; GCN: V_XOR_B32_e64 16; GCN: V_XOR_B32_e64 17; GCN: V_NOT_B32_e32 18; GCN: V_NOT_B32_e32 19; GCN_DL: V_XNOR_B32_e64 20; GCN_DL: V_XNOR_B32_e64 21define i64 @divergent_xnor_i64(ptr addrspace(1) %out, i64 %a, i64 %b) { 22 %xor = xor i64 %a, %b 23 %res = xor i64 %xor, -1 24 ret i64 %res 25} 26 27; GCN-LABEL: name: uniform_xnor_i32 28; GCN: S_XNOR_B32 29define amdgpu_kernel void @uniform_xnor_i32(ptr addrspace(1) %out, i32 %a, i32 %b) { 30 %xor = xor i32 %a, %b 31 %res = xor i32 %xor, -1 32 store i32 %res, ptr addrspace(1) %out 33 ret void 34} 35 36; GCN-LABEL: name: divergent_xnor_i32 37; GCN: V_XOR_B32_e64 38; GCN: V_NOT_B32_e32 39; GCN_DL: V_XNOR_B32_e64 40define i32 @divergent_xnor_i32(ptr addrspace(1) %out, i32 %a, i32 %b) { 41 %xor = xor i32 %a, %b 42 %res = xor i32 %xor, -1 43 ret i32 %res 44} 45 46declare i32 @llvm.amdgcn.workitem.id.x() #0 47