xref: /llvm-project/llvm/test/CodeGen/AMDGPU/divergence-driven-not-isel.ll (revision 7652a59407018c057cdc1163c9f64b5b6f0954eb)
1; RUN: llc -mtriple=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN %s
2; RUN: llc -mtriple=amdgcn -enable-new-pm -stop-after=amdgpu-isel < %s | FileCheck -check-prefix=GCN %s
3
4; GCN-LABEL: name:            scalar_not_i32
5; GCN: S_NOT_B32
6define amdgpu_kernel void @scalar_not_i32(ptr addrspace(1) %out, i32 %val) {
7  %not.val = xor i32 %val, -1
8  store i32 %not.val, ptr addrspace(1) %out
9  ret void
10}
11
12; GCN-LABEL: name:            scalar_not_i64
13; GCN: S_NOT_B64
14define amdgpu_kernel void @scalar_not_i64(ptr addrspace(1) %out, i64 %val) {
15  %not.val = xor i64 %val, -1
16  store i64 %not.val, ptr addrspace(1) %out
17  ret void
18}
19
20; GCN-LABEL: name:            vector_not_i32
21; GCN: V_NOT_B32_e32
22define i32 @vector_not_i32(i32 %val) {
23  %not.val = xor i32 %val, -1
24  ret i32 %not.val
25}
26
27; GCN-LABEL: name:            vector_not_i64
28; GCN: V_NOT_B32_e32
29; GCN: V_NOT_B32_e32
30define i64 @vector_not_i64(i64 %val) {
31  %not.val = xor i64 %val, -1
32  ret i64 %not.val
33}
34
35
36