xref: /llvm-project/llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll (revision 0b0d9a3bee47e9de05e869be306284fa66533f63) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s
3
4; Test that we use SimplifyDemandedBits on copysign's sign
5; operand. These are somewhat simplified extractions from fast pown
6; expansions.
7
8define half @test_pown_reduced_fast_f16_known_odd(half %x, i32 %y.arg) #0 {
9; GFX9-LABEL: test_pown_reduced_fast_f16_known_odd:
10; GFX9:       ; %bb.0:
11; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12; GFX9-NEXT:    v_or_b32_e32 v1, 1, v1
13; GFX9-NEXT:    v_cvt_f32_i32_e32 v1, v1
14; GFX9-NEXT:    s_movk_i32 s4, 0x7fff
15; GFX9-NEXT:    v_cvt_f16_f32_e32 v1, v1
16; GFX9-NEXT:    v_mul_f16_e64 v1, |v0|, v1
17; GFX9-NEXT:    v_bfi_b32 v0, s4, v1, v0
18; GFX9-NEXT:    s_setpc_b64 s[30:31]
19  %y = or i32 %y.arg, 1
20  %fabs = call half @llvm.fabs.f16(half %x)
21  %pownI2F = sitofp i32 %y to half
22  %ylogx = fmul half %fabs, %pownI2F
23  %cast_x = bitcast half %x to i16
24  %pow_sign = and i16 %cast_x, -32768
25  %cast_sign = bitcast i16 %pow_sign to half
26  %pow_sign1 = call half @llvm.copysign.f16(half %ylogx, half %cast_sign)
27  ret half %pow_sign1
28}
29
30define <2 x half> @test_pown_reduced_fast_v2f16_known_odd(<2 x half> %x, <2 x i32> %y.arg) #0 {
31; GFX9-LABEL: test_pown_reduced_fast_v2f16_known_odd:
32; GFX9:       ; %bb.0:
33; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
34; GFX9-NEXT:    v_or_b32_e32 v1, 1, v1
35; GFX9-NEXT:    v_or_b32_e32 v2, 1, v2
36; GFX9-NEXT:    v_cvt_f32_i32_e32 v2, v2
37; GFX9-NEXT:    v_cvt_f32_i32_e32 v1, v1
38; GFX9-NEXT:    v_and_b32_e32 v3, 0x7fff7fff, v0
39; GFX9-NEXT:    s_movk_i32 s4, 0x7fff
40; GFX9-NEXT:    v_cvt_f16_f32_e32 v2, v2
41; GFX9-NEXT:    v_cvt_f16_f32_e32 v1, v1
42; GFX9-NEXT:    v_pack_b32_f16 v1, v1, v2
43; GFX9-NEXT:    v_pk_mul_f16 v1, v3, v1
44; GFX9-NEXT:    v_bfi_b32 v2, s4, v1, v0
45; GFX9-NEXT:    v_lshrrev_b32_e32 v1, 16, v1
46; GFX9-NEXT:    v_lshrrev_b32_e32 v0, 16, v0
47; GFX9-NEXT:    v_bfi_b32 v0, s4, v1, v0
48; GFX9-NEXT:    s_mov_b32 s4, 0x5040100
49; GFX9-NEXT:    v_perm_b32 v0, v0, v2, s4
50; GFX9-NEXT:    s_setpc_b64 s[30:31]
51  %y = or <2 x i32> %y.arg, <i32 1, i32 1>
52  %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)
53  %pownI2F = sitofp <2 x i32> %y to <2 x half>
54  %ylogx = fmul <2 x half> %fabs, %pownI2F
55  %cast_x = bitcast <2 x half> %x to <2 x i16>
56  %pow_sign = and <2 x i16> %cast_x, <i16 -32768, i16 -32768>
57  %cast_sign = bitcast <2 x i16> %pow_sign to <2 x half>
58  %pow_sign1 = call <2 x half> @llvm.copysign.v2f16(<2 x half> %ylogx, <2 x half> %cast_sign)
59  ret <2 x half> %pow_sign1
60}
61
62define float @test_pown_reduced_fast_f32_known_odd(float %x, i32 %y.arg) #0 {
63; GFX9-LABEL: test_pown_reduced_fast_f32_known_odd:
64; GFX9:       ; %bb.0:
65; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
66; GFX9-NEXT:    v_or_b32_e32 v1, 1, v1
67; GFX9-NEXT:    v_cvt_f32_i32_e32 v1, v1
68; GFX9-NEXT:    s_brev_b32 s4, -2
69; GFX9-NEXT:    v_mul_f32_e64 v1, |v0|, v1
70; GFX9-NEXT:    v_bfi_b32 v0, s4, v1, v0
71; GFX9-NEXT:    s_setpc_b64 s[30:31]
72  %y = or i32 %y.arg, 1
73  %fabs = call float @llvm.fabs.f32(float %x)
74  %pownI2F = sitofp i32 %y to float
75  %ylogx = fmul float %fabs, %pownI2F
76  %cast_x = bitcast float %x to i32
77  %pow_sign = and i32 %cast_x, -2147483648
78  %cast_sign = bitcast i32 %pow_sign to float
79  %pow_sign1 = call float @llvm.copysign.f32(float %ylogx, float %cast_sign)
80  ret float %pow_sign1
81}
82
83define <2 x float> @test_pown_reduced_fast_v2f32_known_odd(<2 x float> %x, <2 x i32> %y.arg) #0 {
84; GFX9-LABEL: test_pown_reduced_fast_v2f32_known_odd:
85; GFX9:       ; %bb.0:
86; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
87; GFX9-NEXT:    v_or_b32_e32 v3, 1, v3
88; GFX9-NEXT:    v_or_b32_e32 v2, 1, v2
89; GFX9-NEXT:    v_cvt_f32_i32_e32 v3, v3
90; GFX9-NEXT:    v_cvt_f32_i32_e32 v2, v2
91; GFX9-NEXT:    s_brev_b32 s4, -2
92; GFX9-NEXT:    v_mul_f32_e64 v3, |v1|, v3
93; GFX9-NEXT:    v_mul_f32_e64 v2, |v0|, v2
94; GFX9-NEXT:    v_bfi_b32 v0, s4, v2, v0
95; GFX9-NEXT:    v_bfi_b32 v1, s4, v3, v1
96; GFX9-NEXT:    s_setpc_b64 s[30:31]
97  %y = or <2 x i32> %y.arg, <i32 1, i32 1>
98  %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %x)
99  %pownI2F = sitofp <2 x i32> %y to <2 x float>
100  %ylogx = fmul <2 x float> %fabs, %pownI2F
101  %cast_x = bitcast <2 x float> %x to <2 x i32>
102  %pow_sign = and <2 x i32> %cast_x, <i32 -2147483648, i32 -2147483648>
103  %cast_sign = bitcast <2 x i32> %pow_sign to <2 x float>
104  %pow_sign1 = call <2 x float> @llvm.copysign.v2f32(<2 x float> %ylogx, <2 x float> %cast_sign)
105  ret <2 x float> %pow_sign1
106}
107
108define double @test_pown_reduced_fast_f64_known_odd(double %x, i32 %y.arg) #0 {
109; GFX9-LABEL: test_pown_reduced_fast_f64_known_odd:
110; GFX9:       ; %bb.0:
111; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
112; GFX9-NEXT:    v_or_b32_e32 v2, 1, v2
113; GFX9-NEXT:    v_cvt_f64_i32_e32 v[2:3], v2
114; GFX9-NEXT:    s_brev_b32 s4, -2
115; GFX9-NEXT:    v_mul_f64 v[2:3], |v[0:1]|, v[2:3]
116; GFX9-NEXT:    v_bfi_b32 v1, s4, v3, v1
117; GFX9-NEXT:    v_mov_b32_e32 v0, v2
118; GFX9-NEXT:    s_setpc_b64 s[30:31]
119  %y = or i32 %y.arg, 1
120  %fabs = call double @llvm.fabs.f64(double %x)
121  %pownI2F = sitofp i32 %y to double
122  %ylogx = fmul double %fabs, %pownI2F
123  %cast_x = bitcast double %x to i64
124  %pow_sign = and i64 %cast_x, -9223372036854775808
125  %cast_sign = bitcast i64 %pow_sign to double
126  %pow_sign1 = call double @llvm.copysign.f64(double %ylogx, double %cast_sign)
127  ret double %pow_sign1
128}
129
130define <2 x double> @test_pown_reduced_fast_v2f64_known_odd(<2 x double> %x, <2 x i32> %y.arg) #0 {
131; GFX9-LABEL: test_pown_reduced_fast_v2f64_known_odd:
132; GFX9:       ; %bb.0:
133; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
134; GFX9-NEXT:    v_or_b32_e32 v6, 1, v5
135; GFX9-NEXT:    v_or_b32_e32 v4, 1, v4
136; GFX9-NEXT:    v_cvt_f64_i32_e32 v[4:5], v4
137; GFX9-NEXT:    v_cvt_f64_i32_e32 v[6:7], v6
138; GFX9-NEXT:    s_brev_b32 s4, -2
139; GFX9-NEXT:    v_mul_f64 v[4:5], |v[0:1]|, v[4:5]
140; GFX9-NEXT:    v_mul_f64 v[6:7], |v[2:3]|, v[6:7]
141; GFX9-NEXT:    v_bfi_b32 v1, s4, v5, v1
142; GFX9-NEXT:    v_bfi_b32 v3, s4, v7, v3
143; GFX9-NEXT:    v_mov_b32_e32 v0, v4
144; GFX9-NEXT:    v_mov_b32_e32 v2, v6
145; GFX9-NEXT:    s_setpc_b64 s[30:31]
146  %y = or <2 x i32> %y.arg, <i32 1, i32 1>
147  %fabs = call <2 x double> @llvm.fabs.v2f64(<2 x double> %x)
148  %pownI2F = sitofp <2 x i32> %y to <2 x double>
149  %ylogx = fmul <2 x double> %fabs, %pownI2F
150  %cast_x = bitcast <2 x double> %x to <2 x i64>
151  %pow_sign = and <2 x i64> %cast_x, <i64 -9223372036854775808, i64 -9223372036854775808>
152  %cast_sign = bitcast <2 x i64> %pow_sign to <2 x double>
153  %pow_sign1 = call <2 x double> @llvm.copysign.f64(<2 x double> %ylogx, <2 x double> %cast_sign)
154  ret <2 x double> %pow_sign1
155}
156
157define float @copysign_f32_f32_sign_known_p0_or_n0(float %x, i32 %y.i) {
158; GFX9-LABEL: copysign_f32_f32_sign_known_p0_or_n0:
159; GFX9:       ; %bb.0:
160; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
161; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 31, v1
162; GFX9-NEXT:    s_brev_b32 s4, -2
163; GFX9-NEXT:    v_bfi_b32 v0, s4, v0, v1
164; GFX9-NEXT:    s_setpc_b64 s[30:31]
165  %y.even = shl i32 %y.i, 31
166  %y.even.as.f32 = bitcast i32 %y.even to float
167  %copysign = call float @llvm.copysign.f32(float %x, float %y.even.as.f32)
168  ret float %copysign
169}
170
171define double @copysign_f64_f32_sign_known_p0_or_n0(double %x, i32 %y.i) {
172; GFX9-LABEL: copysign_f64_f32_sign_known_p0_or_n0:
173; GFX9:       ; %bb.0:
174; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
175; GFX9-NEXT:    v_lshlrev_b32_e32 v2, 31, v2
176; GFX9-NEXT:    s_brev_b32 s4, -2
177; GFX9-NEXT:    v_bfi_b32 v1, s4, v1, v2
178; GFX9-NEXT:    s_setpc_b64 s[30:31]
179  %y.even = shl i32 %y.i, 31
180  %y.even.as.f32 = bitcast i32 %y.even to float
181  %y.even.as.f32.fpext = fpext float %y.even.as.f32 to double
182  %copysign = call double @llvm.copysign.f64(double %x, double %y.even.as.f32.fpext)
183  ret double %copysign
184}
185
186define half @copysign_f16_f32_sign_known_p0_or_n0(half %x, i32 %y.i) {
187; GFX9-LABEL: copysign_f16_f32_sign_known_p0_or_n0:
188; GFX9:       ; %bb.0:
189; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
190; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 31, v1
191; GFX9-NEXT:    v_lshrrev_b32_e32 v1, 16, v1
192; GFX9-NEXT:    s_movk_i32 s4, 0x7fff
193; GFX9-NEXT:    v_bfi_b32 v0, s4, v0, v1
194; GFX9-NEXT:    s_setpc_b64 s[30:31]
195  %y.even = shl i32 %y.i, 31
196  %y.even.as.f32 = bitcast i32 %y.even to float
197  %y.even.as.f32.fptrunc = fptrunc float %y.even.as.f32 to half
198  %copysign = call half @llvm.copysign.f16(half %x, half %y.even.as.f32.fptrunc)
199  ret half %copysign
200}
201
202define float @copysign_f32_f32_sign_known_p0_or_n0__mag_known_positive_fabs(float %x.arg, i32 %y.i) {
203; GFX9-LABEL: copysign_f32_f32_sign_known_p0_or_n0__mag_known_positive_fabs:
204; GFX9:       ; %bb.0:
205; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
206; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 31, v1
207; GFX9-NEXT:    s_brev_b32 s4, -2
208; GFX9-NEXT:    v_bfi_b32 v0, s4, v0, v1
209; GFX9-NEXT:    s_setpc_b64 s[30:31]
210  %x = call float @llvm.fabs.f32(float %x.arg)
211  %y.even = shl i32 %y.i, 31
212  %y.even.as.f32 = bitcast i32 %y.even to float
213  %copysign = call float @llvm.copysign.f32(float %x, float %y.even.as.f32)
214  ret float %copysign
215}
216
217define float @copysign_f32_f32_sign_known_p0_or_n0__mag_known_positive_select(float %x.arg, i32 %y.i) {
218; GFX9-LABEL: copysign_f32_f32_sign_known_p0_or_n0__mag_known_positive_select:
219; GFX9:       ; %bb.0:
220; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
221; GFX9-NEXT:    v_cmp_lt_f32_e32 vcc, 0, v0
222; GFX9-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
223; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 31, v1
224; GFX9-NEXT:    s_brev_b32 s4, -2
225; GFX9-NEXT:    v_bfi_b32 v0, s4, v0, v1
226; GFX9-NEXT:    s_setpc_b64 s[30:31]
227  %x.ule.0 = fcmp ule float %x.arg, 0.0
228  %x = select i1 %x.ule.0, float 0.0, float %x.arg
229  %y.even = shl i32 %y.i, 31
230  %y.even.as.f32 = bitcast i32 %y.even to float
231  %copysign = call float @llvm.copysign.f32(float %x, float %y.even.as.f32)
232  ret float %copysign
233}
234
235define float @copysign_f32_f32_sign_known_p0_or_n0__mag_known_positive_nnan_nsz_sqrt(float %x.arg, i32 %y.i) {
236; GFX9-LABEL: copysign_f32_f32_sign_known_p0_or_n0__mag_known_positive_nnan_nsz_sqrt:
237; GFX9:       ; %bb.0:
238; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
239; GFX9-NEXT:    s_mov_b32 s4, 0xf800000
240; GFX9-NEXT:    v_mul_f32_e32 v2, 0x4f800000, v0
241; GFX9-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
242; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
243; GFX9-NEXT:    v_sqrt_f32_e32 v2, v0
244; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 31, v1
245; GFX9-NEXT:    v_add_u32_e32 v3, -1, v2
246; GFX9-NEXT:    v_fma_f32 v4, -v3, v2, v0
247; GFX9-NEXT:    v_cmp_ge_f32_e64 s[4:5], 0, v4
248; GFX9-NEXT:    v_add_u32_e32 v4, 1, v2
249; GFX9-NEXT:    v_cndmask_b32_e64 v3, v2, v3, s[4:5]
250; GFX9-NEXT:    v_fma_f32 v2, -v4, v2, v0
251; GFX9-NEXT:    v_cmp_lt_f32_e64 s[4:5], 0, v2
252; GFX9-NEXT:    v_cndmask_b32_e64 v2, v3, v4, s[4:5]
253; GFX9-NEXT:    v_mul_f32_e32 v3, 0x37800000, v2
254; GFX9-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc
255; GFX9-NEXT:    v_mov_b32_e32 v3, 0x260
256; GFX9-NEXT:    v_cmp_class_f32_e32 vcc, v0, v3
257; GFX9-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc
258; GFX9-NEXT:    s_brev_b32 s4, -2
259; GFX9-NEXT:    v_bfi_b32 v0, s4, v0, v1
260; GFX9-NEXT:    s_setpc_b64 s[30:31]
261  %x = call nnan nsz float @llvm.sqrt.f32(float %x.arg)
262  %y.even = shl i32 %y.i, 31
263  %y.even.as.f32 = bitcast i32 %y.even to float
264  %copysign = call float @llvm.copysign.f32(float %x, float %y.even.as.f32)
265  ret float %copysign
266}
267
268define float @copysign_f32_f32_sign_known_p0_or_n0__mag_almost_positive_nsz_sqrt(float %x.arg, i32 %y.i) {
269; GFX9-LABEL: copysign_f32_f32_sign_known_p0_or_n0__mag_almost_positive_nsz_sqrt:
270; GFX9:       ; %bb.0:
271; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
272; GFX9-NEXT:    s_mov_b32 s4, 0xf800000
273; GFX9-NEXT:    v_mul_f32_e32 v2, 0x4f800000, v0
274; GFX9-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
275; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
276; GFX9-NEXT:    v_sqrt_f32_e32 v2, v0
277; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 31, v1
278; GFX9-NEXT:    v_add_u32_e32 v3, -1, v2
279; GFX9-NEXT:    v_fma_f32 v4, -v3, v2, v0
280; GFX9-NEXT:    v_cmp_ge_f32_e64 s[4:5], 0, v4
281; GFX9-NEXT:    v_add_u32_e32 v4, 1, v2
282; GFX9-NEXT:    v_cndmask_b32_e64 v3, v2, v3, s[4:5]
283; GFX9-NEXT:    v_fma_f32 v2, -v4, v2, v0
284; GFX9-NEXT:    v_cmp_lt_f32_e64 s[4:5], 0, v2
285; GFX9-NEXT:    v_cndmask_b32_e64 v2, v3, v4, s[4:5]
286; GFX9-NEXT:    v_mul_f32_e32 v3, 0x37800000, v2
287; GFX9-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc
288; GFX9-NEXT:    v_mov_b32_e32 v3, 0x260
289; GFX9-NEXT:    v_cmp_class_f32_e32 vcc, v0, v3
290; GFX9-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc
291; GFX9-NEXT:    s_brev_b32 s4, -2
292; GFX9-NEXT:    v_bfi_b32 v0, s4, v0, v1
293; GFX9-NEXT:    s_setpc_b64 s[30:31]
294  %x = call nsz float @llvm.sqrt.f32(float %x.arg)
295  %y.even = shl i32 %y.i, 31
296  %y.even.as.f32 = bitcast i32 %y.even to float
297  %copysign = call float @llvm.copysign.f32(float %x, float %y.even.as.f32)
298  ret float %copysign
299}
300
301define float @copysign_f32_f32_sign_known_p0_or_n0__mag_almost_positive_nnan_sqrt(float %x.arg, i32 %y.i) {
302; GFX9-LABEL: copysign_f32_f32_sign_known_p0_or_n0__mag_almost_positive_nnan_sqrt:
303; GFX9:       ; %bb.0:
304; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
305; GFX9-NEXT:    s_mov_b32 s4, 0xf800000
306; GFX9-NEXT:    v_mul_f32_e32 v2, 0x4f800000, v0
307; GFX9-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
308; GFX9-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
309; GFX9-NEXT:    v_sqrt_f32_e32 v2, v0
310; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 31, v1
311; GFX9-NEXT:    v_add_u32_e32 v3, -1, v2
312; GFX9-NEXT:    v_fma_f32 v4, -v3, v2, v0
313; GFX9-NEXT:    v_cmp_ge_f32_e64 s[4:5], 0, v4
314; GFX9-NEXT:    v_add_u32_e32 v4, 1, v2
315; GFX9-NEXT:    v_cndmask_b32_e64 v3, v2, v3, s[4:5]
316; GFX9-NEXT:    v_fma_f32 v2, -v4, v2, v0
317; GFX9-NEXT:    v_cmp_lt_f32_e64 s[4:5], 0, v2
318; GFX9-NEXT:    v_cndmask_b32_e64 v2, v3, v4, s[4:5]
319; GFX9-NEXT:    v_mul_f32_e32 v3, 0x37800000, v2
320; GFX9-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc
321; GFX9-NEXT:    v_mov_b32_e32 v3, 0x260
322; GFX9-NEXT:    v_cmp_class_f32_e32 vcc, v0, v3
323; GFX9-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc
324; GFX9-NEXT:    s_brev_b32 s4, -2
325; GFX9-NEXT:    v_bfi_b32 v0, s4, v0, v1
326; GFX9-NEXT:    s_setpc_b64 s[30:31]
327  %x = call nnan float @llvm.sqrt.f32(float %x.arg)
328  %y.even = shl i32 %y.i, 31
329  %y.even.as.f32 = bitcast i32 %y.even to float
330  %copysign = call float @llvm.copysign.f32(float %x, float %y.even.as.f32)
331  ret float %copysign
332}
333
334define float @test_copysign_pow_fast_f32__integral_y(float %x, i32 %y.i) {
335; GFX9-LABEL: test_copysign_pow_fast_f32__integral_y:
336; GFX9:       ; %bb.0:
337; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
338; GFX9-NEXT:    s_mov_b32 s4, 0x800000
339; GFX9-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s4
340; GFX9-NEXT:    v_cndmask_b32_e64 v3, 0, 1, vcc
341; GFX9-NEXT:    v_lshlrev_b32_e32 v3, 5, v3
342; GFX9-NEXT:    v_ldexp_f32 v3, |v0|, v3
343; GFX9-NEXT:    v_log_f32_e32 v3, v3
344; GFX9-NEXT:    v_cvt_f32_i32_e32 v1, v1
345; GFX9-NEXT:    v_mov_b32_e32 v2, 0x42000000
346; GFX9-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
347; GFX9-NEXT:    v_sub_f32_e32 v2, v3, v2
348; GFX9-NEXT:    v_mul_f32_e32 v3, v2, v1
349; GFX9-NEXT:    s_mov_b32 s4, 0xc2fc0000
350; GFX9-NEXT:    v_mov_b32_e32 v4, 0x42800000
351; GFX9-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v3
352; GFX9-NEXT:    v_cndmask_b32_e32 v3, 0, v4, vcc
353; GFX9-NEXT:    v_fma_f32 v2, v2, v1, v3
354; GFX9-NEXT:    v_cvt_i32_f32_e32 v1, v1
355; GFX9-NEXT:    v_exp_f32_e32 v2, v2
356; GFX9-NEXT:    v_not_b32_e32 v3, 63
357; GFX9-NEXT:    v_cndmask_b32_e32 v3, 0, v3, vcc
358; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 31, v1
359; GFX9-NEXT:    v_ldexp_f32 v2, v2, v3
360; GFX9-NEXT:    v_and_b32_e32 v0, v1, v0
361; GFX9-NEXT:    s_brev_b32 s4, -2
362; GFX9-NEXT:    v_bfi_b32 v0, s4, v2, v0
363; GFX9-NEXT:    s_setpc_b64 s[30:31]
364  %y = sitofp i32 %y.i to float
365  %y.fptosi = fptosi float %y to i32
366  %fabs = call fast float @llvm.fabs.f32(float %x)
367  %log2 = call fast float @llvm.log2.f32(float %fabs)
368  %pownI2F = sitofp i32 %y.i to float
369  %ylogx = fmul fast float %log2, %pownI2F
370  %exp2 = call fast float @llvm.exp2.f32(float %ylogx)
371  %yeven = shl i32 %y.fptosi, 31
372  %x.i32 = bitcast float %x to i32
373  %pow_sign = and i32 %yeven, %x.i32
374  %pow_sign.f32 = bitcast i32 %pow_sign to float
375  %pow_sign1 = call fast float @llvm.copysign.f32(float %exp2, float %pow_sign.f32)
376  ret float %pow_sign1
377}
378
379attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
380