1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 3 4define amdgpu_kernel void @copy_to_scc(ptr addrspace(1) %out, ptr addrspace(1) %in, ptr addrspace(4) %addrSrc) { 5; GCN-LABEL: copy_to_scc: 6; GCN: ; %bb.0: ; %entry 7; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34 8; GCN-NEXT: v_mov_b32_e32 v1, 0 9; GCN-NEXT: s_waitcnt lgkmcnt(0) 10; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x0 11; GCN-NEXT: s_waitcnt lgkmcnt(0) 12; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 offset:252 13; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 14; GCN-NEXT: s_waitcnt vmcnt(0) 15; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 16; GCN-NEXT: s_waitcnt lgkmcnt(0) 17; GCN-NEXT: s_load_dword s2, s[2:3], 0x0 18; GCN-NEXT: s_waitcnt lgkmcnt(0) 19; GCN-NEXT: s_cmp_lg_u32 s2, 0 20; GCN-NEXT: s_cselect_b64 s[2:3], -1, 0 21; GCN-NEXT: s_xor_b64 s[2:3], s[2:3], vcc 22; GCN-NEXT: s_and_b64 s[2:3], s[2:3], exec 23; GCN-NEXT: s_cselect_b32 s2, 2, 3 24; GCN-NEXT: v_mov_b32_e32 v0, s2 25; GCN-NEXT: global_store_dword v1, v0, s[0:1] 26; GCN-NEXT: s_endpgm 27entry: ; preds = %1009 28 %0 = load i32, ptr addrspace(1) %in, align 4 29 %1 = load ptr addrspace(8), ptr addrspace(4) %addrSrc, align 16 30 %2 = icmp ne i32 %0, 0 31 %3 = call i32 @llvm.amdgcn.raw.ptr.buffer.load.i32(ptr addrspace(8) %1, i32 252, i32 0, i32 0) 32 %4 = icmp ne i32 %3, 0 33 %5 = xor i1 %2, %4 34 %result = select i1 %5, i32 2, i32 3 35 store i32 %result, ptr addrspace(1) %out 36 ret void 37} 38 39declare i32 @llvm.amdgcn.raw.ptr.buffer.load.i32(ptr addrspace(8), i32, i32, i32 immarg) 40