xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/v_bfe_i32.ll (revision f2c164c8150548d983565c4ddc0fde790f9e2a5b)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=amdgcn-amd-amdhsa --global-isel -verify-machineinstrs < %s | FileCheck --check-prefix=PREGFX9 %s
3; RUN: llc -mtriple=amdgcn-amd-amdhsa --global-isel -mcpu=hawaii -verify-machineinstrs < %s | FileCheck --check-prefix=PREGFX9 %s
4; RUN: llc -mtriple=amdgcn-amd-amdhsa --global-isel -mcpu=fiji -verify-machineinstrs < %s | FileCheck --check-prefix=PREGFX9 %s
5; RUN: llc -mtriple=amdgcn-amd-amdhsa --global-isel -mcpu=gfx90a -verify-machineinstrs < %s | FileCheck --check-prefix=PREGFX9 %s
6; RUN: llc -mtriple=amdgcn-amd-amdhsa --global-isel -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck --check-prefix=GFX10PLUS %s
7; RUN: llc -mtriple=amdgcn-amd-amdhsa --global-isel -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck --check-prefix=GFX10PLUS %s
8
9define i32 @check_v_bfe(i16 %a) {
10; PREGFX9-LABEL: check_v_bfe:
11; PREGFX9:       ; %bb.0: ; %entry
12; PREGFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
13; PREGFX9-NEXT:    v_bfe_i32 v0, v0, 0, 16
14; PREGFX9-NEXT:    s_setpc_b64 s[30:31]
15;
16; GFX10PLUS-LABEL: check_v_bfe:
17; GFX10PLUS:       ; %bb.0: ; %entry
18; GFX10PLUS-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
19; GFX10PLUS-NEXT:    v_bfe_i32 v0, v0, 0, 16
20; GFX10PLUS-NEXT:    s_setpc_b64 s[30:31]
21entry:
22  %res = sext i16 %a to i32
23  ret i32 %res
24}
25