xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-salu-float.mir (revision 9e9907f1cfa424366fba58d9520f9305b537cec9) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck --check-prefixes=GFX1150 %s
3# RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck --check-prefixes=GFX1150 %s
4
5---
6name:            fadd_f32
7legalized:       true
8body:             |
9  bb.0:
10    liveins: $sgpr0, $sgpr1
11
12    ; GFX1150-LABEL: name: fadd_f32
13    ; GFX1150: liveins: $sgpr0, $sgpr1
14    ; GFX1150-NEXT: {{  $}}
15    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
16    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
17    ; GFX1150-NEXT: [[FADD:%[0-9]+]]:sgpr(s32) = G_FADD [[COPY]], [[COPY1]]
18    %0:_(s32) = COPY $sgpr0
19    %1:_(s32) = COPY $sgpr1
20    %2:_(s32) = G_FADD %0, %1
21...
22
23---
24name:            fptosi_f32_to_i32
25legalized:       true
26body:             |
27  bb.0:
28    liveins: $sgpr0
29
30    ; GFX1150-LABEL: name: fptosi_f32_to_i32
31    ; GFX1150: liveins: $sgpr0
32    ; GFX1150-NEXT: {{  $}}
33    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
34    ; GFX1150-NEXT: [[FPTOSI:%[0-9]+]]:sgpr(s32) = G_FPTOSI [[COPY]](s32)
35    %0:_(s32) = COPY $sgpr0
36    %1:_(s32) = G_FPTOSI %0(s32)
37...
38
39---
40name:            fptoui_f32_to_u32
41legalized:       true
42body:             |
43  bb.0:
44    liveins: $sgpr0
45
46    ; GFX1150-LABEL: name: fptoui_f32_to_u32
47    ; GFX1150: liveins: $sgpr0
48    ; GFX1150-NEXT: {{  $}}
49    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
50    ; GFX1150-NEXT: [[FPTOUI:%[0-9]+]]:sgpr(s32) = G_FPTOUI [[COPY]](s32)
51    %0:_(s32) = COPY $sgpr0
52    %1:_(s32) = G_FPTOUI %0(s32)
53...
54
55---
56name:            sitofp_i32_to_f32
57legalized:       true
58body:             |
59  bb.0:
60    liveins: $sgpr0
61
62    ; GFX1150-LABEL: name: sitofp_i32_to_f32
63    ; GFX1150: liveins: $sgpr0
64    ; GFX1150-NEXT: {{  $}}
65    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
66    ; GFX1150-NEXT: [[SITOFP:%[0-9]+]]:sgpr(s32) = G_SITOFP [[COPY]](s32)
67    %0:_(s32) = COPY $sgpr0
68    %1:_(s32) = G_SITOFP %0(s32)
69...
70
71---
72name:            uitofp_u32_to_f32
73legalized:       true
74body:             |
75  bb.0:
76    liveins: $sgpr0
77
78    ; GFX1150-LABEL: name: uitofp_u32_to_f32
79    ; GFX1150: liveins: $sgpr0
80    ; GFX1150-NEXT: {{  $}}
81    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
82    ; GFX1150-NEXT: [[UITOFP:%[0-9]+]]:sgpr(s32) = G_UITOFP [[COPY]](s32)
83    %0:_(s32) = COPY $sgpr0
84    %1:_(s32) = G_UITOFP %0(s32)
85...
86
87---
88name:            fptrunc_f32_to_f16
89legalized:       true
90body:             |
91  bb.0:
92    liveins: $sgpr0
93
94    ; GFX1150-LABEL: name: fptrunc_f32_to_f16
95    ; GFX1150: liveins: $sgpr0
96    ; GFX1150-NEXT: {{  $}}
97    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
98    ; GFX1150-NEXT: [[FPTRUNC:%[0-9]+]]:sgpr(s16) = G_FPTRUNC [[COPY]](s32)
99    %0:_(s32) = COPY $sgpr0
100    %1:_(s16) = G_FPTRUNC %0(s32)
101...
102
103---
104name:            fpext_f16_to_f32
105legalized:       true
106body:             |
107  bb.0:
108    liveins: $sgpr0
109
110    ; GFX1150-LABEL: name: fpext_f16_to_f32
111    ; GFX1150: liveins: $sgpr0
112    ; GFX1150-NEXT: {{  $}}
113    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
114    ; GFX1150-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
115    %1:_(s32) = COPY $sgpr0
116    %0:_(s16) = G_TRUNC %1(s32)
117...
118
119# Tests below should not select scalar registers
120
121---
122name:            fadd_f64
123legalized:       true
124body:             |
125  bb.0:
126    liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
127
128    ; GFX1150-LABEL: name: fadd_f64
129    ; GFX1150: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
130    ; GFX1150-NEXT: {{  $}}
131    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
132    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3
133    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)
134    ; GFX1150-NEXT: [[COPY3:%[0-9]+]]:vgpr(s64) = COPY [[COPY1]](s64)
135    ; GFX1150-NEXT: [[FADD:%[0-9]+]]:vgpr(s64) = G_FADD [[COPY2]], [[COPY3]]
136    %0:_(s64) = COPY $sgpr0_sgpr1
137    %1:_(s64) = COPY $sgpr2_sgpr3
138    %2:_(s64) = G_FADD %0, %1
139...
140
141---
142name:            fptosi_f64_to_i32
143legalized:       true
144body:             |
145  bb.0:
146    liveins: $sgpr0, $sgpr1
147
148    ; GFX1150-LABEL: name: fptosi_f64_to_i32
149    ; GFX1150: liveins: $sgpr0, $sgpr1
150    ; GFX1150-NEXT: {{  $}}
151    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
152    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)
153    ; GFX1150-NEXT: [[FPTOSI:%[0-9]+]]:vgpr(s32) = G_FPTOSI [[COPY1]](s64)
154    %0:_(s64) = COPY $sgpr0_sgpr1
155    %1:_(s32) = G_FPTOSI %0(s64)
156...
157
158---
159name:            fptoui_f16_to_u16
160legalized:       true
161body:             |
162  bb.0:
163    liveins: $sgpr0
164
165    ; GFX1150-LABEL: name: fptoui_f16_to_u16
166    ; GFX1150: liveins: $sgpr0
167    ; GFX1150-NEXT: {{  $}}
168    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
169    ; GFX1150-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
170    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:vgpr(s16) = COPY [[TRUNC]](s16)
171    ; GFX1150-NEXT: [[FPTOUI:%[0-9]+]]:vgpr(s16) = G_FPTOUI [[COPY1]](s16)
172    %1:_(s32) = COPY $sgpr0
173    %0:_(s16) = G_TRUNC %1(s32)
174    %2:_(s16) = G_FPTOUI %0(s16)
175...
176
177---
178name:            sitofp_i32_to_f64
179legalized:       true
180body:             |
181  bb.0:
182    liveins: $sgpr0
183
184    ; GFX1150-LABEL: name: sitofp_i32_to_f64
185    ; GFX1150: liveins: $sgpr0
186    ; GFX1150-NEXT: {{  $}}
187    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
188    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
189    ; GFX1150-NEXT: [[SITOFP:%[0-9]+]]:vgpr(s64) = G_SITOFP [[COPY1]](s32)
190    %0:_(s32) = COPY $sgpr0
191    %1:_(s64) = G_SITOFP %0(s32)
192...
193
194---
195name:            uitofp_u16_to_f16
196legalized:       true
197body:             |
198  bb.0:
199    liveins: $sgpr0
200
201    ; GFX1150-LABEL: name: uitofp_u16_to_f16
202    ; GFX1150: liveins: $sgpr0
203    ; GFX1150-NEXT: {{  $}}
204    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
205    ; GFX1150-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
206    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:vgpr(s16) = COPY [[TRUNC]](s16)
207    ; GFX1150-NEXT: [[UITOFP:%[0-9]+]]:vgpr(s16) = G_UITOFP [[COPY1]](s16)
208    %1:_(s32) = COPY $sgpr0
209    %0:_(s16) = G_TRUNC %1(s32)
210    %2:_(s16) = G_UITOFP %0(s16)
211...
212
213---
214name:            fptrunc_f64_to_f32
215legalized:       true
216body:             |
217  bb.0:
218    liveins: $sgpr0_sgpr1
219
220    ; GFX1150-LABEL: name: fptrunc_f64_to_f32
221    ; GFX1150: liveins: $sgpr0_sgpr1
222    ; GFX1150-NEXT: {{  $}}
223    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
224    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)
225    ; GFX1150-NEXT: [[FPTRUNC:%[0-9]+]]:vgpr(s32) = G_FPTRUNC [[COPY1]](s64)
226    %0:_(s64) = COPY $sgpr0_sgpr1
227    %1:_(s32) = G_FPTRUNC %0(s64)
228...
229
230---
231name:            fpext_f32_to_f64
232legalized:       true
233body:             |
234  bb.0:
235    liveins: $sgpr0
236
237    ; GFX1150-LABEL: name: fpext_f32_to_f64
238    ; GFX1150: liveins: $sgpr0
239    ; GFX1150-NEXT: {{  $}}
240    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
241    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
242    ; GFX1150-NEXT: [[FPEXT:%[0-9]+]]:vgpr(s64) = G_FPEXT [[COPY1]](s32)
243    %0:_(s32) = COPY $sgpr0
244    %1:_(s64) = G_FPEXT %0(s32)
245
246...
247