xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-ubfx.mir (revision 50fb44eebb0397f9b5f45a44239d6b53faf07c3b)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck --check-prefix=GCN %s
3# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck --check-prefix=GCN %s
4
5---
6name:            bfe_and_lshr_s32
7legalized:       true
8tracksRegLiveness: true
9
10body: |
11  bb.0.entry:
12  liveins: $vgpr0
13
14    ; GCN-LABEL: name: bfe_and_lshr_s32
15    ; GCN: liveins: $vgpr0
16    ; GCN-NEXT: {{  $}}
17    ; GCN-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
18    ; GCN-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
19    ; GCN-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
20    ; GCN-NEXT: [[UBFX:%[0-9]+]]:_(s32) = G_UBFX [[COPY]], [[C1]](s32), [[C]]
21    ; GCN-NEXT: $vgpr0 = COPY [[UBFX]](s32)
22    %0:_(s32) = COPY $vgpr0
23    %1:_(s32) = G_CONSTANT i32 8
24    %2:_(s32) = G_LSHR %0, %1(s32)
25    %3:_(s32) = G_CONSTANT i32 31
26    %4:_(s32) = G_AND %2, %3
27    $vgpr0 = COPY %4(s32)
28
29...
30
31---
32name:            bfe_and_lshr_s64
33legalized:       true
34tracksRegLiveness: true
35
36body: |
37  bb.0.entry:
38  liveins: $vgpr0_vgpr1
39
40    ; GCN-LABEL: name: bfe_and_lshr_s64
41    ; GCN: liveins: $vgpr0_vgpr1
42    ; GCN-NEXT: {{  $}}
43    ; GCN-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
44    ; GCN-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 10
45    ; GCN-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
46    ; GCN-NEXT: [[UBFX:%[0-9]+]]:_(s64) = G_UBFX [[COPY]], [[C1]](s32), [[C]]
47    ; GCN-NEXT: $vgpr0_vgpr1 = COPY [[UBFX]](s64)
48    %0:_(s64) = COPY $vgpr0_vgpr1
49    %1:_(s32) = G_CONSTANT i32 8
50    %2:_(s64) = G_LSHR %0, %1(s32)
51    %3:_(s64) = G_CONSTANT i64 1023
52    %4:_(s64) = G_AND %2, %3
53    $vgpr0_vgpr1 = COPY %4(s64)
54
55...
56
57---
58name:            toobig_and_lshr_s32
59legalized:       true
60tracksRegLiveness: true
61
62body: |
63  bb.0.entry:
64  liveins: $vgpr0
65
66    ; GCN-LABEL: name: toobig_and_lshr_s32
67    ; GCN: liveins: $vgpr0
68    ; GCN-NEXT: {{  $}}
69    ; GCN-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
70    ; GCN-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 28
71    ; GCN-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)
72    ; GCN-NEXT: $vgpr0 = COPY [[LSHR]](s32)
73    %0:_(s32) = COPY $vgpr0
74    %1:_(s32) = G_CONSTANT i32 28
75    %2:_(s32) = G_LSHR %0, %1(s32)
76    %3:_(s32) = G_CONSTANT i32 511
77    %4:_(s32) = G_AND %2, %3
78    $vgpr0 = COPY %4(s32)
79
80...
81
82---
83name:            bfe_and_ashr_s32
84legalized:       true
85tracksRegLiveness: true
86
87body: |
88  bb.0.entry:
89  liveins: $vgpr0
90
91    ; GCN-LABEL: name: bfe_and_ashr_s32
92    ; GCN: liveins: $vgpr0
93    ; GCN-NEXT: {{  $}}
94    ; GCN-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
95    ; GCN-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
96    ; GCN-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)
97    ; GCN-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
98    ; GCN-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ASHR]], [[C1]]
99    ; GCN-NEXT: $vgpr0 = COPY [[AND]](s32)
100    %0:_(s32) = COPY $vgpr0
101    %1:_(s32) = G_CONSTANT i32 8
102    %2:_(s32) = G_ASHR %0, %1(s32)
103    %3:_(s32) = G_CONSTANT i32 31
104    %4:_(s32) = G_AND %2, %3
105    $vgpr0 = COPY %4(s32)
106
107...
108
109---
110name:            bfe_lshr_and_s32
111legalized:       true
112tracksRegLiveness: true
113
114body: |
115  bb.0.entry:
116  liveins: $vgpr0
117
118    ; GCN-LABEL: name: bfe_lshr_and_s32
119    ; GCN: liveins: $vgpr0
120    ; GCN-NEXT: {{  $}}
121    ; GCN-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
122    ; GCN-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
123    ; GCN-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
124    ; GCN-NEXT: [[UBFX:%[0-9]+]]:_(s32) = G_UBFX [[COPY]], [[C1]](s32), [[C]]
125    ; GCN-NEXT: $vgpr0 = COPY [[UBFX]](s32)
126    %0:_(s32) = COPY $vgpr0
127    %1:_(s32) = G_CONSTANT i32 7936 ; 31 << 8
128    %2:_(s32) = G_AND %0, %1
129    %3:_(s32) = G_CONSTANT i32 8
130    %4:_(s32) = G_LSHR %2, %3(s32)
131    $vgpr0 = COPY %4(s32)
132
133...
134
135---
136name:            bfe_lshr_and_s64
137legalized:       true
138tracksRegLiveness: true
139
140body: |
141  bb.0.entry:
142  liveins: $vgpr0_vgpr1
143
144    ; GCN-LABEL: name: bfe_lshr_and_s64
145    ; GCN: liveins: $vgpr0_vgpr1
146    ; GCN-NEXT: {{  $}}
147    ; GCN-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
148    ; GCN-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 10
149    ; GCN-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
150    ; GCN-NEXT: [[UBFX:%[0-9]+]]:_(s64) = G_UBFX [[COPY]], [[C1]](s32), [[C]]
151    ; GCN-NEXT: $vgpr0_vgpr1 = COPY [[UBFX]](s64)
152    %0:_(s64) = COPY $vgpr0_vgpr1
153    %1:_(s64) = G_CONSTANT i64 261888 ; 1023 << 8
154    %2:_(s64) = G_AND %0, %1
155    %3:_(s32) = G_CONSTANT i32 8
156    %4:_(s64) = G_LSHR %2, %3(s32)
157    $vgpr0_vgpr1 = COPY %4(s64)
158
159...
160