xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-vector-args-gfx7.mir (revision 8871c3c562690347d75190be758312d1f92a7db4) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -run-pass=legalizer -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX7 %s
3
4--- |
5
6  define <2 x i16> @and_v2i16(<2 x i16> %a, <2 x i16> %b) #0 {
7    %and = and <2 x i16> %a, %b
8    ret <2 x i16> %and
9  }
10
11  define <3 x i16> @add_v3i16(<3 x i16> %a, <3 x i16> %b) #0 {
12    %add = add <3 x i16> %a, %b
13    ret <3 x i16> %add
14  }
15
16  define <3 x i16> @shl_v3i16(<3 x i16> %a, <3 x i16> %b) #0 {
17    %shl = shl <3 x i16> %a, %b
18    ret <3 x i16> %shl
19  }
20
21  define <4 x half> @fma_v4f16(<4 x half> %a, <4 x half> %b, <4 x half> %c) {
22    %fma = call <4 x half> @llvm.fma.v4f16(<4 x half> %a, <4 x half> %b, <4 x half> %c)
23    ret <4 x half> %fma
24  }
25
26  define amdgpu_ps <5 x half> @maxnum_v5i16(<5 x half> %a, <5 x half> %b) {
27    %fma = call <5 x half> @llvm.maxnum.v5f16(<5 x half> %a, <5 x half> %b)
28    ret <5 x half> %fma
29  }
30
31  declare <4 x half> @llvm.fma.v4f16(<4 x half>, <4 x half>, <4 x half>)
32  declare <5 x half> @llvm.maxnum.v5f16(<5 x half>, <5 x half>)
33...
34
35---
36name: and_v2i16
37body: |
38  bb.1:
39    liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
40
41    ; GFX7-LABEL: name: and_v2i16
42    ; GFX7: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
43    ; GFX7-NEXT: {{  $}}
44    ; GFX7-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
45    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
46    ; GFX7-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32)
47    ; GFX7-NEXT: [[TRUNC:%[0-9]+]]:_(<2 x s16>) = G_TRUNC [[BUILD_VECTOR]](<2 x s32>)
48    ; GFX7-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
49    ; GFX7-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
50    ; GFX7-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY2]](s32), [[COPY3]](s32)
51    ; GFX7-NEXT: [[TRUNC1:%[0-9]+]]:_(<2 x s16>) = G_TRUNC [[BUILD_VECTOR1]](<2 x s32>)
52    ; GFX7-NEXT: [[AND:%[0-9]+]]:_(<2 x s16>) = G_AND [[TRUNC]], [[TRUNC1]]
53    ; GFX7-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[AND]](<2 x s16>)
54    ; GFX7-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
55    ; GFX7-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32)
56    ; GFX7-NEXT: $vgpr0 = COPY [[BITCAST]](s32)
57    ; GFX7-NEXT: $vgpr1 = COPY [[LSHR]](s32)
58    ; GFX7-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
59    %3:_(s32) = COPY $vgpr0
60    %4:_(s32) = COPY $vgpr1
61    %5:_(<2 x s32>) = G_BUILD_VECTOR %3(s32), %4(s32)
62    %0:_(<2 x s16>) = G_TRUNC %5(<2 x s32>)
63    %6:_(s32) = COPY $vgpr2
64    %7:_(s32) = COPY $vgpr3
65    %8:_(<2 x s32>) = G_BUILD_VECTOR %6(s32), %7(s32)
66    %1:_(<2 x s16>) = G_TRUNC %8(<2 x s32>)
67    %9:_(<2 x s16>) = G_AND %0, %1
68    %13:_(s16), %14:_(s16) = G_UNMERGE_VALUES %9(<2 x s16>)
69    %11:_(s32) = G_ANYEXT %13(s16)
70    %12:_(s32) = G_ANYEXT %14(s16)
71    $vgpr0 = COPY %11(s32)
72    $vgpr1 = COPY %12(s32)
73    SI_RETURN implicit $vgpr0, implicit $vgpr1
74
75...
76
77---
78name: add_v3i16
79body: |
80  bb.1:
81    liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
82
83    ; GFX7-LABEL: name: add_v3i16
84    ; GFX7: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
85    ; GFX7-NEXT: {{  $}}
86    ; GFX7-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
87    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
88    ; GFX7-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
89    ; GFX7-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
90    ; GFX7-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
91    ; GFX7-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
92    ; GFX7-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY3]]
93    ; GFX7-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[COPY4]]
94    ; GFX7-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[COPY2]], [[COPY5]]
95    ; GFX7-NEXT: $vgpr0 = COPY [[ADD]](s32)
96    ; GFX7-NEXT: $vgpr1 = COPY [[ADD1]](s32)
97    ; GFX7-NEXT: $vgpr2 = COPY [[ADD2]](s32)
98    ; GFX7-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1, implicit $vgpr2
99    %3:_(s32) = COPY $vgpr0
100    %4:_(s32) = COPY $vgpr1
101    %5:_(s32) = COPY $vgpr2
102    %6:_(<3 x s32>) = G_BUILD_VECTOR %3(s32), %4(s32), %5(s32)
103    %0:_(<3 x s16>) = G_TRUNC %6(<3 x s32>)
104    %7:_(s32) = COPY $vgpr3
105    %8:_(s32) = COPY $vgpr4
106    %9:_(s32) = COPY $vgpr5
107    %10:_(<3 x s32>) = G_BUILD_VECTOR %7(s32), %8(s32), %9(s32)
108    %1:_(<3 x s16>) = G_TRUNC %10(<3 x s32>)
109    %11:_(<3 x s16>) = G_ADD %0, %1
110    %16:_(s16), %17:_(s16), %18:_(s16) = G_UNMERGE_VALUES %11(<3 x s16>)
111    %13:_(s32) = G_ANYEXT %16(s16)
112    %14:_(s32) = G_ANYEXT %17(s16)
113    %15:_(s32) = G_ANYEXT %18(s16)
114    $vgpr0 = COPY %13(s32)
115    $vgpr1 = COPY %14(s32)
116    $vgpr2 = COPY %15(s32)
117    SI_RETURN implicit $vgpr0, implicit $vgpr1, implicit $vgpr2
118
119...
120
121---
122name: shl_v3i16
123body: |
124  bb.1:
125    liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
126
127    ; GFX7-LABEL: name: shl_v3i16
128    ; GFX7: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
129    ; GFX7-NEXT: {{  $}}
130    ; GFX7-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
131    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
132    ; GFX7-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
133    ; GFX7-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
134    ; GFX7-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
135    ; GFX7-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
136    ; GFX7-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
137    ; GFX7-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C]]
138    ; GFX7-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[AND]](s32)
139    ; GFX7-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C]]
140    ; GFX7-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[AND1]](s32)
141    ; GFX7-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C]]
142    ; GFX7-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[AND2]](s32)
143    ; GFX7-NEXT: $vgpr0 = COPY [[SHL]](s32)
144    ; GFX7-NEXT: $vgpr1 = COPY [[SHL1]](s32)
145    ; GFX7-NEXT: $vgpr2 = COPY [[SHL2]](s32)
146    ; GFX7-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1, implicit $vgpr2
147    %3:_(s32) = COPY $vgpr0
148    %4:_(s32) = COPY $vgpr1
149    %5:_(s32) = COPY $vgpr2
150    %6:_(<3 x s32>) = G_BUILD_VECTOR %3(s32), %4(s32), %5(s32)
151    %0:_(<3 x s16>) = G_TRUNC %6(<3 x s32>)
152    %7:_(s32) = COPY $vgpr3
153    %8:_(s32) = COPY $vgpr4
154    %9:_(s32) = COPY $vgpr5
155    %10:_(<3 x s32>) = G_BUILD_VECTOR %7(s32), %8(s32), %9(s32)
156    %1:_(<3 x s16>) = G_TRUNC %10(<3 x s32>)
157    %11:_(<3 x s16>) = G_SHL %0, %1(<3 x s16>)
158    %16:_(s16), %17:_(s16), %18:_(s16) = G_UNMERGE_VALUES %11(<3 x s16>)
159    %13:_(s32) = G_ANYEXT %16(s16)
160    %14:_(s32) = G_ANYEXT %17(s16)
161    %15:_(s32) = G_ANYEXT %18(s16)
162    $vgpr0 = COPY %13(s32)
163    $vgpr1 = COPY %14(s32)
164    $vgpr2 = COPY %15(s32)
165    SI_RETURN implicit $vgpr0, implicit $vgpr1, implicit $vgpr2
166
167...
168
169---
170name: fma_v4f16
171body: |
172  bb.1:
173    liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11
174
175    ; GFX7-LABEL: name: fma_v4f16
176    ; GFX7: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11
177    ; GFX7-NEXT: {{  $}}
178    ; GFX7-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
179    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
180    ; GFX7-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
181    ; GFX7-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
182    ; GFX7-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
183    ; GFX7-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
184    ; GFX7-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
185    ; GFX7-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
186    ; GFX7-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
187    ; GFX7-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
188    ; GFX7-NEXT: [[COPY10:%[0-9]+]]:_(s32) = COPY $vgpr10
189    ; GFX7-NEXT: [[COPY11:%[0-9]+]]:_(s32) = COPY $vgpr11
190    ; GFX7-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
191    ; GFX7-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
192    ; GFX7-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)
193    ; GFX7-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY3]](s32)
194    ; GFX7-NEXT: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[COPY4]](s32)
195    ; GFX7-NEXT: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[COPY5]](s32)
196    ; GFX7-NEXT: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[COPY6]](s32)
197    ; GFX7-NEXT: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[COPY7]](s32)
198    ; GFX7-NEXT: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[COPY8]](s32)
199    ; GFX7-NEXT: [[TRUNC9:%[0-9]+]]:_(s16) = G_TRUNC [[COPY9]](s32)
200    ; GFX7-NEXT: [[TRUNC10:%[0-9]+]]:_(s16) = G_TRUNC [[COPY10]](s32)
201    ; GFX7-NEXT: [[TRUNC11:%[0-9]+]]:_(s16) = G_TRUNC [[COPY11]](s32)
202    ; GFX7-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
203    ; GFX7-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC4]](s16)
204    ; GFX7-NEXT: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC8]](s16)
205    ; GFX7-NEXT: [[FMA:%[0-9]+]]:_(s32) = G_FMA [[FPEXT]], [[FPEXT1]], [[FPEXT2]]
206    ; GFX7-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FMA]](s32)
207    ; GFX7-NEXT: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16)
208    ; GFX7-NEXT: [[FPEXT4:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC5]](s16)
209    ; GFX7-NEXT: [[FPEXT5:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC9]](s16)
210    ; GFX7-NEXT: [[FMA1:%[0-9]+]]:_(s32) = G_FMA [[FPEXT3]], [[FPEXT4]], [[FPEXT5]]
211    ; GFX7-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[FMA1]](s32)
212    ; GFX7-NEXT: [[FPEXT6:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC2]](s16)
213    ; GFX7-NEXT: [[FPEXT7:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC6]](s16)
214    ; GFX7-NEXT: [[FPEXT8:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC10]](s16)
215    ; GFX7-NEXT: [[FMA2:%[0-9]+]]:_(s32) = G_FMA [[FPEXT6]], [[FPEXT7]], [[FPEXT8]]
216    ; GFX7-NEXT: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[FMA2]](s32)
217    ; GFX7-NEXT: [[FPEXT9:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC3]](s16)
218    ; GFX7-NEXT: [[FPEXT10:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC7]](s16)
219    ; GFX7-NEXT: [[FPEXT11:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC11]](s16)
220    ; GFX7-NEXT: [[FMA3:%[0-9]+]]:_(s32) = G_FMA [[FPEXT9]], [[FPEXT10]], [[FPEXT11]]
221    ; GFX7-NEXT: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[FMA3]](s32)
222    ; GFX7-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
223    ; GFX7-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC1]](s16)
224    ; GFX7-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC2]](s16)
225    ; GFX7-NEXT: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC3]](s16)
226    ; GFX7-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)
227    ; GFX7-NEXT: $vgpr1 = COPY [[ANYEXT1]](s32)
228    ; GFX7-NEXT: $vgpr2 = COPY [[ANYEXT2]](s32)
229    ; GFX7-NEXT: $vgpr3 = COPY [[ANYEXT3]](s32)
230    ; GFX7-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3
231    %4:_(s32) = COPY $vgpr0
232    %5:_(s32) = COPY $vgpr1
233    %6:_(s32) = COPY $vgpr2
234    %7:_(s32) = COPY $vgpr3
235    %8:_(<4 x s32>) = G_BUILD_VECTOR %4(s32), %5(s32), %6(s32), %7(s32)
236    %0:_(<4 x s16>) = G_TRUNC %8(<4 x s32>)
237    %9:_(s32) = COPY $vgpr4
238    %10:_(s32) = COPY $vgpr5
239    %11:_(s32) = COPY $vgpr6
240    %12:_(s32) = COPY $vgpr7
241    %13:_(<4 x s32>) = G_BUILD_VECTOR %9(s32), %10(s32), %11(s32), %12(s32)
242    %1:_(<4 x s16>) = G_TRUNC %13(<4 x s32>)
243    %14:_(s32) = COPY $vgpr8
244    %15:_(s32) = COPY $vgpr9
245    %16:_(s32) = COPY $vgpr10
246    %17:_(s32) = COPY $vgpr11
247    %18:_(<4 x s32>) = G_BUILD_VECTOR %14(s32), %15(s32), %16(s32), %17(s32)
248    %2:_(<4 x s16>) = G_TRUNC %18(<4 x s32>)
249    %19:_(<4 x s16>) = G_FMA %0, %1, %2
250    %25:_(s16), %26:_(s16), %27:_(s16), %28:_(s16) = G_UNMERGE_VALUES %19(<4 x s16>)
251    %21:_(s32) = G_ANYEXT %25(s16)
252    %22:_(s32) = G_ANYEXT %26(s16)
253    %23:_(s32) = G_ANYEXT %27(s16)
254    %24:_(s32) = G_ANYEXT %28(s16)
255    $vgpr0 = COPY %21(s32)
256    $vgpr1 = COPY %22(s32)
257    $vgpr2 = COPY %23(s32)
258    $vgpr3 = COPY %24(s32)
259    SI_RETURN implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3
260...
261
262---
263name: maxnum_v5i16
264body: |
265  bb.1:
266    liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9
267
268    ; GFX7-LABEL: name: maxnum_v5i16
269    ; GFX7: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9
270    ; GFX7-NEXT: {{  $}}
271    ; GFX7-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
272    ; GFX7-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
273    ; GFX7-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
274    ; GFX7-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
275    ; GFX7-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $vgpr4
276    ; GFX7-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $vgpr5
277    ; GFX7-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $vgpr6
278    ; GFX7-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
279    ; GFX7-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY $vgpr8
280    ; GFX7-NEXT: [[COPY9:%[0-9]+]]:_(s32) = COPY $vgpr9
281    ; GFX7-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
282    ; GFX7-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
283    ; GFX7-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)
284    ; GFX7-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[COPY3]](s32)
285    ; GFX7-NEXT: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[COPY4]](s32)
286    ; GFX7-NEXT: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[COPY5]](s32)
287    ; GFX7-NEXT: [[TRUNC6:%[0-9]+]]:_(s16) = G_TRUNC [[COPY6]](s32)
288    ; GFX7-NEXT: [[TRUNC7:%[0-9]+]]:_(s16) = G_TRUNC [[COPY7]](s32)
289    ; GFX7-NEXT: [[TRUNC8:%[0-9]+]]:_(s16) = G_TRUNC [[COPY8]](s32)
290    ; GFX7-NEXT: [[TRUNC9:%[0-9]+]]:_(s16) = G_TRUNC [[COPY9]](s32)
291    ; GFX7-NEXT: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
292    ; GFX7-NEXT: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC5]](s16)
293    ; GFX7-NEXT: [[FMAXNUM_IEEE:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FPEXT]], [[FPEXT1]]
294    ; GFX7-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[FMAXNUM_IEEE]](s32)
295    ; GFX7-NEXT: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16)
296    ; GFX7-NEXT: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC6]](s16)
297    ; GFX7-NEXT: [[FMAXNUM_IEEE1:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FPEXT2]], [[FPEXT3]]
298    ; GFX7-NEXT: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[FMAXNUM_IEEE1]](s32)
299    ; GFX7-NEXT: [[FPEXT4:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC2]](s16)
300    ; GFX7-NEXT: [[FPEXT5:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC7]](s16)
301    ; GFX7-NEXT: [[FMAXNUM_IEEE2:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FPEXT4]], [[FPEXT5]]
302    ; GFX7-NEXT: [[FPTRUNC2:%[0-9]+]]:_(s16) = G_FPTRUNC [[FMAXNUM_IEEE2]](s32)
303    ; GFX7-NEXT: [[FPEXT6:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC3]](s16)
304    ; GFX7-NEXT: [[FPEXT7:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC8]](s16)
305    ; GFX7-NEXT: [[FMAXNUM_IEEE3:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FPEXT6]], [[FPEXT7]]
306    ; GFX7-NEXT: [[FPTRUNC3:%[0-9]+]]:_(s16) = G_FPTRUNC [[FMAXNUM_IEEE3]](s32)
307    ; GFX7-NEXT: [[FPEXT8:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC4]](s16)
308    ; GFX7-NEXT: [[FPEXT9:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC9]](s16)
309    ; GFX7-NEXT: [[FMAXNUM_IEEE4:%[0-9]+]]:_(s32) = G_FMAXNUM_IEEE [[FPEXT8]], [[FPEXT9]]
310    ; GFX7-NEXT: [[FPTRUNC4:%[0-9]+]]:_(s16) = G_FPTRUNC [[FMAXNUM_IEEE4]](s32)
311    ; GFX7-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
312    ; GFX7-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC1]](s16)
313    ; GFX7-NEXT: [[ANYEXT2:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC2]](s16)
314    ; GFX7-NEXT: [[ANYEXT3:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC3]](s16)
315    ; GFX7-NEXT: [[ANYEXT4:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC4]](s16)
316    ; GFX7-NEXT: $vgpr0 = COPY [[ANYEXT]](s32)
317    ; GFX7-NEXT: $vgpr1 = COPY [[ANYEXT1]](s32)
318    ; GFX7-NEXT: $vgpr2 = COPY [[ANYEXT2]](s32)
319    ; GFX7-NEXT: $vgpr3 = COPY [[ANYEXT3]](s32)
320    ; GFX7-NEXT: $vgpr4 = COPY [[ANYEXT4]](s32)
321    ; GFX7-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4
322    %2:_(s32) = COPY $vgpr0
323    %3:_(s32) = COPY $vgpr1
324    %4:_(s32) = COPY $vgpr2
325    %5:_(s32) = COPY $vgpr3
326    %6:_(s32) = COPY $vgpr4
327    %7:_(<5 x s32>) = G_BUILD_VECTOR %2(s32), %3(s32), %4(s32), %5(s32), %6(s32)
328    %0:_(<5 x s16>) = G_TRUNC %7(<5 x s32>)
329    %8:_(s32) = COPY $vgpr5
330    %9:_(s32) = COPY $vgpr6
331    %10:_(s32) = COPY $vgpr7
332    %11:_(s32) = COPY $vgpr8
333    %12:_(s32) = COPY $vgpr9
334    %13:_(<5 x s32>) = G_BUILD_VECTOR %8(s32), %9(s32), %10(s32), %11(s32), %12(s32)
335    %1:_(<5 x s16>) = G_TRUNC %13(<5 x s32>)
336    %15:_(<5 x s16>) = G_FMAXNUM %0, %1
337    %21:_(s16), %22:_(s16), %23:_(s16), %24:_(s16), %25:_(s16) = G_UNMERGE_VALUES %15(<5 x s16>)
338    %16:_(s32) = G_ANYEXT %21(s16)
339    %17:_(s32) = G_ANYEXT %22(s16)
340    %18:_(s32) = G_ANYEXT %23(s16)
341    %19:_(s32) = G_ANYEXT %24(s16)
342    %20:_(s32) = G_ANYEXT %25(s16)
343    $vgpr0 = COPY %16(s32)
344    $vgpr1 = COPY %17(s32)
345    $vgpr2 = COPY %18(s32)
346    $vgpr3 = COPY %19(s32)
347    $vgpr4 = COPY %20(s32)
348    SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3, implicit $vgpr4
349...
350