xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir (revision 8871c3c562690347d75190be758312d1f92a7db4)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn-- -run-pass=legalizer -verify-machineinstrs -o - %s | FileCheck %s
3
4---
5name:            memmove_test
6body:             |
7  bb.0:
8    liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
9
10    ; CHECK-LABEL: name: memmove_test
11    ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
12    ; CHECK-NEXT: {{  $}}
13    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
14    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
15    ; CHECK-NEXT: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
16    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
17    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $vgpr3
18    ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)
19    ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[MV1]](p0) :: (load (s8))
20    ; CHECK-NEXT: G_STORE [[LOAD]](s32), [[MV]](p0) :: (store (s8))
21    ; CHECK-NEXT: S_ENDPGM 0
22    %0:_(s32) = COPY $vgpr0
23    %1:_(s32) = COPY $vgpr1
24    %2:_(p0) = G_MERGE_VALUES %0:_(s32), %1:_(s32)
25    %3:_(s32) = COPY $vgpr2
26    %4:_(s32) = COPY $vgpr3
27    %5:_(p0) = G_MERGE_VALUES %3:_(s32), %4:_(s32)
28    %6:_(s32) = G_CONSTANT i32 1
29    %7:_(s64) = G_ZEXT %6:_(s32)
30    G_MEMMOVE %2:_(p0), %5:_(p0), %7:_(s64), 0 :: (store (s8)), (load (s8))
31    S_ENDPGM 0
32
33...
34