1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=bonaire -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=CI %s 3 4--- 5name: test_load_constant32bit_s32_align1 6body: | 7 bb.0: 8 liveins: $vgpr0 9 10 ; CI-LABEL: name: test_load_constant32bit_s32_align1 11 ; CI: liveins: $vgpr0 12 ; CI-NEXT: {{ $}} 13 ; CI-NEXT: [[COPY:%[0-9]+]]:_(p6) = COPY $vgpr0 14 ; CI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY]](p6) 15 ; CI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 16 ; CI-NEXT: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[PTRTOINT]](s32), [[C]](s32) 17 ; CI-NEXT: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[MV]](p4) :: (load (s8), addrspace 6) 18 ; CI-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1 19 ; CI-NEXT: [[PTR_ADD:%[0-9]+]]:_(p4) = G_PTR_ADD [[MV]], [[C1]](s64) 20 ; CI-NEXT: [[ZEXTLOAD1:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[PTR_ADD]](p4) :: (load (s8) from unknown-address + 1, addrspace 6) 21 ; CI-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 22 ; CI-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[ZEXTLOAD1]], [[C2]](s32) 23 ; CI-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[SHL]], [[ZEXTLOAD]] 24 ; CI-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 2 25 ; CI-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p4) = G_PTR_ADD [[MV]], [[C3]](s64) 26 ; CI-NEXT: [[ZEXTLOAD2:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[PTR_ADD1]](p4) :: (load (s8) from unknown-address + 2, addrspace 6) 27 ; CI-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p4) = G_PTR_ADD [[PTR_ADD1]], [[C1]](s64) 28 ; CI-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD2]](p4) :: (load (s8) from unknown-address + 3, addrspace 6) 29 ; CI-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[LOAD]], [[C2]](s32) 30 ; CI-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[SHL1]], [[ZEXTLOAD2]] 31 ; CI-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 32 ; CI-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[OR1]], [[C4]](s32) 33 ; CI-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[SHL2]], [[OR]] 34 ; CI-NEXT: $vgpr0 = COPY [[OR2]](s32) 35 %0:_(p6) = COPY $vgpr0 36 %1:_(s32) = G_LOAD %0 :: (load (s32), align 1, addrspace 6) 37 $vgpr0 = COPY %1 38... 39 40--- 41name: test_load_constant32bit_s32_align4 42body: | 43 bb.0: 44 liveins: $vgpr0 45 46 ; CI-LABEL: name: test_load_constant32bit_s32_align4 47 ; CI: liveins: $vgpr0 48 ; CI-NEXT: {{ $}} 49 ; CI-NEXT: [[COPY:%[0-9]+]]:_(p6) = COPY $vgpr0 50 ; CI-NEXT: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY]](p6) 51 ; CI-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 52 ; CI-NEXT: [[MV:%[0-9]+]]:_(p4) = G_MERGE_VALUES [[PTRTOINT]](s32), [[C]](s32) 53 ; CI-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[MV]](p4) :: (load (s32), addrspace 6) 54 ; CI-NEXT: $vgpr0 = COPY [[LOAD]](s32) 55 %0:_(p6) = COPY $vgpr0 56 %1:_(s32) = G_LOAD %0 :: (load (s32), align 4, addrspace 6) 57 $vgpr0 = COPY %1 58... 59