xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir (revision 9e9907f1cfa424366fba58d9520f9305b537cec9) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: not --crash llc -mtriple=amdgcn -run-pass=legalizer -o /dev/null %s 2>&1  | FileCheck %s
3
4# CHECK: LLVM ERROR: unable to legalize instruction: %3:_(p0) = G_JUMP_TABLE %jump-table.0 (in function: jt_test)
5
6# FIXME: This could probably be smaller, but the jump table MIR parsing is very crashy.
7
8--- |
9  define i32 @jt_test(i32 %x) {
10  entry:
11    switch i32 %x, label %return [
12      i32 75, label %sw.bb
13      i32 34, label %sw.bb
14      i32 56, label %sw.bb
15      i32 35, label %sw.bb
16      i32 40, label %sw.bb
17      i32 4, label %sw.bb1
18      i32 5, label %sw.bb1
19      i32 6, label %sw.bb1
20    ]
21
22  sw.bb:                                            ; preds = %entry, %entry, %entry, %entry, %entry
23    %add = add nsw i32 %x, 42
24    br label %return
25
26  sw.bb1:                                           ; preds = %entry, %entry, %entry
27    %mul = mul nsw i32 %x, 3
28    br label %return
29
30  return:                                           ; preds = %sw.bb1, %sw.bb, %entry
31    %retval.0 = phi i32 [ %mul, %sw.bb1 ], [ %add, %sw.bb ], [ 0, %entry ]
32    ret i32 %retval.0
33  }
34
35...
36---
37name:            jt_test
38tracksRegLiveness: true
39jumpTable:
40  kind:            block-address
41  entries:
42    - id:              0
43      blocks:          [ '%bb.3', '%bb.3', '%bb.3', '%bb.4', '%bb.4', '%bb.4',
44                         '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
45                         '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
46                         '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
47                         '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
48                         '%bb.2', '%bb.2', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
49                         '%bb.2', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
50                         '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
51                         '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.2', '%bb.4',
52                         '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
53                         '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4',
54                         '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.4', '%bb.2' ]
55body:             |
56  bb.0.entry:
57    liveins: $sgpr0
58
59    %0:_(s32) = COPY $sgpr0
60    %1:_(s32) = G_CONSTANT i32 0
61    %2:_(s1) = G_ICMP intpred(ugt), %0, %1
62    %3:_(p0) = G_JUMP_TABLE %jump-table.0
63    S_NOP 0, implicit %3
64    G_BRCOND %2, %bb.4
65
66  bb.1.entry:
67    successors: %bb.3(0x2aaaaaab), %bb.4(0x2aaaaaab), %bb.2(0x2aaaaaab)
68
69    G_BR %bb.4
70
71  bb.2.sw.bb:
72    G_BR %bb.4
73
74  bb.3.sw.bb1:
75
76  bb.4.return:
77    S_ENDPGM 0
78
79...
80