1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck %s 3 4--- 5name: extract_vector_elt_0_v2i32 6 7body: | 8 bb.0: 9 liveins: $vgpr0_vgpr1 10 ; CHECK-LABEL: name: extract_vector_elt_0_v2i32 11 ; CHECK: liveins: $vgpr0_vgpr1 12 ; CHECK-NEXT: {{ $}} 13 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 14 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) 15 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 16 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32) 17 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 18 %1:_(s32) = G_CONSTANT i32 0 19 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %1 20 $vgpr0 = COPY %2 21... 22--- 23name: extract_vector_elt_1_v2i32 24 25body: | 26 bb.0: 27 liveins: $vgpr0_vgpr1 28 ; CHECK-LABEL: name: extract_vector_elt_1_v2i32 29 ; CHECK: liveins: $vgpr0_vgpr1 30 ; CHECK-NEXT: {{ $}} 31 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 32 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) 33 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 34 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32) 35 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 36 %1:_(s32) = G_CONSTANT i32 1 37 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %1 38 $vgpr0 = COPY %2 39... 40--- 41name: extract_vector_elt_2_v2i32 42 43body: | 44 bb.0: 45 liveins: $vgpr0_vgpr1 46 ; CHECK-LABEL: name: extract_vector_elt_2_v2i32 47 ; CHECK: liveins: $vgpr0_vgpr1 48 ; CHECK-NEXT: {{ $}} 49 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 50 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) 51 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 52 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32) 53 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 54 %1:_(s32) = G_CONSTANT i32 1 55 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %1 56 $vgpr0 = COPY %2 57... 58--- 59name: extract_vector_elt_0_v3i32 60 61body: | 62 bb.0: 63 liveins: $vgpr0_vgpr1_vgpr2 64 ; CHECK-LABEL: name: extract_vector_elt_0_v3i32 65 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2 66 ; CHECK-NEXT: {{ $}} 67 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 68 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 69 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 70 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32) 71 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 72 %1:_(s32) = G_CONSTANT i32 0 73 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %1 74 $vgpr0 = COPY %2 75... 76--- 77name: extract_vector_elt_0_v4i32 78 79body: | 80 bb.0: 81 liveins: $vgpr0_vgpr1_vgpr2_vgpr3 82 ; CHECK-LABEL: name: extract_vector_elt_0_v4i32 83 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3 84 ; CHECK-NEXT: {{ $}} 85 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 86 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 87 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 88 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32) 89 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 90 %1:_(s32) = G_CONSTANT i32 0 91 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %1 92 $vgpr0 = COPY %2 93... 94 95--- 96name: extract_vector_elt_0_v5i32 97 98body: | 99 bb.0: 100 liveins: $vgpr0 101 ; CHECK-LABEL: name: extract_vector_elt_0_v5i32 102 ; CHECK: liveins: $vgpr0 103 ; CHECK-NEXT: {{ $}} 104 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 105 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 106 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32) 107 %0:_(s32) = COPY $vgpr0 108 %1:_(<5 x s32>) = G_BUILD_VECTOR %0, %0, %0, %0, %0 109 %2:_(s32) = G_CONSTANT i32 0 110 %3:_(s32) = G_EXTRACT_VECTOR_ELT %1, %2 111 $vgpr0 = COPY %3 112... 113 114--- 115name: extract_vector_elt_0_v6i32 116 117body: | 118 bb.0: 119 liveins: $vgpr0 120 ; CHECK-LABEL: name: extract_vector_elt_0_v6i32 121 ; CHECK: liveins: $vgpr0 122 ; CHECK-NEXT: {{ $}} 123 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 124 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 125 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32) 126 %0:_(s32) = COPY $vgpr0 127 %1:_(<6 x s32>) = G_BUILD_VECTOR %0, %0, %0, %0, %0, %0 128 %2:_(s32) = G_CONSTANT i32 0 129 %3:_(s32) = G_EXTRACT_VECTOR_ELT %1, %2 130 $vgpr0 = COPY %3 131... 132 133--- 134name: extract_vector_elt_0_v7i32 135 136body: | 137 bb.0: 138 liveins: $vgpr0 139 ; CHECK-LABEL: name: extract_vector_elt_0_v7i32 140 ; CHECK: liveins: $vgpr0 141 ; CHECK-NEXT: {{ $}} 142 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 143 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 144 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32) 145 %0:_(s32) = COPY $vgpr0 146 %1:_(<7 x s32>) = G_BUILD_VECTOR %0, %0, %0, %0, %0, %0, %0 147 %2:_(s32) = G_CONSTANT i32 0 148 %3:_(s32) = G_EXTRACT_VECTOR_ELT %1, %2 149 $vgpr0 = COPY %3 150... 151 152--- 153name: extract_vector_elt_0_v8i32 154 155body: | 156 bb.0: 157 liveins: $vgpr0 158 ; CHECK-LABEL: name: extract_vector_elt_0_v8i32 159 ; CHECK: liveins: $vgpr0 160 ; CHECK-NEXT: {{ $}} 161 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 162 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 163 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32) 164 %0:_(s32) = COPY $vgpr0 165 %1:_(<8 x s32>) = G_BUILD_VECTOR %0, %0, %0, %0, %0, %0, %0, %0 166 %2:_(s32) = G_CONSTANT i32 0 167 %3:_(s32) = G_EXTRACT_VECTOR_ELT %1, %2 168 $vgpr0 = COPY %3 169... 170 171--- 172name: extract_vector_elt_0_v16i32 173 174body: | 175 bb.0: 176 liveins: $vgpr0 177 ; CHECK-LABEL: name: extract_vector_elt_0_v16i32 178 ; CHECK: liveins: $vgpr0 179 ; CHECK-NEXT: {{ $}} 180 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 181 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) 182 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32) 183 %0:_(s32) = COPY $vgpr0 184 %1:_(<16 x s32>) = G_BUILD_VECTOR %0, %0, %0, %0, %0, %0, %0, %0, %0, %0, %0, %0, %0, %0, %0, %0 185 %2:_(s32) = G_CONSTANT i32 0 186 %3:_(s32) = G_EXTRACT_VECTOR_ELT %1, %2 187 $vgpr0 = COPY %3 188... 189 190--- 191name: extract_vector_elt_var_v2i32 192 193body: | 194 bb.0: 195 liveins: $vgpr0_vgpr1, $vgpr2 196 ; CHECK-LABEL: name: extract_vector_elt_var_v2i32 197 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 198 ; CHECK-NEXT: {{ $}} 199 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 200 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 201 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s32>), [[COPY1]](s32) 202 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32) 203 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 204 %1:_(s32) = COPY $vgpr2 205 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %1 206 $vgpr0 = COPY %2 207... 208 209--- 210name: extract_vector_elt_var_v8i32 211 212body: | 213 bb.0: 214 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 215 ; CHECK-LABEL: name: extract_vector_elt_var_v8i32 216 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 217 ; CHECK-NEXT: {{ $}} 218 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 219 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 220 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<8 x s32>), [[COPY1]](s32) 221 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32) 222 %0:_(<8 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 223 %1:_(s32) = COPY $vgpr2 224 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %1 225 $vgpr0 = COPY %2 226... 227 228 229--- 230name: extract_vector_elt_0_v2i8_i32 231 232body: | 233 bb.0: 234 235 ; CHECK-LABEL: name: extract_vector_elt_0_v2i8_i32 236 ; CHECK: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF 237 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<2 x s32>) 238 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 239 ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32) 240 %0:_(<2 x s8>) = G_IMPLICIT_DEF 241 %1:_(s32) = G_CONSTANT i32 0 242 %2:_(s8) = G_EXTRACT_VECTOR_ELT %0, %1 243 %3:_(s32) = G_ANYEXT %2 244 $vgpr0 = COPY %3 245... 246 247--- 248name: extract_vector_elt_0_v2i16_i32 249 250body: | 251 bb.0: 252 253 ; CHECK-LABEL: name: extract_vector_elt_0_v2i16_i32 254 ; CHECK: [[DEF:%[0-9]+]]:_(<2 x s16>) = G_IMPLICIT_DEF 255 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 256 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[DEF]](<2 x s16>) 257 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 258 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 259 %0:_(<2 x s16>) = G_IMPLICIT_DEF 260 %1:_(s32) = G_CONSTANT i32 0 261 %2:_(s16) = G_EXTRACT_VECTOR_ELT %0, %1 262 %3:_(s32) = G_ANYEXT %2 263 $vgpr0 = COPY %3 264... 265 266--- 267name: extract_vector_elt_0_v2i1_i32 268 269body: | 270 bb.0: 271 272 ; CHECK-LABEL: name: extract_vector_elt_0_v2i1_i32 273 ; CHECK: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF 274 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<2 x s32>) 275 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 276 ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32) 277 %0:_(<2 x s1>) = G_IMPLICIT_DEF 278 %1:_(s32) = G_CONSTANT i32 0 279 %2:_(s1) = G_EXTRACT_VECTOR_ELT %0, %1 280 %3:_(s32) = G_ANYEXT %2 281 $vgpr0 = COPY %3 282... 283 284--- 285name: extract_vector_elt_0_v2i1_i1 286 287body: | 288 bb.0: 289 290 ; CHECK-LABEL: name: extract_vector_elt_0_v2i1_i1 291 ; CHECK: [[DEF:%[0-9]+]]:_(<2 x s32>) = G_IMPLICIT_DEF 292 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<2 x s32>) 293 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 294 ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32) 295 %0:_(<2 x s1>) = G_IMPLICIT_DEF 296 %1:_(s1) = G_CONSTANT i1 false 297 %4:_(s32) = G_ZEXT %1 298 %2:_(s1) = G_EXTRACT_VECTOR_ELT %0, %4 299 %3:_(s32) = G_ANYEXT %2 300 $vgpr0 = COPY %3 301... 302 303--- 304name: extract_vector_elt_v2s8_varidx_i32 305 306body: | 307 bb.0: 308 liveins: $vgpr0, $vgpr1 309 310 ; CHECK-LABEL: name: extract_vector_elt_v2s8_varidx_i32 311 ; CHECK: liveins: $vgpr0, $vgpr1 312 ; CHECK-NEXT: {{ $}} 313 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 314 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 315 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 316 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32) 317 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[LSHR]](s32) 318 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<2 x s32>), [[COPY1]](s32) 319 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32) 320 %0:_(s32) = COPY $vgpr0 321 %1:_(s32) = COPY $vgpr1 322 %2:_(s16) = G_TRUNC %0 323 %3:_(<2 x s8>) = G_BITCAST %2 324 %4:_(s8) = G_EXTRACT_VECTOR_ELT %3, %1 325 %5:_(s32) = G_ANYEXT %4 326 $vgpr0 = COPY %5 327... 328 329--- 330name: extract_vector_elt_v2s8_constidx_0_i32 331 332body: | 333 bb.0: 334 liveins: $vgpr0 335 336 ; CHECK-LABEL: name: extract_vector_elt_v2s8_constidx_0_i32 337 ; CHECK: liveins: $vgpr0 338 ; CHECK-NEXT: {{ $}} 339 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 340 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 341 ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32) 342 %0:_(s32) = COPY $vgpr0 343 %1:_(s32) = COPY $vgpr1 344 %2:_(s16) = G_TRUNC %0 345 %3:_(<2 x s8>) = G_BITCAST %2 346 %4:_(s32) = G_CONSTANT i32 0 347 %5:_(s8) = G_EXTRACT_VECTOR_ELT %3, %4 348 %6:_(s32) = G_ANYEXT %5 349 $vgpr0 = COPY %6 350... 351 352--- 353name: extract_vector_elt_v2s8_constidx_1_i32 354 355body: | 356 bb.0: 357 liveins: $vgpr0 358 359 ; CHECK-LABEL: name: extract_vector_elt_v2s8_constidx_1_i32 360 ; CHECK: liveins: $vgpr0 361 ; CHECK-NEXT: {{ $}} 362 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 363 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 364 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 365 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32) 366 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 367 %0:_(s32) = COPY $vgpr0 368 %1:_(s32) = COPY $vgpr1 369 %2:_(s16) = G_TRUNC %0 370 %3:_(<2 x s8>) = G_BITCAST %2 371 %4:_(s32) = G_CONSTANT i32 1 372 %5:_(s8) = G_EXTRACT_VECTOR_ELT %3, %4 373 %6:_(s32) = G_ANYEXT %5 374 $vgpr0 = COPY %6 375... 376 377--- 378name: extract_vector_elt_v4s4_varidx_i32 379 380body: | 381 bb.0: 382 liveins: $vgpr0, $vgpr1 383 384 ; CHECK-LABEL: name: extract_vector_elt_v4s4_varidx_i32 385 ; CHECK: liveins: $vgpr0, $vgpr1 386 ; CHECK-NEXT: {{ $}} 387 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 388 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 389 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 390 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32) 391 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 392 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C1]](s32) 393 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 394 ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C2]](s32) 395 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[LSHR]](s32), [[LSHR1]](s32), [[LSHR2]](s32) 396 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<4 x s32>), [[COPY1]](s32) 397 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32) 398 %0:_(s32) = COPY $vgpr0 399 %1:_(s32) = COPY $vgpr1 400 %2:_(s16) = G_TRUNC %0 401 %3:_(<4 x s4>) = G_BITCAST %2 402 %4:_(s4) = G_EXTRACT_VECTOR_ELT %3, %1 403 %5:_(s32) = G_ANYEXT %4 404 $vgpr0 = COPY %5 405... 406 407--- 408name: extract_vector_elt_v3s8_varidx_i32 409 410body: | 411 bb.0: 412 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 413 414 ; CHECK-LABEL: name: extract_vector_elt_v3s8_varidx_i32 415 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 416 ; CHECK-NEXT: {{ $}} 417 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 418 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3 419 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<3 x s32>), [[COPY1]](s32) 420 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32) 421 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 422 %1:_(s32) = COPY $vgpr3 423 %2:_(<3 x s8>) = G_TRUNC %0 424 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1 425 %4:_(s32) = G_ANYEXT %3 426 $vgpr0 = COPY %4 427... 428 429--- 430name: extract_vector_elt_v4s8_varidx_i32 431 432body: | 433 bb.0: 434 liveins: $vgpr0, $vgpr1 435 436 ; CHECK-LABEL: name: extract_vector_elt_v4s8_varidx_i32 437 ; CHECK: liveins: $vgpr0, $vgpr1 438 ; CHECK-NEXT: {{ $}} 439 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 440 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 441 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 442 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 443 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C]](s32) 444 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[SHL]](s32) 445 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 446 %0:_(s32) = COPY $vgpr0 447 %1:_(s32) = COPY $vgpr1 448 %2:_(<4 x s8>) = G_BITCAST %0 449 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1 450 %4:_(s32) = G_ANYEXT %3 451 $vgpr0 = COPY %4 452... 453 454--- 455name: extract_vector_elt_v4s8_constidx_0_i32 456 457body: | 458 bb.0: 459 liveins: $vgpr0 460 461 ; CHECK-LABEL: name: extract_vector_elt_v4s8_constidx_0_i32 462 ; CHECK: liveins: $vgpr0 463 ; CHECK-NEXT: {{ $}} 464 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 465 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 466 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32) 467 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 468 %0:_(s32) = COPY $vgpr0 469 %1:_(<4 x s8>) = G_BITCAST %0 470 %2:_(s32) = G_CONSTANT i32 0 471 %3:_(s8) = G_EXTRACT_VECTOR_ELT %1, %2 472 %4:_(s32) = G_ANYEXT %3 473 $vgpr0 = COPY %4 474... 475 476--- 477name: extract_vector_elt_v4s8_constidx_1_i32 478 479body: | 480 bb.0: 481 liveins: $vgpr0 482 483 ; CHECK-LABEL: name: extract_vector_elt_v4s8_constidx_1_i32 484 ; CHECK: liveins: $vgpr0 485 ; CHECK-NEXT: {{ $}} 486 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 487 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 488 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32) 489 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 490 %0:_(s32) = COPY $vgpr0 491 %1:_(<4 x s8>) = G_BITCAST %0 492 %2:_(s32) = G_CONSTANT i32 1 493 %3:_(s8) = G_EXTRACT_VECTOR_ELT %1, %2 494 %4:_(s32) = G_ANYEXT %3 495 $vgpr0 = COPY %4 496... 497 498--- 499name: extract_vector_elt_v4s8_constidx_2_i32 500 501body: | 502 bb.0: 503 liveins: $vgpr0 504 505 ; CHECK-LABEL: name: extract_vector_elt_v4s8_constidx_2_i32 506 ; CHECK: liveins: $vgpr0 507 ; CHECK-NEXT: {{ $}} 508 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 509 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 510 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32) 511 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 512 %0:_(s32) = COPY $vgpr0 513 %1:_(<4 x s8>) = G_BITCAST %0 514 %2:_(s32) = G_CONSTANT i32 2 515 %3:_(s8) = G_EXTRACT_VECTOR_ELT %1, %2 516 %4:_(s32) = G_ANYEXT %3 517 $vgpr0 = COPY %4 518... 519 520--- 521name: extract_vector_elt_v4s8_constidx_3_i32 522 523body: | 524 bb.0: 525 liveins: $vgpr0 526 527 ; CHECK-LABEL: name: extract_vector_elt_v4s8_constidx_3_i32 528 ; CHECK: liveins: $vgpr0 529 ; CHECK-NEXT: {{ $}} 530 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 531 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 532 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32) 533 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 534 %0:_(s32) = COPY $vgpr0 535 %1:_(<4 x s8>) = G_BITCAST %0 536 %2:_(s32) = G_CONSTANT i32 3 537 %3:_(s8) = G_EXTRACT_VECTOR_ELT %1, %2 538 %4:_(s32) = G_ANYEXT %3 539 $vgpr0 = COPY %4 540... 541 542 543 544--- 545name: extract_vector_elt_v8s8_varidx_i32 546 547body: | 548 bb.0: 549 liveins: $vgpr0_vgpr1, $vgpr2 550 551 ; CHECK-LABEL: name: extract_vector_elt_v8s8_varidx_i32 552 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 553 ; CHECK-NEXT: {{ $}} 554 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 555 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 556 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) 557 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32) 558 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 559 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32) 560 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<2 x s32>), [[LSHR]](s32) 561 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 562 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 563 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32) 564 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[EVEC]], [[SHL]](s32) 565 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR1]](s32) 566 %0:_(s64) = COPY $vgpr0_vgpr1 567 %1:_(s32) = COPY $vgpr2 568 %2:_(<8 x s8>) = G_BITCAST %0 569 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1 570 %4:_(s32) = G_ANYEXT %3 571 $vgpr0 = COPY %4 572... 573 574 575--- 576name: extract_vector_elt_v8s8_constidx_0_i32 577 578body: | 579 bb.0: 580 liveins: $vgpr0_vgpr1 581 582 ; CHECK-LABEL: name: extract_vector_elt_v8s8_constidx_0_i32 583 ; CHECK: liveins: $vgpr0_vgpr1 584 ; CHECK-NEXT: {{ $}} 585 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 586 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 587 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) 588 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 589 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32) 590 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 591 %0:_(s64) = COPY $vgpr0_vgpr1 592 %1:_(s32) = G_CONSTANT i32 0 593 %2:_(<8 x s8>) = G_BITCAST %0 594 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1 595 %4:_(s32) = G_ANYEXT %3 596 $vgpr0 = COPY %4 597... 598 599--- 600name: extract_vector_elt_v8s8_constidx_1_i32 601 602body: | 603 bb.0: 604 liveins: $vgpr0_vgpr1 605 606 ; CHECK-LABEL: name: extract_vector_elt_v8s8_constidx_1_i32 607 ; CHECK: liveins: $vgpr0_vgpr1 608 ; CHECK-NEXT: {{ $}} 609 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 610 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) 611 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 612 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 613 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32) 614 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 615 %0:_(s64) = COPY $vgpr0_vgpr1 616 %1:_(s32) = G_CONSTANT i32 1 617 %2:_(<8 x s8>) = G_BITCAST %0 618 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1 619 %4:_(s32) = G_ANYEXT %3 620 $vgpr0 = COPY %4 621... 622 623--- 624name: extract_vector_elt_v8s8_constidx_3_i32 625 626body: | 627 bb.0: 628 liveins: $vgpr0_vgpr1 629 630 ; CHECK-LABEL: name: extract_vector_elt_v8s8_constidx_3_i32 631 ; CHECK: liveins: $vgpr0_vgpr1 632 ; CHECK-NEXT: {{ $}} 633 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 634 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) 635 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 636 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 637 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32) 638 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 639 %0:_(s64) = COPY $vgpr0_vgpr1 640 %1:_(s32) = G_CONSTANT i32 3 641 %2:_(<8 x s8>) = G_BITCAST %0 642 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1 643 %4:_(s32) = G_ANYEXT %3 644 $vgpr0 = COPY %4 645... 646 647--- 648name: extract_vector_elt_v8s8_constidx_4_i32 649 650body: | 651 bb.0: 652 liveins: $vgpr0_vgpr1 653 654 ; CHECK-LABEL: name: extract_vector_elt_v8s8_constidx_4_i32 655 ; CHECK: liveins: $vgpr0_vgpr1 656 ; CHECK-NEXT: {{ $}} 657 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 658 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) 659 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 660 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 661 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32) 662 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 663 %0:_(s64) = COPY $vgpr0_vgpr1 664 %1:_(s32) = G_CONSTANT i32 4 665 %2:_(<8 x s8>) = G_BITCAST %0 666 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1 667 %4:_(s32) = G_ANYEXT %3 668 $vgpr0 = COPY %4 669... 670 671--- 672name: extract_vector_elt_v8s8_constidx_5_i32 673 674body: | 675 bb.0: 676 liveins: $vgpr0_vgpr1 677 678 ; CHECK-LABEL: name: extract_vector_elt_v8s8_constidx_5_i32 679 ; CHECK: liveins: $vgpr0_vgpr1 680 ; CHECK-NEXT: {{ $}} 681 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 682 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) 683 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 684 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 685 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32) 686 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 687 %0:_(s64) = COPY $vgpr0_vgpr1 688 %1:_(s32) = G_CONSTANT i32 5 689 %2:_(<8 x s8>) = G_BITCAST %0 690 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1 691 %4:_(s32) = G_ANYEXT %3 692 $vgpr0 = COPY %4 693... 694 695--- 696name: extract_vector_elt_v8s8_constidx_7_i32 697 698body: | 699 bb.0: 700 liveins: $vgpr0_vgpr1 701 702 ; CHECK-LABEL: name: extract_vector_elt_v8s8_constidx_7_i32 703 ; CHECK: liveins: $vgpr0_vgpr1 704 ; CHECK-NEXT: {{ $}} 705 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 706 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64) 707 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 708 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 709 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32) 710 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 711 %0:_(s64) = COPY $vgpr0_vgpr1 712 %1:_(s32) = G_CONSTANT i32 7 713 %2:_(<8 x s8>) = G_BITCAST %0 714 %3:_(s8) = G_EXTRACT_VECTOR_ELT %2, %1 715 %4:_(s32) = G_ANYEXT %3 716 $vgpr0 = COPY %4 717... 718 719--- 720name: extract_vector_elt_v2s16_varidx_i32 721 722body: | 723 bb.0: 724 liveins: $vgpr0, $vgpr1 725 726 ; CHECK-LABEL: name: extract_vector_elt_v2s16_varidx_i32 727 ; CHECK: liveins: $vgpr0, $vgpr1 728 ; CHECK-NEXT: {{ $}} 729 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 730 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 731 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 732 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 733 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 734 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 735 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32) 736 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[SHL]](s32) 737 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 738 %0:_(<2 x s16>) = COPY $vgpr0 739 %1:_(s32) = COPY $vgpr1 740 %2:_(s16) = G_EXTRACT_VECTOR_ELT %0, %1 741 %3:_(s32) = G_ANYEXT %2 742 $vgpr0 = COPY %3 743... 744 745--- 746name: extract_vector_elt_v2s16_idx0_i32 747 748body: | 749 bb.0: 750 liveins: $vgpr0 751 752 ; CHECK-LABEL: name: extract_vector_elt_v2s16_idx0_i32 753 ; CHECK: liveins: $vgpr0 754 ; CHECK-NEXT: {{ $}} 755 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 756 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 757 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 758 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 759 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 760 %0:_(<2 x s16>) = COPY $vgpr0 761 %1:_(s32) = G_CONSTANT i32 0 762 %2:_(s16) = G_EXTRACT_VECTOR_ELT %0, %1 763 %3:_(s32) = G_ANYEXT %2 764 $vgpr0 = COPY %3 765... 766 767--- 768name: extract_vector_elt_v2s16_idx1_i32 769 770body: | 771 bb.0: 772 liveins: $vgpr0 773 774 ; CHECK-LABEL: name: extract_vector_elt_v2s16_idx1_i32 775 ; CHECK: liveins: $vgpr0 776 ; CHECK-NEXT: {{ $}} 777 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 778 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 779 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 780 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 781 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 782 %0:_(<2 x s16>) = COPY $vgpr0 783 %1:_(s32) = G_CONSTANT i32 1 784 %2:_(s16) = G_EXTRACT_VECTOR_ELT %0, %1 785 %3:_(s32) = G_ANYEXT %2 786 $vgpr0 = COPY %3 787... 788 789--- 790name: extract_vector_elt_v3s16_varidx_i32 791 792body: | 793 bb.0: 794 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 795 796 ; CHECK-LABEL: name: extract_vector_elt_v3s16_varidx_i32 797 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 798 ; CHECK-NEXT: {{ $}} 799 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 800 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3 801 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<3 x s32>), [[COPY1]](s32) 802 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32) 803 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 804 %1:_(s32) = COPY $vgpr3 805 %2:_(<3 x s16>) = G_TRUNC %0 806 %3:_(s16) = G_EXTRACT_VECTOR_ELT %2, %1 807 %4:_(s32) = G_ANYEXT %3 808 $vgpr0 = COPY %4 809... 810 811--- 812name: extract_vector_elt_v3s16_idx0_i32 813 814body: | 815 bb.0: 816 liveins: $vgpr0_vgpr1_vgpr2 817 818 ; CHECK-LABEL: name: extract_vector_elt_v3s16_idx0_i32 819 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2 820 ; CHECK-NEXT: {{ $}} 821 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 822 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 823 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 824 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32) 825 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 826 %1:_(s32) = G_CONSTANT i32 0 827 %2:_(<3 x s16>) = G_TRUNC %0 828 %3:_(s16) = G_EXTRACT_VECTOR_ELT %2, %1 829 %4:_(s32) = G_ANYEXT %3 830 $vgpr0 = COPY %4 831... 832 833--- 834name: extract_vector_elt_v3s16_idx1_i32 835 836body: | 837 bb.0: 838 liveins: $vgpr0_vgpr1_vgpr2 839 840 ; CHECK-LABEL: name: extract_vector_elt_v3s16_idx1_i32 841 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2 842 ; CHECK-NEXT: {{ $}} 843 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 844 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 845 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 846 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32) 847 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 848 %1:_(s32) = G_CONSTANT i32 1 849 %2:_(<3 x s16>) = G_TRUNC %0 850 %3:_(s16) = G_EXTRACT_VECTOR_ELT %2, %1 851 %4:_(s32) = G_ANYEXT %3 852 $vgpr0 = COPY %4 853... 854 855--- 856name: extract_vector_elt_v3s16_idx2_i32 857 858body: | 859 bb.0: 860 liveins: $vgpr0_vgpr1_vgpr2 861 862 ; CHECK-LABEL: name: extract_vector_elt_v3s16_idx2_i32 863 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2 864 ; CHECK-NEXT: {{ $}} 865 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 866 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 867 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV2]](s32) 868 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32) 869 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 870 %1:_(s32) = G_CONSTANT i32 2 871 %2:_(<3 x s16>) = G_TRUNC %0 872 %3:_(s16) = G_EXTRACT_VECTOR_ELT %2, %1 873 %4:_(s32) = G_ANYEXT %3 874 $vgpr0 = COPY %4 875... 876 877--- 878name: extract_vector_elt_v4s16_varidx_i32 879 880body: | 881 bb.0: 882 liveins: $vgpr0_vgpr1, $vgpr2 883 884 ; CHECK-LABEL: name: extract_vector_elt_v4s16_varidx_i32 885 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 886 ; CHECK-NEXT: {{ $}} 887 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 888 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 889 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s32>) = G_BITCAST [[COPY]](<4 x s16>) 890 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 891 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32) 892 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BITCAST]](<2 x s32>), [[LSHR]](s32) 893 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 894 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 895 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32) 896 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[EVEC]], [[SHL]](s32) 897 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR1]](s32) 898 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 899 %1:_(s32) = COPY $vgpr2 900 %2:_(s16) = G_EXTRACT_VECTOR_ELT %0, %1 901 %3:_(s32) = G_ANYEXT %2 902 $vgpr0 = COPY %3 903... 904 905--- 906name: extract_vector_elt_v2s128_varidx_i32 907 908body: | 909 bb.0: 910 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8 911 912 ; CHECK-LABEL: name: extract_vector_elt_v2s128_varidx_i32 913 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8 914 ; CHECK-NEXT: {{ $}} 915 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s128>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 916 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr8 917 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<4 x s64>) = G_BITCAST [[COPY]](<2 x s128>) 918 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 919 ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY1]], [[C]] 920 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 921 ; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[MUL]], [[C1]] 922 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[BITCAST]](<4 x s64>), [[ADD]](s32) 923 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 924 ; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[MUL]], [[C2]] 925 ; CHECK-NEXT: [[EVEC1:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[BITCAST]](<4 x s64>), [[ADD1]](s32) 926 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[EVEC]](s64), [[EVEC1]](s64) 927 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s128) = G_BITCAST [[BUILD_VECTOR]](<2 x s64>) 928 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BITCAST1]](s128) 929 %0:_(<2 x s128>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 930 %1:_(s32) = COPY $vgpr8 931 %2:_(s128) = G_EXTRACT_VECTOR_ELT %0, %1 932 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 933... 934 935--- 936name: extract_vector_elt_v2i32_varidx_i64 937 938body: | 939 bb.0: 940 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 941 942 ; CHECK-LABEL: name: extract_vector_elt_v2i32_varidx_i64 943 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 944 ; CHECK-NEXT: {{ $}} 945 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 946 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr2_vgpr3 947 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64) 948 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s32>), [[TRUNC]](s32) 949 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32) 950 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 951 %1:_(s64) = COPY $vgpr2_vgpr3 952 %3:_(s32) = G_TRUNC %1 953 %2:_(s32) = G_EXTRACT_VECTOR_ELT %0, %3 954 $vgpr0 = COPY %2 955... 956--- 957name: extract_vector_elt_0_v2i64 958 959body: | 960 bb.0: 961 liveins: $vgpr0_vgpr1_vgpr2_vgpr3 962 963 ; CHECK-LABEL: name: extract_vector_elt_0_v2i64 964 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3 965 ; CHECK-NEXT: {{ $}} 966 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 967 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>) 968 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[UV]](s64) 969 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY1]](s64) 970 %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 971 %1:_(s32) = G_CONSTANT i32 0 972 %2:_(s64) = G_EXTRACT_VECTOR_ELT %0, %1 973 $vgpr0_vgpr1 = COPY %2 974... 975 976--- 977name: extract_vector_elt_0_v8i64 978 979body: | 980 bb.0: 981 liveins: $vgpr0_vgpr1_vgpr2_vgpr3 982 983 ; CHECK-LABEL: name: extract_vector_elt_0_v8i64 984 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3 985 ; CHECK-NEXT: {{ $}} 986 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<8 x s64>) = G_IMPLICIT_DEF 987 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64), [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64), [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64), [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[DEF]](<8 x s64>) 988 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[UV]](s64) 989 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY]](s64) 990 %0:_(<8 x s64>) = G_IMPLICIT_DEF 991 %1:_(s32) = G_CONSTANT i32 0 992 %2:_(s64) = G_EXTRACT_VECTOR_ELT %0, %1 993 $vgpr0_vgpr1 = COPY %2 994... 995 996--- 997name: extract_vector_elt_0_v16i64 998 999body: | 1000 bb.0: 1001 liveins: $vgpr0_vgpr1_vgpr2_vgpr3 1002 1003 ; CHECK-LABEL: name: extract_vector_elt_0_v16i64 1004 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3 1005 ; CHECK-NEXT: {{ $}} 1006 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<16 x s64>) = G_IMPLICIT_DEF 1007 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64), [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64), [[UV4:%[0-9]+]]:_(s64), [[UV5:%[0-9]+]]:_(s64), [[UV6:%[0-9]+]]:_(s64), [[UV7:%[0-9]+]]:_(s64), [[UV8:%[0-9]+]]:_(s64), [[UV9:%[0-9]+]]:_(s64), [[UV10:%[0-9]+]]:_(s64), [[UV11:%[0-9]+]]:_(s64), [[UV12:%[0-9]+]]:_(s64), [[UV13:%[0-9]+]]:_(s64), [[UV14:%[0-9]+]]:_(s64), [[UV15:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[DEF]](<16 x s64>) 1008 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[UV]](s64) 1009 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[COPY]](s64) 1010 %0:_(<16 x s64>) = G_IMPLICIT_DEF 1011 %1:_(s32) = G_CONSTANT i32 0 1012 %2:_(s64) = G_EXTRACT_VECTOR_ELT %0, %1 1013 $vgpr0_vgpr1 = COPY %2 1014... 1015 1016# Make sure we look through casts looking for a constant index. 1017--- 1018name: extract_vector_elt_look_through_trunc_0_v4i32 1019 1020body: | 1021 bb.0: 1022 liveins: $vgpr0_vgpr1_vgpr2_vgpr3 1023 ; CHECK-LABEL: name: extract_vector_elt_look_through_trunc_0_v4i32 1024 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3 1025 ; CHECK-NEXT: {{ $}} 1026 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 1027 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 1028 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV]](s32) 1029 ; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32) 1030 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 1031 %1:_(s64) = G_CONSTANT i64 0 1032 %2:_(s32) = G_TRUNC %1 1033 %3:_(s32) = G_EXTRACT_VECTOR_ELT %0, %2 1034 $vgpr0 = COPY %3 1035... 1036 1037--- 1038name: extract_vector_elt_7_v64s32 1039 1040body: | 1041 bb.0: 1042 liveins: $sgpr0_sgpr1 1043 1044 ; CHECK-LABEL: name: extract_vector_elt_7_v64s32 1045 ; CHECK: liveins: $sgpr0_sgpr1 1046 ; CHECK-NEXT: {{ $}} 1047 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $sgpr0_sgpr1 1048 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p1) :: (load (<16 x s32>), align 4, addrspace 4) 1049 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<16 x s32>) 1050 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV7]](s32) 1051 ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY1]](s32) 1052 %0:_(p1) = COPY $sgpr0_sgpr1 1053 %1:_(s32) = G_CONSTANT i32 7 1054 %2:_(<64 x s32>) = G_LOAD %0 :: (load (<64 x s32>), align 4, addrspace 4) 1055 %3:_(s32) = G_EXTRACT_VECTOR_ELT %2, %1 1056 S_ENDPGM 0, implicit %3 1057... 1058 1059--- 1060name: extract_vector_elt_33_v64s32 1061 1062body: | 1063 bb.0: 1064 liveins: $sgpr0_sgpr1 1065 1066 ; CHECK-LABEL: name: extract_vector_elt_33_v64s32 1067 ; CHECK: liveins: $sgpr0_sgpr1 1068 ; CHECK-NEXT: {{ $}} 1069 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $sgpr0_sgpr1 1070 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 128 1071 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) 1072 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD]](p1) :: (load (<16 x s32>) from unknown-address + 128, align 4, addrspace 4) 1073 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<16 x s32>) 1074 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[UV1]](s32) 1075 ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY1]](s32) 1076 %0:_(p1) = COPY $sgpr0_sgpr1 1077 %1:_(s32) = G_CONSTANT i32 33 1078 %2:_(<64 x s32>) = G_LOAD %0 :: (load (<64 x s32>), align 4, addrspace 4) 1079 %3:_(s32) = G_EXTRACT_VECTOR_ELT %2, %1 1080 S_ENDPGM 0, implicit %3 1081... 1082 1083# Test handling of out of bounds indexes 1084--- 1085name: extract_vector_elt_64_65_v64s32 1086 1087body: | 1088 bb.0: 1089 liveins: $sgpr0_sgpr1 1090 1091 ; CHECK-LABEL: name: extract_vector_elt_64_65_v64s32 1092 ; CHECK: liveins: $sgpr0_sgpr1 1093 ; CHECK-NEXT: {{ $}} 1094 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 1095 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[DEF]](s32) 1096 ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY]](s32), implicit [[DEF]](s32) 1097 %0:_(p1) = COPY $sgpr0_sgpr1 1098 %1:_(s32) = G_CONSTANT i32 64 1099 %2:_(<64 x s32>) = G_LOAD %0 :: (load (<64 x s32>), align 4, addrspace 4) 1100 %3:_(s32) = G_EXTRACT_VECTOR_ELT %2, %1 1101 %4:_(s32) = G_CONSTANT i32 65 1102 %5:_(s32) = G_EXTRACT_VECTOR_ELT %2, %4 1103 S_ENDPGM 0, implicit %3, implicit %5 1104... 1105 1106--- 1107name: extract_vector_elt_33_v64p3 1108 1109body: | 1110 bb.0: 1111 liveins: $sgpr0_sgpr1 1112 1113 ; CHECK-LABEL: name: extract_vector_elt_33_v64p3 1114 ; CHECK: liveins: $sgpr0_sgpr1 1115 ; CHECK-NEXT: {{ $}} 1116 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $sgpr0_sgpr1 1117 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 128 1118 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) 1119 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD]](p1) :: (load (<16 x s32>) from unknown-address + 128, align 4, addrspace 4) 1120 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<16 x p3>) = G_BITCAST [[LOAD]](<16 x s32>) 1121 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(p3), [[UV1:%[0-9]+]]:_(p3), [[UV2:%[0-9]+]]:_(p3), [[UV3:%[0-9]+]]:_(p3), [[UV4:%[0-9]+]]:_(p3), [[UV5:%[0-9]+]]:_(p3), [[UV6:%[0-9]+]]:_(p3), [[UV7:%[0-9]+]]:_(p3), [[UV8:%[0-9]+]]:_(p3), [[UV9:%[0-9]+]]:_(p3), [[UV10:%[0-9]+]]:_(p3), [[UV11:%[0-9]+]]:_(p3), [[UV12:%[0-9]+]]:_(p3), [[UV13:%[0-9]+]]:_(p3), [[UV14:%[0-9]+]]:_(p3), [[UV15:%[0-9]+]]:_(p3) = G_UNMERGE_VALUES [[BITCAST]](<16 x p3>) 1122 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p3) = COPY [[UV1]](p3) 1123 ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY1]](p3) 1124 %0:_(p1) = COPY $sgpr0_sgpr1 1125 %1:_(s32) = G_CONSTANT i32 33 1126 %2:_(<64 x p3>) = G_LOAD %0 :: (load (<64 x p3>), align 4, addrspace 4) 1127 %3:_(p3) = G_EXTRACT_VECTOR_ELT %2, %1 1128 S_ENDPGM 0, implicit %3 1129... 1130 1131--- 1132name: extract_vector_elt_varidx_v64s32 1133 1134body: | 1135 bb.0: 1136 liveins: $sgpr0_sgpr1, $sgpr2 1137 1138 ; CHECK-LABEL: name: extract_vector_elt_varidx_v64s32 1139 ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2 1140 ; CHECK-NEXT: {{ $}} 1141 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p1) = COPY $sgpr0_sgpr1 1142 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $sgpr2 1143 ; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[COPY]](p1) :: (load (<16 x s32>), align 4, addrspace 4) 1144 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 64 1145 ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C]](s64) 1146 ; CHECK-NEXT: [[LOAD1:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD]](p1) :: (load (<16 x s32>) from unknown-address + 64, align 4, addrspace 4) 1147 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 128 1148 ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C1]](s64) 1149 ; CHECK-NEXT: [[LOAD2:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD1]](p1) :: (load (<16 x s32>) from unknown-address + 128, align 4, addrspace 4) 1150 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 192 1151 ; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p1) = G_PTR_ADD [[COPY]], [[C2]](s64) 1152 ; CHECK-NEXT: [[LOAD3:%[0-9]+]]:_(<16 x s32>) = G_LOAD [[PTR_ADD2]](p1) :: (load (<16 x s32>) from unknown-address + 192, align 4, addrspace 4) 1153 ; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %stack.0 1154 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32), [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32), [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32), [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32), [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<16 x s32>) 1155 ; CHECK-NEXT: [[UV16:%[0-9]+]]:_(s32), [[UV17:%[0-9]+]]:_(s32), [[UV18:%[0-9]+]]:_(s32), [[UV19:%[0-9]+]]:_(s32), [[UV20:%[0-9]+]]:_(s32), [[UV21:%[0-9]+]]:_(s32), [[UV22:%[0-9]+]]:_(s32), [[UV23:%[0-9]+]]:_(s32), [[UV24:%[0-9]+]]:_(s32), [[UV25:%[0-9]+]]:_(s32), [[UV26:%[0-9]+]]:_(s32), [[UV27:%[0-9]+]]:_(s32), [[UV28:%[0-9]+]]:_(s32), [[UV29:%[0-9]+]]:_(s32), [[UV30:%[0-9]+]]:_(s32), [[UV31:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD1]](<16 x s32>) 1156 ; CHECK-NEXT: [[UV32:%[0-9]+]]:_(s32), [[UV33:%[0-9]+]]:_(s32), [[UV34:%[0-9]+]]:_(s32), [[UV35:%[0-9]+]]:_(s32), [[UV36:%[0-9]+]]:_(s32), [[UV37:%[0-9]+]]:_(s32), [[UV38:%[0-9]+]]:_(s32), [[UV39:%[0-9]+]]:_(s32), [[UV40:%[0-9]+]]:_(s32), [[UV41:%[0-9]+]]:_(s32), [[UV42:%[0-9]+]]:_(s32), [[UV43:%[0-9]+]]:_(s32), [[UV44:%[0-9]+]]:_(s32), [[UV45:%[0-9]+]]:_(s32), [[UV46:%[0-9]+]]:_(s32), [[UV47:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD2]](<16 x s32>) 1157 ; CHECK-NEXT: [[UV48:%[0-9]+]]:_(s32), [[UV49:%[0-9]+]]:_(s32), [[UV50:%[0-9]+]]:_(s32), [[UV51:%[0-9]+]]:_(s32), [[UV52:%[0-9]+]]:_(s32), [[UV53:%[0-9]+]]:_(s32), [[UV54:%[0-9]+]]:_(s32), [[UV55:%[0-9]+]]:_(s32), [[UV56:%[0-9]+]]:_(s32), [[UV57:%[0-9]+]]:_(s32), [[UV58:%[0-9]+]]:_(s32), [[UV59:%[0-9]+]]:_(s32), [[UV60:%[0-9]+]]:_(s32), [[UV61:%[0-9]+]]:_(s32), [[UV62:%[0-9]+]]:_(s32), [[UV63:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD3]](<16 x s32>) 1158 ; CHECK-NEXT: G_STORE [[UV]](s32), [[FRAME_INDEX]](p5) :: (store (s32) into %stack.0, align 256, addrspace 5) 1159 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 4 1160 ; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C3]](s32) 1161 ; CHECK-NEXT: G_STORE [[UV1]](s32), [[PTR_ADD3]](p5) :: (store (s32) into %stack.0 + 4, basealign 256, addrspace 5) 1162 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1163 ; CHECK-NEXT: [[PTR_ADD4:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C4]](s32) 1164 ; CHECK-NEXT: G_STORE [[UV2]](s32), [[PTR_ADD4]](p5) :: (store (s32) into %stack.0 + 8, align 8, basealign 256, addrspace 5) 1165 ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 12 1166 ; CHECK-NEXT: [[PTR_ADD5:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C5]](s32) 1167 ; CHECK-NEXT: G_STORE [[UV3]](s32), [[PTR_ADD5]](p5) :: (store (s32) into %stack.0 + 12, basealign 256, addrspace 5) 1168 ; CHECK-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1169 ; CHECK-NEXT: [[PTR_ADD6:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C6]](s32) 1170 ; CHECK-NEXT: G_STORE [[UV4]](s32), [[PTR_ADD6]](p5) :: (store (s32) into %stack.0 + 16, align 16, basealign 256, addrspace 5) 1171 ; CHECK-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 20 1172 ; CHECK-NEXT: [[PTR_ADD7:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C7]](s32) 1173 ; CHECK-NEXT: G_STORE [[UV5]](s32), [[PTR_ADD7]](p5) :: (store (s32) into %stack.0 + 20, basealign 256, addrspace 5) 1174 ; CHECK-NEXT: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 1175 ; CHECK-NEXT: [[PTR_ADD8:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C8]](s32) 1176 ; CHECK-NEXT: G_STORE [[UV6]](s32), [[PTR_ADD8]](p5) :: (store (s32) into %stack.0 + 24, align 8, basealign 256, addrspace 5) 1177 ; CHECK-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 28 1178 ; CHECK-NEXT: [[PTR_ADD9:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C9]](s32) 1179 ; CHECK-NEXT: G_STORE [[UV7]](s32), [[PTR_ADD9]](p5) :: (store (s32) into %stack.0 + 28, basealign 256, addrspace 5) 1180 ; CHECK-NEXT: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 32 1181 ; CHECK-NEXT: [[PTR_ADD10:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C10]](s32) 1182 ; CHECK-NEXT: G_STORE [[UV8]](s32), [[PTR_ADD10]](p5) :: (store (s32) into %stack.0 + 32, align 32, basealign 256, addrspace 5) 1183 ; CHECK-NEXT: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 36 1184 ; CHECK-NEXT: [[PTR_ADD11:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C11]](s32) 1185 ; CHECK-NEXT: G_STORE [[UV9]](s32), [[PTR_ADD11]](p5) :: (store (s32) into %stack.0 + 36, basealign 256, addrspace 5) 1186 ; CHECK-NEXT: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 40 1187 ; CHECK-NEXT: [[PTR_ADD12:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C12]](s32) 1188 ; CHECK-NEXT: G_STORE [[UV10]](s32), [[PTR_ADD12]](p5) :: (store (s32) into %stack.0 + 40, align 8, basealign 256, addrspace 5) 1189 ; CHECK-NEXT: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 44 1190 ; CHECK-NEXT: [[PTR_ADD13:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C13]](s32) 1191 ; CHECK-NEXT: G_STORE [[UV11]](s32), [[PTR_ADD13]](p5) :: (store (s32) into %stack.0 + 44, basealign 256, addrspace 5) 1192 ; CHECK-NEXT: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 48 1193 ; CHECK-NEXT: [[PTR_ADD14:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C14]](s32) 1194 ; CHECK-NEXT: G_STORE [[UV12]](s32), [[PTR_ADD14]](p5) :: (store (s32) into %stack.0 + 48, align 16, basealign 256, addrspace 5) 1195 ; CHECK-NEXT: [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 52 1196 ; CHECK-NEXT: [[PTR_ADD15:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C15]](s32) 1197 ; CHECK-NEXT: G_STORE [[UV13]](s32), [[PTR_ADD15]](p5) :: (store (s32) into %stack.0 + 52, basealign 256, addrspace 5) 1198 ; CHECK-NEXT: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 56 1199 ; CHECK-NEXT: [[PTR_ADD16:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C16]](s32) 1200 ; CHECK-NEXT: G_STORE [[UV14]](s32), [[PTR_ADD16]](p5) :: (store (s32) into %stack.0 + 56, align 8, basealign 256, addrspace 5) 1201 ; CHECK-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 60 1202 ; CHECK-NEXT: [[PTR_ADD17:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C17]](s32) 1203 ; CHECK-NEXT: G_STORE [[UV15]](s32), [[PTR_ADD17]](p5) :: (store (s32) into %stack.0 + 60, basealign 256, addrspace 5) 1204 ; CHECK-NEXT: [[C18:%[0-9]+]]:_(s32) = G_CONSTANT i32 64 1205 ; CHECK-NEXT: [[PTR_ADD18:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C18]](s32) 1206 ; CHECK-NEXT: G_STORE [[UV16]](s32), [[PTR_ADD18]](p5) :: (store (s32) into %stack.0 + 64, align 64, basealign 256, addrspace 5) 1207 ; CHECK-NEXT: [[C19:%[0-9]+]]:_(s32) = G_CONSTANT i32 68 1208 ; CHECK-NEXT: [[PTR_ADD19:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C19]](s32) 1209 ; CHECK-NEXT: G_STORE [[UV17]](s32), [[PTR_ADD19]](p5) :: (store (s32) into %stack.0 + 68, basealign 256, addrspace 5) 1210 ; CHECK-NEXT: [[C20:%[0-9]+]]:_(s32) = G_CONSTANT i32 72 1211 ; CHECK-NEXT: [[PTR_ADD20:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C20]](s32) 1212 ; CHECK-NEXT: G_STORE [[UV18]](s32), [[PTR_ADD20]](p5) :: (store (s32) into %stack.0 + 72, align 8, basealign 256, addrspace 5) 1213 ; CHECK-NEXT: [[C21:%[0-9]+]]:_(s32) = G_CONSTANT i32 76 1214 ; CHECK-NEXT: [[PTR_ADD21:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C21]](s32) 1215 ; CHECK-NEXT: G_STORE [[UV19]](s32), [[PTR_ADD21]](p5) :: (store (s32) into %stack.0 + 76, basealign 256, addrspace 5) 1216 ; CHECK-NEXT: [[C22:%[0-9]+]]:_(s32) = G_CONSTANT i32 80 1217 ; CHECK-NEXT: [[PTR_ADD22:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C22]](s32) 1218 ; CHECK-NEXT: G_STORE [[UV20]](s32), [[PTR_ADD22]](p5) :: (store (s32) into %stack.0 + 80, align 16, basealign 256, addrspace 5) 1219 ; CHECK-NEXT: [[C23:%[0-9]+]]:_(s32) = G_CONSTANT i32 84 1220 ; CHECK-NEXT: [[PTR_ADD23:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C23]](s32) 1221 ; CHECK-NEXT: G_STORE [[UV21]](s32), [[PTR_ADD23]](p5) :: (store (s32) into %stack.0 + 84, basealign 256, addrspace 5) 1222 ; CHECK-NEXT: [[C24:%[0-9]+]]:_(s32) = G_CONSTANT i32 88 1223 ; CHECK-NEXT: [[PTR_ADD24:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C24]](s32) 1224 ; CHECK-NEXT: G_STORE [[UV22]](s32), [[PTR_ADD24]](p5) :: (store (s32) into %stack.0 + 88, align 8, basealign 256, addrspace 5) 1225 ; CHECK-NEXT: [[C25:%[0-9]+]]:_(s32) = G_CONSTANT i32 92 1226 ; CHECK-NEXT: [[PTR_ADD25:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C25]](s32) 1227 ; CHECK-NEXT: G_STORE [[UV23]](s32), [[PTR_ADD25]](p5) :: (store (s32) into %stack.0 + 92, basealign 256, addrspace 5) 1228 ; CHECK-NEXT: [[C26:%[0-9]+]]:_(s32) = G_CONSTANT i32 96 1229 ; CHECK-NEXT: [[PTR_ADD26:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C26]](s32) 1230 ; CHECK-NEXT: G_STORE [[UV24]](s32), [[PTR_ADD26]](p5) :: (store (s32) into %stack.0 + 96, align 32, basealign 256, addrspace 5) 1231 ; CHECK-NEXT: [[C27:%[0-9]+]]:_(s32) = G_CONSTANT i32 100 1232 ; CHECK-NEXT: [[PTR_ADD27:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C27]](s32) 1233 ; CHECK-NEXT: G_STORE [[UV25]](s32), [[PTR_ADD27]](p5) :: (store (s32) into %stack.0 + 100, basealign 256, addrspace 5) 1234 ; CHECK-NEXT: [[C28:%[0-9]+]]:_(s32) = G_CONSTANT i32 104 1235 ; CHECK-NEXT: [[PTR_ADD28:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C28]](s32) 1236 ; CHECK-NEXT: G_STORE [[UV26]](s32), [[PTR_ADD28]](p5) :: (store (s32) into %stack.0 + 104, align 8, basealign 256, addrspace 5) 1237 ; CHECK-NEXT: [[C29:%[0-9]+]]:_(s32) = G_CONSTANT i32 108 1238 ; CHECK-NEXT: [[PTR_ADD29:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C29]](s32) 1239 ; CHECK-NEXT: G_STORE [[UV27]](s32), [[PTR_ADD29]](p5) :: (store (s32) into %stack.0 + 108, basealign 256, addrspace 5) 1240 ; CHECK-NEXT: [[C30:%[0-9]+]]:_(s32) = G_CONSTANT i32 112 1241 ; CHECK-NEXT: [[PTR_ADD30:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C30]](s32) 1242 ; CHECK-NEXT: G_STORE [[UV28]](s32), [[PTR_ADD30]](p5) :: (store (s32) into %stack.0 + 112, align 16, basealign 256, addrspace 5) 1243 ; CHECK-NEXT: [[C31:%[0-9]+]]:_(s32) = G_CONSTANT i32 116 1244 ; CHECK-NEXT: [[PTR_ADD31:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C31]](s32) 1245 ; CHECK-NEXT: G_STORE [[UV29]](s32), [[PTR_ADD31]](p5) :: (store (s32) into %stack.0 + 116, basealign 256, addrspace 5) 1246 ; CHECK-NEXT: [[C32:%[0-9]+]]:_(s32) = G_CONSTANT i32 120 1247 ; CHECK-NEXT: [[PTR_ADD32:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C32]](s32) 1248 ; CHECK-NEXT: G_STORE [[UV30]](s32), [[PTR_ADD32]](p5) :: (store (s32) into %stack.0 + 120, align 8, basealign 256, addrspace 5) 1249 ; CHECK-NEXT: [[C33:%[0-9]+]]:_(s32) = G_CONSTANT i32 124 1250 ; CHECK-NEXT: [[PTR_ADD33:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C33]](s32) 1251 ; CHECK-NEXT: G_STORE [[UV31]](s32), [[PTR_ADD33]](p5) :: (store (s32) into %stack.0 + 124, basealign 256, addrspace 5) 1252 ; CHECK-NEXT: [[C34:%[0-9]+]]:_(s32) = G_CONSTANT i32 128 1253 ; CHECK-NEXT: [[PTR_ADD34:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C34]](s32) 1254 ; CHECK-NEXT: G_STORE [[UV32]](s32), [[PTR_ADD34]](p5) :: (store (s32) into %stack.0 + 128, align 128, basealign 256, addrspace 5) 1255 ; CHECK-NEXT: [[C35:%[0-9]+]]:_(s32) = G_CONSTANT i32 132 1256 ; CHECK-NEXT: [[PTR_ADD35:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C35]](s32) 1257 ; CHECK-NEXT: G_STORE [[UV33]](s32), [[PTR_ADD35]](p5) :: (store (s32) into %stack.0 + 132, basealign 256, addrspace 5) 1258 ; CHECK-NEXT: [[C36:%[0-9]+]]:_(s32) = G_CONSTANT i32 136 1259 ; CHECK-NEXT: [[PTR_ADD36:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C36]](s32) 1260 ; CHECK-NEXT: G_STORE [[UV34]](s32), [[PTR_ADD36]](p5) :: (store (s32) into %stack.0 + 136, align 8, basealign 256, addrspace 5) 1261 ; CHECK-NEXT: [[C37:%[0-9]+]]:_(s32) = G_CONSTANT i32 140 1262 ; CHECK-NEXT: [[PTR_ADD37:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C37]](s32) 1263 ; CHECK-NEXT: G_STORE [[UV35]](s32), [[PTR_ADD37]](p5) :: (store (s32) into %stack.0 + 140, basealign 256, addrspace 5) 1264 ; CHECK-NEXT: [[C38:%[0-9]+]]:_(s32) = G_CONSTANT i32 144 1265 ; CHECK-NEXT: [[PTR_ADD38:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C38]](s32) 1266 ; CHECK-NEXT: G_STORE [[UV36]](s32), [[PTR_ADD38]](p5) :: (store (s32) into %stack.0 + 144, align 16, basealign 256, addrspace 5) 1267 ; CHECK-NEXT: [[C39:%[0-9]+]]:_(s32) = G_CONSTANT i32 148 1268 ; CHECK-NEXT: [[PTR_ADD39:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C39]](s32) 1269 ; CHECK-NEXT: G_STORE [[UV37]](s32), [[PTR_ADD39]](p5) :: (store (s32) into %stack.0 + 148, basealign 256, addrspace 5) 1270 ; CHECK-NEXT: [[C40:%[0-9]+]]:_(s32) = G_CONSTANT i32 152 1271 ; CHECK-NEXT: [[PTR_ADD40:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C40]](s32) 1272 ; CHECK-NEXT: G_STORE [[UV38]](s32), [[PTR_ADD40]](p5) :: (store (s32) into %stack.0 + 152, align 8, basealign 256, addrspace 5) 1273 ; CHECK-NEXT: [[C41:%[0-9]+]]:_(s32) = G_CONSTANT i32 156 1274 ; CHECK-NEXT: [[PTR_ADD41:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C41]](s32) 1275 ; CHECK-NEXT: G_STORE [[UV39]](s32), [[PTR_ADD41]](p5) :: (store (s32) into %stack.0 + 156, basealign 256, addrspace 5) 1276 ; CHECK-NEXT: [[C42:%[0-9]+]]:_(s32) = G_CONSTANT i32 160 1277 ; CHECK-NEXT: [[PTR_ADD42:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C42]](s32) 1278 ; CHECK-NEXT: G_STORE [[UV40]](s32), [[PTR_ADD42]](p5) :: (store (s32) into %stack.0 + 160, align 32, basealign 256, addrspace 5) 1279 ; CHECK-NEXT: [[C43:%[0-9]+]]:_(s32) = G_CONSTANT i32 164 1280 ; CHECK-NEXT: [[PTR_ADD43:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C43]](s32) 1281 ; CHECK-NEXT: G_STORE [[UV41]](s32), [[PTR_ADD43]](p5) :: (store (s32) into %stack.0 + 164, basealign 256, addrspace 5) 1282 ; CHECK-NEXT: [[C44:%[0-9]+]]:_(s32) = G_CONSTANT i32 168 1283 ; CHECK-NEXT: [[PTR_ADD44:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C44]](s32) 1284 ; CHECK-NEXT: G_STORE [[UV42]](s32), [[PTR_ADD44]](p5) :: (store (s32) into %stack.0 + 168, align 8, basealign 256, addrspace 5) 1285 ; CHECK-NEXT: [[C45:%[0-9]+]]:_(s32) = G_CONSTANT i32 172 1286 ; CHECK-NEXT: [[PTR_ADD45:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C45]](s32) 1287 ; CHECK-NEXT: G_STORE [[UV43]](s32), [[PTR_ADD45]](p5) :: (store (s32) into %stack.0 + 172, basealign 256, addrspace 5) 1288 ; CHECK-NEXT: [[C46:%[0-9]+]]:_(s32) = G_CONSTANT i32 176 1289 ; CHECK-NEXT: [[PTR_ADD46:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C46]](s32) 1290 ; CHECK-NEXT: G_STORE [[UV44]](s32), [[PTR_ADD46]](p5) :: (store (s32) into %stack.0 + 176, align 16, basealign 256, addrspace 5) 1291 ; CHECK-NEXT: [[C47:%[0-9]+]]:_(s32) = G_CONSTANT i32 180 1292 ; CHECK-NEXT: [[PTR_ADD47:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C47]](s32) 1293 ; CHECK-NEXT: G_STORE [[UV45]](s32), [[PTR_ADD47]](p5) :: (store (s32) into %stack.0 + 180, basealign 256, addrspace 5) 1294 ; CHECK-NEXT: [[C48:%[0-9]+]]:_(s32) = G_CONSTANT i32 184 1295 ; CHECK-NEXT: [[PTR_ADD48:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C48]](s32) 1296 ; CHECK-NEXT: G_STORE [[UV46]](s32), [[PTR_ADD48]](p5) :: (store (s32) into %stack.0 + 184, align 8, basealign 256, addrspace 5) 1297 ; CHECK-NEXT: [[C49:%[0-9]+]]:_(s32) = G_CONSTANT i32 188 1298 ; CHECK-NEXT: [[PTR_ADD49:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C49]](s32) 1299 ; CHECK-NEXT: G_STORE [[UV47]](s32), [[PTR_ADD49]](p5) :: (store (s32) into %stack.0 + 188, basealign 256, addrspace 5) 1300 ; CHECK-NEXT: [[C50:%[0-9]+]]:_(s32) = G_CONSTANT i32 192 1301 ; CHECK-NEXT: [[PTR_ADD50:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C50]](s32) 1302 ; CHECK-NEXT: G_STORE [[UV48]](s32), [[PTR_ADD50]](p5) :: (store (s32) into %stack.0 + 192, align 64, basealign 256, addrspace 5) 1303 ; CHECK-NEXT: [[C51:%[0-9]+]]:_(s32) = G_CONSTANT i32 196 1304 ; CHECK-NEXT: [[PTR_ADD51:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C51]](s32) 1305 ; CHECK-NEXT: G_STORE [[UV49]](s32), [[PTR_ADD51]](p5) :: (store (s32) into %stack.0 + 196, basealign 256, addrspace 5) 1306 ; CHECK-NEXT: [[C52:%[0-9]+]]:_(s32) = G_CONSTANT i32 200 1307 ; CHECK-NEXT: [[PTR_ADD52:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C52]](s32) 1308 ; CHECK-NEXT: G_STORE [[UV50]](s32), [[PTR_ADD52]](p5) :: (store (s32) into %stack.0 + 200, align 8, basealign 256, addrspace 5) 1309 ; CHECK-NEXT: [[C53:%[0-9]+]]:_(s32) = G_CONSTANT i32 204 1310 ; CHECK-NEXT: [[PTR_ADD53:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C53]](s32) 1311 ; CHECK-NEXT: G_STORE [[UV51]](s32), [[PTR_ADD53]](p5) :: (store (s32) into %stack.0 + 204, basealign 256, addrspace 5) 1312 ; CHECK-NEXT: [[C54:%[0-9]+]]:_(s32) = G_CONSTANT i32 208 1313 ; CHECK-NEXT: [[PTR_ADD54:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C54]](s32) 1314 ; CHECK-NEXT: G_STORE [[UV52]](s32), [[PTR_ADD54]](p5) :: (store (s32) into %stack.0 + 208, align 16, basealign 256, addrspace 5) 1315 ; CHECK-NEXT: [[C55:%[0-9]+]]:_(s32) = G_CONSTANT i32 212 1316 ; CHECK-NEXT: [[PTR_ADD55:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C55]](s32) 1317 ; CHECK-NEXT: G_STORE [[UV53]](s32), [[PTR_ADD55]](p5) :: (store (s32) into %stack.0 + 212, basealign 256, addrspace 5) 1318 ; CHECK-NEXT: [[C56:%[0-9]+]]:_(s32) = G_CONSTANT i32 216 1319 ; CHECK-NEXT: [[PTR_ADD56:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C56]](s32) 1320 ; CHECK-NEXT: G_STORE [[UV54]](s32), [[PTR_ADD56]](p5) :: (store (s32) into %stack.0 + 216, align 8, basealign 256, addrspace 5) 1321 ; CHECK-NEXT: [[C57:%[0-9]+]]:_(s32) = G_CONSTANT i32 220 1322 ; CHECK-NEXT: [[PTR_ADD57:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C57]](s32) 1323 ; CHECK-NEXT: G_STORE [[UV55]](s32), [[PTR_ADD57]](p5) :: (store (s32) into %stack.0 + 220, basealign 256, addrspace 5) 1324 ; CHECK-NEXT: [[C58:%[0-9]+]]:_(s32) = G_CONSTANT i32 224 1325 ; CHECK-NEXT: [[PTR_ADD58:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C58]](s32) 1326 ; CHECK-NEXT: G_STORE [[UV56]](s32), [[PTR_ADD58]](p5) :: (store (s32) into %stack.0 + 224, align 32, basealign 256, addrspace 5) 1327 ; CHECK-NEXT: [[C59:%[0-9]+]]:_(s32) = G_CONSTANT i32 228 1328 ; CHECK-NEXT: [[PTR_ADD59:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C59]](s32) 1329 ; CHECK-NEXT: G_STORE [[UV57]](s32), [[PTR_ADD59]](p5) :: (store (s32) into %stack.0 + 228, basealign 256, addrspace 5) 1330 ; CHECK-NEXT: [[C60:%[0-9]+]]:_(s32) = G_CONSTANT i32 232 1331 ; CHECK-NEXT: [[PTR_ADD60:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C60]](s32) 1332 ; CHECK-NEXT: G_STORE [[UV58]](s32), [[PTR_ADD60]](p5) :: (store (s32) into %stack.0 + 232, align 8, basealign 256, addrspace 5) 1333 ; CHECK-NEXT: [[C61:%[0-9]+]]:_(s32) = G_CONSTANT i32 236 1334 ; CHECK-NEXT: [[PTR_ADD61:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C61]](s32) 1335 ; CHECK-NEXT: G_STORE [[UV59]](s32), [[PTR_ADD61]](p5) :: (store (s32) into %stack.0 + 236, basealign 256, addrspace 5) 1336 ; CHECK-NEXT: [[C62:%[0-9]+]]:_(s32) = G_CONSTANT i32 240 1337 ; CHECK-NEXT: [[PTR_ADD62:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C62]](s32) 1338 ; CHECK-NEXT: G_STORE [[UV60]](s32), [[PTR_ADD62]](p5) :: (store (s32) into %stack.0 + 240, align 16, basealign 256, addrspace 5) 1339 ; CHECK-NEXT: [[C63:%[0-9]+]]:_(s32) = G_CONSTANT i32 244 1340 ; CHECK-NEXT: [[PTR_ADD63:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C63]](s32) 1341 ; CHECK-NEXT: G_STORE [[UV61]](s32), [[PTR_ADD63]](p5) :: (store (s32) into %stack.0 + 244, basealign 256, addrspace 5) 1342 ; CHECK-NEXT: [[C64:%[0-9]+]]:_(s32) = G_CONSTANT i32 248 1343 ; CHECK-NEXT: [[PTR_ADD64:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C64]](s32) 1344 ; CHECK-NEXT: G_STORE [[UV62]](s32), [[PTR_ADD64]](p5) :: (store (s32) into %stack.0 + 248, align 8, basealign 256, addrspace 5) 1345 ; CHECK-NEXT: [[C65:%[0-9]+]]:_(s32) = G_CONSTANT i32 252 1346 ; CHECK-NEXT: [[PTR_ADD65:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[C65]](s32) 1347 ; CHECK-NEXT: G_STORE [[UV63]](s32), [[PTR_ADD65]](p5) :: (store (s32) into %stack.0 + 252, basealign 256, addrspace 5) 1348 ; CHECK-NEXT: [[C66:%[0-9]+]]:_(s32) = G_CONSTANT i32 63 1349 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C66]] 1350 ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[AND]], [[C3]] 1351 ; CHECK-NEXT: [[PTR_ADD66:%[0-9]+]]:_(p5) = G_PTR_ADD [[FRAME_INDEX]], [[MUL]](s32) 1352 ; CHECK-NEXT: [[LOAD4:%[0-9]+]]:_(s32) = G_LOAD [[PTR_ADD66]](p5) :: (load (s32), addrspace 5) 1353 ; CHECK-NEXT: S_ENDPGM 0, implicit [[LOAD4]](s32) 1354 %0:_(p1) = COPY $sgpr0_sgpr1 1355 %1:_(s32) = COPY $sgpr2 1356 %2:_(<64 x s32>) = G_LOAD %0 :: (load (<64 x s32>), align 4, addrspace 4) 1357 %3:_(s32) = G_EXTRACT_VECTOR_ELT %2, %1 1358 S_ENDPGM 0, implicit %3 1359... 1360 1361--- 1362name: extract_vector_elt_v32s1_varidx_i32 1363 1364body: | 1365 bb.0: 1366 liveins: $vgpr0, $vgpr1 1367 1368 ; CHECK-LABEL: name: extract_vector_elt_v32s1_varidx_i32 1369 ; CHECK: liveins: $vgpr0, $vgpr1 1370 ; CHECK-NEXT: {{ $}} 1371 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 1372 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 1373 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31 1374 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 1375 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 1376 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32) 1377 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[SHL]](s32) 1378 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR]](s32) 1379 %0:_(s32) = COPY $vgpr0 1380 %1:_(s32) = COPY $vgpr1 1381 %2:_(<32 x s1>) = G_BITCAST %0 1382 %3:_(s1) = G_EXTRACT_VECTOR_ELT %2, %1 1383 %4:_(s32) = G_ANYEXT %3 1384 $vgpr0 = COPY %4 1385... 1386 1387--- 1388name: extract_vector_elt_v12s8_varidx_s32 1389 1390body: | 1391 bb.0: 1392 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 1393 ; CHECK-LABEL: name: extract_vector_elt_v12s8_varidx_s32 1394 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 1395 ; CHECK-NEXT: {{ $}} 1396 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 1397 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3 1398 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 1399 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32) 1400 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<3 x s32>), [[LSHR]](s32) 1401 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 1402 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 1403 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32) 1404 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[EVEC]], [[SHL]](s32) 1405 ; CHECK-NEXT: $vgpr0 = COPY [[LSHR1]](s32) 1406 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 1407 %1:_(<12 x s8>) = G_BITCAST %0 1408 %2:_(s32) = COPY $vgpr3 1409 %3:_(s8) = G_EXTRACT_VECTOR_ELT %1, %2 1410 %4:_(s32) = G_ANYEXT %3 1411 $vgpr0 = COPY %4 1412... 1413 1414--- 1415name: extract_vector_elt_v3s8_varidx_s32 1416 1417body: | 1418 bb.0: 1419 liveins: $vgpr0, $vgpr1 1420 ; CHECK-LABEL: name: extract_vector_elt_v3s8_varidx_s32 1421 ; CHECK: liveins: $vgpr0, $vgpr1 1422 ; CHECK-NEXT: {{ $}} 1423 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 1424 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 1425 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1426 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32) 1427 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1428 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C1]](s32) 1429 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[LSHR]](s32), [[LSHR1]](s32) 1430 ; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<3 x s32>), [[COPY1]](s32) 1431 ; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32) 1432 %0:_(s32) = COPY $vgpr0 1433 %1:_(s32) = COPY $vgpr1 1434 %2:_(s24) = G_TRUNC %0 1435 %3:_(<3 x s8>) = G_BITCAST %2 1436 %4:_(s8) = G_EXTRACT_VECTOR_ELT %3, %1 1437 %5:_(s32) = G_ANYEXT %4 1438 $vgpr0 = COPY %5 1439... 1440