1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck %s 3 4--- 5name: test_anyext_s32_to_s64 6body: | 7 bb.0: 8 liveins: $vgpr0 9 10 ; CHECK-LABEL: name: test_anyext_s32_to_s64 11 ; CHECK: liveins: $vgpr0 12 ; CHECK-NEXT: {{ $}} 13 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 14 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY]](s32) 15 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 16 %0:_(s32) = COPY $vgpr0 17 %1:_(s64) = G_ANYEXT %0 18 $vgpr0_vgpr1 = COPY %1 19... 20 21--- 22name: test_anyext_s16_to_s64 23body: | 24 bb.0: 25 liveins: $vgpr0 26 27 ; CHECK-LABEL: name: test_anyext_s16_to_s64 28 ; CHECK: liveins: $vgpr0 29 ; CHECK-NEXT: {{ $}} 30 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 31 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY]](s32) 32 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[ANYEXT]](s64) 33 %0:_(s32) = COPY $vgpr0 34 %1:_(s16) = G_TRUNC %0 35 %2:_(s64) = G_ANYEXT %1 36 $vgpr0_vgpr1 = COPY %2 37... 38 39--- 40name: test_anyext_s16_to_s32 41body: | 42 bb.0: 43 liveins: $vgpr0 44 45 ; CHECK-LABEL: name: test_anyext_s16_to_s32 46 ; CHECK: liveins: $vgpr0 47 ; CHECK-NEXT: {{ $}} 48 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 49 ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32) 50 %0:_(s32) = COPY $vgpr0 51 %1:_(s16) = G_TRUNC %0 52 %2:_(s32) = G_ANYEXT %1 53 $vgpr0 = COPY %2 54... 55 56--- 57name: test_anyext_s24_to_s32 58body: | 59 bb.0: 60 liveins: $vgpr0 61 62 ; CHECK-LABEL: name: test_anyext_s24_to_s32 63 ; CHECK: liveins: $vgpr0 64 ; CHECK-NEXT: {{ $}} 65 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 66 ; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32) 67 %0:_(s32) = COPY $vgpr0 68 %1:_(s24) = G_TRUNC %0 69 %2:_(s32) = G_ANYEXT %1 70 $vgpr0 = COPY %2 71... 72 73--- 74name: test_anyext_s1_to_s32 75body: | 76 bb.0: 77 78 ; CHECK-LABEL: name: test_anyext_s1_to_s32 79 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 80 ; CHECK-NEXT: $vgpr0 = COPY [[C]](s32) 81 %0:_(s1) = G_CONSTANT i1 0 82 %1:_(s32) = G_ANYEXT %0 83 $vgpr0 = COPY %1 84... 85 86--- 87name: test_anyext_s1_to_s64 88body: | 89 bb.0: 90 91 ; CHECK-LABEL: name: test_anyext_s1_to_s64 92 ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 93 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[C]](s64) 94 %0:_(s1) = G_CONSTANT i1 0 95 %1:_(s64) = G_ANYEXT %0 96 $vgpr0_vgpr1 = COPY %1 97... 98 99--- 100name: test_anyext_v2s16_to_v2s32 101body: | 102 bb.0: 103 liveins: $vgpr0 104 105 ; CHECK-LABEL: name: test_anyext_v2s16_to_v2s32 106 ; CHECK: liveins: $vgpr0 107 ; CHECK-NEXT: {{ $}} 108 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 109 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 110 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 111 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 112 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[BITCAST]](s32), [[LSHR]](s32) 113 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 114 %0:_(<2 x s16>) = COPY $vgpr0 115 %1:_(<2 x s32>) = G_ANYEXT %0 116 $vgpr0_vgpr1 = COPY %1 117... 118 119--- 120name: test_anyext_v3s16_to_v3s32 121body: | 122 bb.0: 123 liveins: $vgpr0_vgpr1 124 125 ; CHECK-LABEL: name: test_anyext_v3s16_to_v3s32 126 ; CHECK: liveins: $vgpr0_vgpr1 127 ; CHECK-NEXT: {{ $}} 128 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 129 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 130 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 131 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 132 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 133 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 134 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[BITCAST]](s32), [[LSHR]](s32), [[BITCAST1]](s32) 135 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 136 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 137 %1:_(<3 x s16>) = G_EXTRACT %0, 0 138 %2:_(<3 x s32>) = G_ANYEXT %1 139 $vgpr0_vgpr1_vgpr2 = COPY %2 140... 141 142--- 143name: test_anyext_v4s16_to_v4s32 144body: | 145 bb.0: 146 liveins: $vgpr0 147 148 ; CHECK-LABEL: name: test_anyext_v4s16_to_v4s32 149 ; CHECK: liveins: $vgpr0 150 ; CHECK-NEXT: {{ $}} 151 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s32>) = G_IMPLICIT_DEF 152 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[DEF]](<4 x s32>) 153 %0:_(<4 x s16>) = G_IMPLICIT_DEF 154 %1:_(<4 x s32>) = G_ANYEXT %0 155 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 156... 157 158--- 159name: test_anyext_v2s32_to_v2s64 160body: | 161 bb.0: 162 liveins: $vgpr0_vgpr1 163 164 ; CHECK-LABEL: name: test_anyext_v2s32_to_v2s64 165 ; CHECK: liveins: $vgpr0_vgpr1 166 ; CHECK-NEXT: {{ $}} 167 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 168 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) 169 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UV]](s32) 170 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[UV1]](s32) 171 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[ANYEXT]](s64), [[ANYEXT1]](s64) 172 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) 173 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 174 %1:_(<2 x s64>) = G_ANYEXT %0 175 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 176... 177 178--- 179name: test_anyext_v3s32_to_v3s64 180body: | 181 bb.0: 182 liveins: $vgpr0_vgpr1_vgpr2 183 184 ; CHECK-LABEL: name: test_anyext_v3s32_to_v3s64 185 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2 186 ; CHECK-NEXT: {{ $}} 187 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 188 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 189 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UV]](s32) 190 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[UV1]](s32) 191 ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s64) = G_ANYEXT [[UV2]](s32) 192 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s64>) = G_BUILD_VECTOR [[ANYEXT]](s64), [[ANYEXT1]](s64), [[ANYEXT2]](s64) 193 ; CHECK-NEXT: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s64>) 194 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 195 %1:_(<3 x s64>) = G_ANYEXT %0 196 S_NOP 0, implicit %1 197 198... 199 200--- 201name: test_anyext_v4s32_to_v4s64 202body: | 203 bb.0: 204 liveins: $vgpr0_vgpr1_vgpr2_vgpr3 205 206 ; CHECK-LABEL: name: test_anyext_v4s32_to_v4s64 207 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3 208 ; CHECK-NEXT: {{ $}} 209 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 210 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 211 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[UV]](s32) 212 ; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[UV1]](s32) 213 ; CHECK-NEXT: [[ANYEXT2:%[0-9]+]]:_(s64) = G_ANYEXT [[UV2]](s32) 214 ; CHECK-NEXT: [[ANYEXT3:%[0-9]+]]:_(s64) = G_ANYEXT [[UV3]](s32) 215 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s64>) = G_BUILD_VECTOR [[ANYEXT]](s64), [[ANYEXT1]](s64), [[ANYEXT2]](s64), [[ANYEXT3]](s64) 216 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<4 x s64>) 217 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 218 %1:_(<4 x s64>) = G_ANYEXT %0 219 $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY %1 220... 221 222--- 223name: test_anyext_s8_to_s16 224body: | 225 bb.0: 226 liveins: $vgpr0 227 228 ; CHECK-LABEL: name: test_anyext_s8_to_s16 229 ; CHECK: liveins: $vgpr0 230 ; CHECK-NEXT: {{ $}} 231 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 232 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 233 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s16) 234 %0:_(s32) = COPY $vgpr0 235 %1:_(s8) = G_TRUNC %0 236 %2:_(s16) = G_ANYEXT %1 237 S_ENDPGM 0, implicit %2 238... 239 240--- 241name: test_anyext_s8_to_s24 242body: | 243 bb.0: 244 liveins: $vgpr0 245 246 ; CHECK-LABEL: name: test_anyext_s8_to_s24 247 ; CHECK: liveins: $vgpr0 248 ; CHECK-NEXT: {{ $}} 249 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 250 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s24) = G_TRUNC [[COPY]](s32) 251 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s24) 252 %0:_(s32) = COPY $vgpr0 253 %1:_(s8) = G_TRUNC %0 254 %2:_(s24) = G_ANYEXT %1 255 S_ENDPGM 0, implicit %2 256... 257 258--- 259name: test_anyext_s7_to_s32 260body: | 261 bb.0: 262 liveins: $vgpr0 263 264 ; CHECK-LABEL: name: test_anyext_s7_to_s32 265 ; CHECK: liveins: $vgpr0 266 ; CHECK-NEXT: {{ $}} 267 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 268 ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY]](s32) 269 %0:_(s32) = COPY $vgpr0 270 %1:_(s7) = G_TRUNC %0 271 %2:_(s32) = G_ANYEXT %1 272 S_ENDPGM 0, implicit %2 273... 274 275--- 276name: test_anyext_s8_to_s32 277body: | 278 bb.0: 279 liveins: $vgpr0 280 281 ; CHECK-LABEL: name: test_anyext_s8_to_s32 282 ; CHECK: liveins: $vgpr0 283 ; CHECK-NEXT: {{ $}} 284 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 285 ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY]](s32) 286 %0:_(s32) = COPY $vgpr0 287 %1:_(s8) = G_TRUNC %0 288 %2:_(s32) = G_ANYEXT %1 289 S_ENDPGM 0, implicit %2 290... 291 292--- 293name: test_anyext_s32_to_s96 294body: | 295 bb.0: 296 liveins: $vgpr0 297 298 ; CHECK-LABEL: name: test_anyext_s32_to_s96 299 ; CHECK: liveins: $vgpr0 300 ; CHECK-NEXT: {{ $}} 301 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 302 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 303 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 304 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 305 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s192) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64) 306 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s96) = G_TRUNC [[MV1]](s192) 307 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s96) 308 %0:_(s32) = COPY $vgpr0 309 %1:_(s96) = G_ANYEXT %0 310 S_ENDPGM 0, implicit %1 311... 312 313--- 314name: test_anyext_s32_to_s128 315body: | 316 bb.0: 317 liveins: $vgpr0 318 319 ; CHECK-LABEL: name: test_anyext_s32_to_s128 320 ; CHECK: liveins: $vgpr0 321 ; CHECK-NEXT: {{ $}} 322 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 323 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 324 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 325 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 326 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64) 327 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV1]](s128) 328 %0:_(s32) = COPY $vgpr0 329 %1:_(s128) = G_ANYEXT %0 330 S_ENDPGM 0, implicit %1 331... 332 333--- 334name: test_anyext_s32_to_s160 335body: | 336 bb.0: 337 liveins: $vgpr0 338 339 ; CHECK-LABEL: name: test_anyext_s32_to_s160 340 ; CHECK: liveins: $vgpr0 341 ; CHECK-NEXT: {{ $}} 342 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 343 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 344 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 345 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 346 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s320) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64) 347 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s160) = G_TRUNC [[MV1]](s320) 348 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s160) 349 %0:_(s32) = COPY $vgpr0 350 %1:_(s160) = G_ANYEXT %0 351 S_ENDPGM 0, implicit %1 352... 353 354--- 355name: test_anyext_s32_to_s192 356body: | 357 bb.0: 358 liveins: $vgpr0 359 360 ; CHECK-LABEL: name: test_anyext_s32_to_s192 361 ; CHECK: liveins: $vgpr0 362 ; CHECK-NEXT: {{ $}} 363 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 364 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 365 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 366 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 367 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s192) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64) 368 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV1]](s192) 369 %0:_(s32) = COPY $vgpr0 370 %1:_(s192) = G_ANYEXT %0 371 S_ENDPGM 0, implicit %1 372... 373 374--- 375name: test_anyext_s32_to_s224 376body: | 377 bb.0: 378 liveins: $vgpr0 379 380 ; CHECK-LABEL: name: test_anyext_s32_to_s224 381 ; CHECK: liveins: $vgpr0 382 ; CHECK-NEXT: {{ $}} 383 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 384 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 385 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 386 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 387 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s448) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64) 388 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[MV1]](s448) 389 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s224) 390 %0:_(s32) = COPY $vgpr0 391 %1:_(s224) = G_ANYEXT %0 392 S_ENDPGM 0, implicit %1 393... 394 395--- 396name: test_anyext_s32_to_s256 397body: | 398 bb.0: 399 liveins: $vgpr0 400 401 ; CHECK-LABEL: name: test_anyext_s32_to_s256 402 ; CHECK: liveins: $vgpr0 403 ; CHECK-NEXT: {{ $}} 404 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 405 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 406 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 407 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 408 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64) 409 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV1]](s256) 410 %0:_(s32) = COPY $vgpr0 411 %1:_(s256) = G_ANYEXT %0 412 S_ENDPGM 0, implicit %1 413... 414 415--- 416name: test_anyext_s32_to_s512 417body: | 418 bb.0: 419 liveins: $vgpr0 420 421 ; CHECK-LABEL: name: test_anyext_s32_to_s512 422 ; CHECK: liveins: $vgpr0 423 ; CHECK-NEXT: {{ $}} 424 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 425 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 426 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 427 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 428 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s512) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64) 429 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV1]](s512) 430 %0:_(s32) = COPY $vgpr0 431 %1:_(s512) = G_ANYEXT %0 432 S_ENDPGM 0, implicit %1 433... 434 435--- 436name: test_anyext_s32_to_s992 437body: | 438 bb.0: 439 liveins: $vgpr0 440 441 ; CHECK-LABEL: name: test_anyext_s32_to_s992 442 ; CHECK: liveins: $vgpr0 443 ; CHECK-NEXT: {{ $}} 444 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 445 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 446 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 447 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 448 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s448) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64) 449 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s224) = G_TRUNC [[MV1]](s448) 450 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s224) 451 %0:_(s32) = COPY $vgpr0 452 %1:_(s224) = G_ANYEXT %0 453 S_ENDPGM 0, implicit %1 454... 455 456--- 457name: test_anyext_s32_to_s1024 458body: | 459 bb.0: 460 liveins: $vgpr0 461 462 ; CHECK-LABEL: name: test_anyext_s32_to_s1024 463 ; CHECK: liveins: $vgpr0 464 ; CHECK-NEXT: {{ $}} 465 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 466 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 467 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[DEF]](s32) 468 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 469 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64) 470 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV1]](s1024) 471 %0:_(s32) = COPY $vgpr0 472 %1:_(s1024) = G_ANYEXT %0 473 S_ENDPGM 0, implicit %1 474... 475 476--- 477name: test_anyext_s64_to_s128 478body: | 479 bb.0: 480 liveins: $vgpr0_vgpr1 481 482 ; CHECK-LABEL: name: test_anyext_s64_to_s128 483 ; CHECK: liveins: $vgpr0_vgpr1 484 ; CHECK-NEXT: {{ $}} 485 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 486 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 487 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[COPY]](s64), [[DEF]](s64) 488 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s128) 489 %0:_(s64) = COPY $vgpr0_vgpr1 490 %1:_(s128) = G_ANYEXT %0 491 S_ENDPGM 0, implicit %1 492... 493 494--- 495name: test_anyext_s64_to_s192 496body: | 497 bb.0: 498 liveins: $vgpr0_vgpr1 499 500 ; CHECK-LABEL: name: test_anyext_s64_to_s192 501 ; CHECK: liveins: $vgpr0_vgpr1 502 ; CHECK-NEXT: {{ $}} 503 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 504 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 505 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s192) = G_MERGE_VALUES [[COPY]](s64), [[DEF]](s64), [[DEF]](s64) 506 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s192) 507 %0:_(s64) = COPY $vgpr0_vgpr1 508 %1:_(s192) = G_ANYEXT %0 509 S_ENDPGM 0, implicit %1 510... 511 512--- 513name: test_anyext_s64_to_s256 514body: | 515 bb.0: 516 liveins: $vgpr0_vgpr1 517 518 ; CHECK-LABEL: name: test_anyext_s64_to_s256 519 ; CHECK: liveins: $vgpr0_vgpr1 520 ; CHECK-NEXT: {{ $}} 521 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 522 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 523 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[COPY]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64) 524 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s256) 525 %0:_(s64) = COPY $vgpr0_vgpr1 526 %1:_(s256) = G_ANYEXT %0 527 S_ENDPGM 0, implicit %1 528... 529 530--- 531name: test_anyext_s64_to_s512 532body: | 533 bb.0: 534 liveins: $vgpr0_vgpr1 535 536 ; CHECK-LABEL: name: test_anyext_s64_to_s512 537 ; CHECK: liveins: $vgpr0_vgpr1 538 ; CHECK-NEXT: {{ $}} 539 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 540 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 541 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s512) = G_MERGE_VALUES [[COPY]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64) 542 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s512) 543 %0:_(s64) = COPY $vgpr0_vgpr1 544 %1:_(s512) = G_ANYEXT %0 545 S_ENDPGM 0, implicit %1 546... 547 548--- 549name: test_anyext_s64_to_s1024 550body: | 551 bb.0: 552 liveins: $vgpr0_vgpr1 553 554 ; CHECK-LABEL: name: test_anyext_s64_to_s1024 555 ; CHECK: liveins: $vgpr0_vgpr1 556 ; CHECK-NEXT: {{ $}} 557 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 558 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 559 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s1024) = G_MERGE_VALUES [[COPY]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64) 560 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s1024) 561 %0:_(s64) = COPY $vgpr0_vgpr1 562 %1:_(s1024) = G_ANYEXT %0 563 S_ENDPGM 0, implicit %1 564... 565 566--- 567name: test_anyext_s96_to_s128 568body: | 569 bb.0: 570 liveins: $vgpr0_vgpr1_vgpr2 571 572 ; CHECK-LABEL: name: test_anyext_s96_to_s128 573 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2 574 ; CHECK-NEXT: {{ $}} 575 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s96) = COPY $vgpr0_vgpr1_vgpr2 576 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s96) 577 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 578 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV]](s32), [[UV1]](s32) 579 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[UV2]](s32), [[DEF]](s32) 580 ; CHECK-NEXT: [[MV2:%[0-9]+]]:_(s128) = G_MERGE_VALUES [[MV]](s64), [[MV1]](s64) 581 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV2]](s128) 582 %0:_(s96) = COPY $vgpr0_vgpr1_vgpr2 583 %1:_(s128) = G_ANYEXT %0 584 S_ENDPGM 0, implicit %1 585... 586 587--- 588name: test_anyext_s128_to_s256 589body: | 590 bb.0: 591 liveins: $vgpr0_vgpr1_vgpr2_vgpr3 592 593 ; CHECK-LABEL: name: test_anyext_s128_to_s256 594 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3 595 ; CHECK-NEXT: {{ $}} 596 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 597 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](s128) 598 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 599 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s256) = G_MERGE_VALUES [[UV]](s64), [[UV1]](s64), [[DEF]](s64), [[DEF]](s64) 600 ; CHECK-NEXT: S_ENDPGM 0, implicit [[MV]](s256) 601 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 602 %1:_(s256) = G_ANYEXT %0 603 S_ENDPGM 0, implicit %1 604... 605 606--- 607name: test_anyext_s32_to_s88 608body: | 609 bb.0: 610 liveins: $vgpr0 611 612 ; CHECK-LABEL: name: test_anyext_s32_to_s88 613 ; CHECK: liveins: $vgpr0 614 ; CHECK-NEXT: {{ $}} 615 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 616 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 617 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32) 618 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 619 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C1]](s32) 620 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 621 ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C2]](s32) 622 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s32) = G_IMPLICIT_DEF 623 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 624 ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 625 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C3]] 626 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) 627 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s16) = G_AND [[TRUNC1]], [[C3]] 628 ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s16) = G_CONSTANT i16 8 629 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s16) = G_SHL [[AND1]], [[C4]](s16) 630 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s16) = G_OR [[AND]], [[SHL]] 631 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR1]](s32) 632 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s16) = G_AND [[TRUNC2]], [[C3]] 633 ; CHECK-NEXT: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR2]](s32) 634 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s16) = G_SHL [[TRUNC3]], [[C4]](s16) 635 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s16) = G_OR [[AND2]], [[SHL1]] 636 ; CHECK-NEXT: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[DEF]](s32) 637 ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s16) = G_AND [[TRUNC4]], [[C3]] 638 ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s16) = G_SHL [[AND3]], [[C4]](s16) 639 ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s16) = G_OR [[AND3]], [[SHL2]] 640 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY [[OR2]](s16) 641 ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[OR]](s16) 642 ; CHECK-NEXT: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[OR1]](s16) 643 ; CHECK-NEXT: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C1]](s32) 644 ; CHECK-NEXT: [[OR3:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL3]] 645 ; CHECK-NEXT: [[ZEXT2:%[0-9]+]]:_(s32) = G_ZEXT [[OR2]](s16) 646 ; CHECK-NEXT: [[ZEXT3:%[0-9]+]]:_(s32) = G_ZEXT [[COPY1]](s16) 647 ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[ZEXT3]], [[C1]](s32) 648 ; CHECK-NEXT: [[OR4:%[0-9]+]]:_(s32) = G_OR [[ZEXT2]], [[SHL4]] 649 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR3]](s32), [[OR4]](s32) 650 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 651 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s704) = G_MERGE_VALUES [[MV]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64), [[DEF1]](s64) 652 ; CHECK-NEXT: [[TRUNC5:%[0-9]+]]:_(s88) = G_TRUNC [[MV1]](s704) 653 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC5]](s88) 654 %0:_(s32) = COPY $vgpr0 655 %1:_(s88) = G_ANYEXT %0 656 S_ENDPGM 0, implicit %1 657... 658 659# The instruction count blows up for this and takes too long to 660# generate checks. This fails on a G_MERGE_VALUES to s4160 661# 662# --- 663# name: test_anyext_s32_to_s65 664# body: | 665# bb.0: 666# liveins: $vgpr0 667 668# %0:_(s32) = COPY $vgpr0 669# %1:_(s65) = G_ANYEXT %0 670# S_ENDPGM 0, implicit %1 671# ... 672 673--- 674name: test_anyext_s2_to_s112 675body: | 676 bb.0: 677 liveins: $vgpr0 678 679 ; CHECK-LABEL: name: test_anyext_s2_to_s112 680 ; CHECK: liveins: $vgpr0 681 ; CHECK-NEXT: {{ $}} 682 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 683 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 684 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32) 685 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 686 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]] 687 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 688 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 689 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 690 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[C2]], [[C]](s32) 691 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[C2]], [[SHL1]] 692 ; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[OR]](s32), [[OR1]](s32) 693 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF 694 ; CHECK-NEXT: [[MV1:%[0-9]+]]:_(s448) = G_MERGE_VALUES [[MV]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64), [[DEF]](s64) 695 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s112) = G_TRUNC [[MV1]](s448) 696 ; CHECK-NEXT: S_ENDPGM 0, implicit [[TRUNC]](s112) 697 %0:_(s32) = COPY $vgpr0 698 %1:_(s2) = G_TRUNC %0 699 %2:_(s112) = G_ANYEXT %1 700 S_ENDPGM 0, implicit %2 701... 702 703--- 704name: test_anyext_s112_to_s128 705body: | 706 bb.0: 707 liveins: $vgpr0_vgpr1_vgpr2_vgpr3 708 ; CHECK-LABEL: name: test_anyext_s112_to_s128 709 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3 710 ; CHECK-NEXT: {{ $}} 711 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 712 ; CHECK-NEXT: S_ENDPGM 0, implicit [[COPY]](s128) 713 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 714 %1:_(s112) = G_TRUNC %0 715 %2:_(s128) = G_ANYEXT %1 716 S_ENDPGM 0, implicit %2 717... 718