1; RUN: llc -mtriple=amdgcn -mcpu=fiji -O0 -stop-after=irtranslator -global-isel %s -o - | FileCheck %s 2 3; Check flags are preserved for a regular instruction. 4; CHECK-LABEL: name: fadd_nnan 5; CHECK: nnan G_FADD 6define amdgpu_kernel void @fadd_nnan(float %arg0, float %arg1) { 7 %res = fadd nnan float %arg0, %arg1 8 store float %res, ptr addrspace(1) undef 9 ret void 10} 11 12; Check flags are preserved for a specially handled intrinsic 13; CHECK-LABEL: name: fma_fast 14; CHECK: nnan ninf nsz arcp contract afn reassoc G_FMA 15define amdgpu_kernel void @fma_fast(float %arg0, float %arg1, float %arg2) { 16 %res = call fast float @llvm.fma.f32(float %arg0, float %arg1, float %arg2) 17 store float %res, ptr addrspace(1) undef 18 ret void 19} 20 21; Check flags are preserved for an arbitrarry target intrinsic 22; CHECK-LABEL: name: rcp_nsz 23; CHECK: = nsz G_INTRINSIC intrinsic(@llvm.amdgcn.rcp), %{{[0-9]+}}(s32) 24define amdgpu_kernel void @rcp_nsz(float %arg0) { 25 %res = call nsz float @llvm.amdgcn.rcp.f32 (float %arg0) 26 store float %res, ptr addrspace(1) undef 27 ret void 28} 29 30declare float @llvm.fma.f32(float, float, float) 31declare float @llvm.amdgcn.rcp.f32(float) 32