xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umax.mir (revision 9e9907f1cfa424366fba58d9520f9305b537cec9) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s
3# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s
4# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s
5
6---
7name: umax_s32_ss
8legalized: true
9regBankSelected: true
10
11body: |
12  bb.0:
13    liveins: $sgpr0, $sgpr1
14    ; GCN-LABEL: name: umax_s32_ss
15    ; GCN: liveins: $sgpr0, $sgpr1
16    ; GCN-NEXT: {{  $}}
17    ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
18    ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
19    ; GCN-NEXT: [[S_MAX_U32_:%[0-9]+]]:sreg_32 = S_MAX_U32 [[COPY]], [[COPY1]], implicit-def dead $scc
20    ; GCN-NEXT: S_ENDPGM 0, implicit [[S_MAX_U32_]]
21    %0:sgpr(s32) = COPY $sgpr0
22    %1:sgpr(s32) = COPY $sgpr1
23    %2:sgpr(s32) = G_UMAX %0, %1
24    S_ENDPGM 0, implicit %2
25...
26
27---
28name: umax_s32_sv
29legalized: true
30regBankSelected: true
31
32body: |
33  bb.0:
34    liveins: $sgpr0, $vgpr0
35    ; GCN-LABEL: name: umax_s32_sv
36    ; GCN: liveins: $sgpr0, $vgpr0
37    ; GCN-NEXT: {{  $}}
38    ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
39    ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
40    ; GCN-NEXT: [[V_MAX_U32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_U32_e64 [[COPY]], [[COPY1]], implicit $exec
41    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MAX_U32_e64_]]
42    %0:sgpr(s32) = COPY $sgpr0
43    %1:vgpr(s32) = COPY $vgpr0
44    %2:vgpr(s32) = G_UMAX %0, %1
45    S_ENDPGM 0, implicit %2
46...
47
48---
49name: umax_s32_vs
50legalized: true
51regBankSelected: true
52
53body: |
54  bb.0:
55    liveins: $sgpr0, $vgpr0
56    ; GCN-LABEL: name: umax_s32_vs
57    ; GCN: liveins: $sgpr0, $vgpr0
58    ; GCN-NEXT: {{  $}}
59    ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
60    ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
61    ; GCN-NEXT: [[V_MAX_U32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_U32_e64 [[COPY]], [[COPY1]], implicit $exec
62    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MAX_U32_e64_]]
63    %0:vgpr(s32) = COPY $vgpr0
64    %1:sgpr(s32) = COPY $sgpr0
65    %2:vgpr(s32) = G_UMAX %0, %1
66    S_ENDPGM 0, implicit %2
67...
68
69---
70name: umax_s32_vv
71legalized: true
72regBankSelected: true
73
74body: |
75  bb.0:
76    liveins: $vgpr0, $vgpr1
77    ; GCN-LABEL: name: umax_s32_vv
78    ; GCN: liveins: $vgpr0, $vgpr1
79    ; GCN-NEXT: {{  $}}
80    ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
81    ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
82    ; GCN-NEXT: [[V_MAX_U32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_U32_e64 [[COPY]], [[COPY1]], implicit $exec
83    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MAX_U32_e64_]]
84    %0:vgpr(s32) = COPY $vgpr0
85    %1:vgpr(s32) = COPY $vgpr1
86    %2:vgpr(s32) = G_UMAX %0, %1
87    S_ENDPGM 0, implicit %2
88...
89