1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=GCN 3 4--- 5name: g_phi_s32_ss_sbranch 6legalized: true 7regBankSelected: true 8tracksRegLiveness: true 9machineFunctionInfo: {} 10body: | 11 ; GCN-LABEL: name: g_phi_s32_ss_sbranch 12 ; GCN: bb.0: 13 ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 14 ; GCN-NEXT: liveins: $sgpr0, $sgpr1, $sgpr2 15 ; GCN-NEXT: {{ $}} 16 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 17 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 18 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 19 ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 20 ; GCN-NEXT: S_CMP_EQ_U32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 21 ; GCN-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc 22 ; GCN-NEXT: $scc = COPY [[COPY3]] 23 ; GCN-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc 24 ; GCN-NEXT: S_BRANCH %bb.2 25 ; GCN-NEXT: {{ $}} 26 ; GCN-NEXT: bb.1: 27 ; GCN-NEXT: successors: %bb.2(0x80000000) 28 ; GCN-NEXT: {{ $}} 29 ; GCN-NEXT: S_BRANCH %bb.2 30 ; GCN-NEXT: {{ $}} 31 ; GCN-NEXT: bb.2: 32 ; GCN-NEXT: [[PHI:%[0-9]+]]:sreg_32 = PHI [[COPY]], %bb.0, [[COPY1]], %bb.1 33 ; GCN-NEXT: $sgpr0 = COPY [[PHI]] 34 ; GCN-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31 35 bb.0: 36 liveins: $sgpr0, $sgpr1, $sgpr2 37 38 %0:sgpr(s32) = COPY $sgpr0 39 %1:sgpr(s32) = COPY $sgpr1 40 %2:sgpr(s32) = COPY $sgpr2 41 %3:sgpr(s32) = G_CONSTANT i32 0 42 %4:sgpr(s32) = G_ICMP intpred(eq), %2(s32), %3 43 G_BRCOND %4, %bb.1 44 G_BR %bb.2 45 46 bb.1: 47 %5:sgpr(s32) = COPY %1 48 G_BR %bb.2 49 50 bb.2: 51 %6:sgpr(s32) = G_PHI %0(s32), %bb.0, %5(s32), %bb.1 52 $sgpr0 = COPY %6 53 S_SETPC_B64 undef $sgpr30_sgpr31 54 55... 56 57--- 58name: g_phi_s32_vv_sbranch 59legalized: true 60regBankSelected: true 61tracksRegLiveness: true 62machineFunctionInfo: {} 63body: | 64 ; GCN-LABEL: name: g_phi_s32_vv_sbranch 65 ; GCN: bb.0: 66 ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 67 ; GCN-NEXT: liveins: $vgpr0, $vgpr1, $sgpr2 68 ; GCN-NEXT: {{ $}} 69 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 70 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 71 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 72 ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 73 ; GCN-NEXT: S_CMP_EQ_U32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 74 ; GCN-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc 75 ; GCN-NEXT: $scc = COPY [[COPY3]] 76 ; GCN-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc 77 ; GCN-NEXT: S_BRANCH %bb.2 78 ; GCN-NEXT: {{ $}} 79 ; GCN-NEXT: bb.1: 80 ; GCN-NEXT: successors: %bb.2(0x80000000) 81 ; GCN-NEXT: {{ $}} 82 ; GCN-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[COPY1]] 83 ; GCN-NEXT: S_BRANCH %bb.2 84 ; GCN-NEXT: {{ $}} 85 ; GCN-NEXT: bb.2: 86 ; GCN-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.0, [[COPY4]], %bb.1 87 ; GCN-NEXT: $vgpr0 = COPY [[PHI]] 88 ; GCN-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31 89 bb.0: 90 liveins: $vgpr0, $vgpr1, $sgpr2 91 92 %0:vgpr(s32) = COPY $vgpr0 93 %1:vgpr(s32) = COPY $vgpr1 94 %2:sgpr(s32) = COPY $sgpr2 95 %3:sgpr(s32) = G_CONSTANT i32 0 96 %4:sgpr(s32) = G_ICMP intpred(eq), %2(s32), %3 97 G_BRCOND %4, %bb.1 98 G_BR %bb.2 99 100 bb.1: 101 %5:sgpr(s32) = COPY %1 102 G_BR %bb.2 103 104 bb.2: 105 %6:vgpr(s32) = G_PHI %0(s32), %bb.0, %5(s32), %bb.1 106 $vgpr0 = COPY %6(s32) 107 S_SETPC_B64 undef $sgpr30_sgpr31 108 109... 110 111--- 112name: g_phi_s32_sv_sbranch 113legalized: true 114regBankSelected: true 115tracksRegLiveness: true 116machineFunctionInfo: {} 117body: | 118 ; GCN-LABEL: name: g_phi_s32_sv_sbranch 119 ; GCN: bb.0: 120 ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 121 ; GCN-NEXT: liveins: $sgpr0, $vgpr0, $sgpr1, $sgpr2 122 ; GCN-NEXT: {{ $}} 123 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 124 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0 125 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 126 ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 127 ; GCN-NEXT: S_CMP_EQ_U32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 128 ; GCN-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc 129 ; GCN-NEXT: $scc = COPY [[COPY3]] 130 ; GCN-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc 131 ; GCN-NEXT: S_BRANCH %bb.2 132 ; GCN-NEXT: {{ $}} 133 ; GCN-NEXT: bb.1: 134 ; GCN-NEXT: successors: %bb.2(0x80000000) 135 ; GCN-NEXT: {{ $}} 136 ; GCN-NEXT: S_BRANCH %bb.2 137 ; GCN-NEXT: {{ $}} 138 ; GCN-NEXT: bb.2: 139 ; GCN-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.0, [[COPY1]], %bb.1 140 ; GCN-NEXT: $vgpr0 = COPY [[PHI]] 141 ; GCN-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31 142 bb.0: 143 liveins: $sgpr0, $vgpr0, $sgpr1, $sgpr2 144 145 %0:sgpr(s32) = COPY $sgpr0 146 %1:vgpr(s32) = COPY $vgpr0 147 %2:sgpr(s32) = COPY $sgpr2 148 %3:sgpr(s32) = G_CONSTANT i32 0 149 %4:sgpr(s32) = G_ICMP intpred(eq), %2(s32), %3 150 G_BRCOND %4, %bb.1 151 G_BR %bb.2 152 153 bb.1: 154 %5:vgpr(s32) = COPY %1 155 G_BR %bb.2 156 157 bb.2: 158 %6:vgpr(s32) = G_PHI %0(s32), %bb.0, %5(s32), %bb.1 159 $vgpr0 = COPY %6 160 S_SETPC_B64 undef $sgpr30_sgpr31 161 162... 163 164--- 165name: g_phi_s32_vs_sbranch 166legalized: true 167regBankSelected: true 168tracksRegLiveness: true 169machineFunctionInfo: {} 170body: | 171 ; GCN-LABEL: name: g_phi_s32_vs_sbranch 172 ; GCN: bb.0: 173 ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 174 ; GCN-NEXT: liveins: $sgpr0, $vgpr0, $sgpr1 175 ; GCN-NEXT: {{ $}} 176 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 177 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0 178 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr1 179 ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 180 ; GCN-NEXT: S_CMP_EQ_U32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 181 ; GCN-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc 182 ; GCN-NEXT: $scc = COPY [[COPY3]] 183 ; GCN-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc 184 ; GCN-NEXT: S_BRANCH %bb.2 185 ; GCN-NEXT: {{ $}} 186 ; GCN-NEXT: bb.1: 187 ; GCN-NEXT: successors: %bb.2(0x80000000) 188 ; GCN-NEXT: {{ $}} 189 ; GCN-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY1]] 190 ; GCN-NEXT: S_BRANCH %bb.2 191 ; GCN-NEXT: {{ $}} 192 ; GCN-NEXT: bb.2: 193 ; GCN-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.0, [[COPY4]], %bb.1 194 ; GCN-NEXT: $vgpr0 = COPY [[PHI]] 195 ; GCN-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31 196 bb.0: 197 liveins: $sgpr0, $vgpr0, $sgpr1 198 199 %0:vgpr(s32) = COPY $vgpr0 200 %1:sgpr(s32) = COPY $sgpr0 201 %2:sgpr(s32) = COPY $sgpr1 202 %3:sgpr(s32) = G_CONSTANT i32 0 203 %4:sgpr(s32) = G_ICMP intpred(eq), %2(s32), %3 204 G_BRCOND %4, %bb.1 205 G_BR %bb.2 206 207 bb.1: 208 %5:vgpr(s32) = COPY %1 209 G_BR %bb.2 210 211 bb.2: 212 %6:vgpr(s32) = G_PHI %0(s32), %bb.0, %5(s32), %bb.1 213 $vgpr0 = COPY %6 214 S_SETPC_B64 undef $sgpr30_sgpr31 215 216... 217 218--- 219name: g_phi_s64_ss_sbranch 220legalized: true 221regBankSelected: true 222tracksRegLiveness: true 223machineFunctionInfo: {} 224body: | 225 ; GCN-LABEL: name: g_phi_s64_ss_sbranch 226 ; GCN: bb.0: 227 ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 228 ; GCN-NEXT: liveins: $sgpr0_sgpr1, $sgpr2_sgpr3, $sgpr4 229 ; GCN-NEXT: {{ $}} 230 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1 231 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr2_sgpr3 232 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 233 ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 234 ; GCN-NEXT: S_CMP_EQ_U32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 235 ; GCN-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc 236 ; GCN-NEXT: $scc = COPY [[COPY3]] 237 ; GCN-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc 238 ; GCN-NEXT: S_BRANCH %bb.2 239 ; GCN-NEXT: {{ $}} 240 ; GCN-NEXT: bb.1: 241 ; GCN-NEXT: successors: %bb.2(0x80000000) 242 ; GCN-NEXT: {{ $}} 243 ; GCN-NEXT: S_BRANCH %bb.2 244 ; GCN-NEXT: {{ $}} 245 ; GCN-NEXT: bb.2: 246 ; GCN-NEXT: [[PHI:%[0-9]+]]:sreg_64 = PHI [[COPY]], %bb.0, [[COPY1]], %bb.1 247 ; GCN-NEXT: $sgpr0_sgpr1 = COPY [[PHI]] 248 ; GCN-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31 249 bb.0: 250 liveins: $sgpr0_sgpr1, $sgpr2_sgpr3, $sgpr4 251 252 %0:sgpr(s64) = COPY $sgpr0_sgpr1 253 %1:sgpr(s64) = COPY $sgpr2_sgpr3 254 %2:sgpr(s32) = COPY $sgpr4 255 %3:sgpr(s32) = G_CONSTANT i32 0 256 %4:sgpr(s32) = G_ICMP intpred(eq), %2(s32), %3 257 G_BRCOND %4, %bb.1 258 G_BR %bb.2 259 260 bb.1: 261 %5:sgpr(s64) = COPY %1 262 G_BR %bb.2 263 264 bb.2: 265 %6:sgpr(s64) = G_PHI %0(s64), %bb.0, %5(s64), %bb.1 266 $sgpr0_sgpr1 = COPY %6 267 S_SETPC_B64 undef $sgpr30_sgpr31 268 269... 270--- 271name: g_phi_v2s16_vv_sbranch 272legalized: true 273regBankSelected: true 274tracksRegLiveness: true 275machineFunctionInfo: {} 276body: | 277 ; GCN-LABEL: name: g_phi_v2s16_vv_sbranch 278 ; GCN: bb.0: 279 ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 280 ; GCN-NEXT: liveins: $vgpr0, $vgpr1, $sgpr2 281 ; GCN-NEXT: {{ $}} 282 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 283 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 284 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 285 ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 286 ; GCN-NEXT: S_CMP_EQ_U32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 287 ; GCN-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc 288 ; GCN-NEXT: $scc = COPY [[COPY3]] 289 ; GCN-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc 290 ; GCN-NEXT: S_BRANCH %bb.2 291 ; GCN-NEXT: {{ $}} 292 ; GCN-NEXT: bb.1: 293 ; GCN-NEXT: successors: %bb.2(0x80000000) 294 ; GCN-NEXT: {{ $}} 295 ; GCN-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[COPY1]] 296 ; GCN-NEXT: S_BRANCH %bb.2 297 ; GCN-NEXT: {{ $}} 298 ; GCN-NEXT: bb.2: 299 ; GCN-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.0, [[COPY4]], %bb.1 300 ; GCN-NEXT: $vgpr0 = COPY [[PHI]] 301 ; GCN-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31 302 bb.0: 303 liveins: $vgpr0, $vgpr1, $sgpr2 304 305 %0:vgpr(<2 x s16>) = COPY $vgpr0 306 %1:vgpr(<2 x s16>) = COPY $vgpr1 307 %2:sgpr(s32) = COPY $sgpr2 308 %3:sgpr(s32) = G_CONSTANT i32 0 309 %4:sgpr(s32) = G_ICMP intpred(eq), %2(s32), %3 310 G_BRCOND %4, %bb.1 311 G_BR %bb.2 312 313 bb.1: 314 %5:sgpr(<2 x s16>) = COPY %1 315 G_BR %bb.2 316 317 bb.2: 318 %6:vgpr(<2 x s16>) = G_PHI %0(<2 x s16>), %bb.0, %5(<2 x s16>), %bb.1 319 $vgpr0 = COPY %6 320 S_SETPC_B64 undef $sgpr30_sgpr31 321 322... 323 324--- 325name: phi_s32_ss_sbranch 326legalized: true 327regBankSelected: true 328tracksRegLiveness: true 329machineFunctionInfo: {} 330body: | 331 ; GCN-LABEL: name: phi_s32_ss_sbranch 332 ; GCN: bb.0: 333 ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 334 ; GCN-NEXT: liveins: $sgpr0, $sgpr1, $sgpr2 335 ; GCN-NEXT: {{ $}} 336 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 337 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 338 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 339 ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 340 ; GCN-NEXT: S_CMP_EQ_U32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 341 ; GCN-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc 342 ; GCN-NEXT: $scc = COPY [[COPY3]] 343 ; GCN-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc 344 ; GCN-NEXT: S_BRANCH %bb.2 345 ; GCN-NEXT: {{ $}} 346 ; GCN-NEXT: bb.1: 347 ; GCN-NEXT: successors: %bb.2(0x80000000) 348 ; GCN-NEXT: {{ $}} 349 ; GCN-NEXT: S_BRANCH %bb.2 350 ; GCN-NEXT: {{ $}} 351 ; GCN-NEXT: bb.2: 352 ; GCN-NEXT: [[PHI:%[0-9]+]]:sreg_32 = PHI [[COPY]], %bb.0, [[COPY1]], %bb.1 353 ; GCN-NEXT: $sgpr0 = COPY [[PHI]] 354 ; GCN-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31 355 bb.0: 356 liveins: $sgpr0, $sgpr1, $sgpr2 357 358 %0:sgpr(s32) = COPY $sgpr0 359 %1:sgpr(s32) = COPY $sgpr1 360 %2:sgpr(s32) = COPY $sgpr2 361 %3:sgpr(s32) = G_CONSTANT i32 0 362 %4:sgpr(s32) = G_ICMP intpred(eq), %2(s32), %3 363 G_BRCOND %4, %bb.1 364 G_BR %bb.2 365 366 bb.1: 367 %5:sgpr(s32) = COPY %1 368 G_BR %bb.2 369 370 bb.2: 371 %6:sgpr(s32) = G_PHI %0(s32), %bb.0, %5(s32), %bb.1 372 $sgpr0 = COPY %6(s32) 373 S_SETPC_B64 undef $sgpr30_sgpr31 374 375... 376 377--- 378name: phi_s32_vv_sbranch 379legalized: true 380regBankSelected: true 381tracksRegLiveness: true 382machineFunctionInfo: {} 383body: | 384 ; GCN-LABEL: name: phi_s32_vv_sbranch 385 ; GCN: bb.0: 386 ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 387 ; GCN-NEXT: liveins: $vgpr0, $vgpr1, $sgpr2 388 ; GCN-NEXT: {{ $}} 389 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 390 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 391 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 392 ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 393 ; GCN-NEXT: S_CMP_EQ_U32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 394 ; GCN-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc 395 ; GCN-NEXT: $scc = COPY [[COPY3]] 396 ; GCN-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc 397 ; GCN-NEXT: S_BRANCH %bb.2 398 ; GCN-NEXT: {{ $}} 399 ; GCN-NEXT: bb.1: 400 ; GCN-NEXT: successors: %bb.2(0x80000000) 401 ; GCN-NEXT: {{ $}} 402 ; GCN-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY [[COPY1]] 403 ; GCN-NEXT: S_BRANCH %bb.2 404 ; GCN-NEXT: {{ $}} 405 ; GCN-NEXT: bb.2: 406 ; GCN-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.0, [[COPY4]], %bb.1 407 ; GCN-NEXT: $vgpr0 = COPY [[PHI]] 408 ; GCN-NEXT: S_SETPC_B64 undef $sgpr30_sgpr31 409 bb.0: 410 liveins: $vgpr0, $vgpr1, $sgpr2 411 412 %0:vgpr(s32) = COPY $vgpr0 413 %1:vgpr(s32) = COPY $vgpr1 414 %2:sgpr(s32) = COPY $sgpr2 415 %3:sgpr(s32) = G_CONSTANT i32 0 416 %4:sgpr(s32) = G_ICMP intpred(eq), %2(s32), %3 417 G_BRCOND %4, %bb.1 418 G_BR %bb.2 419 420 bb.1: 421 %5:sgpr(s32) = COPY %1 422 G_BR %bb.2 423 424 bb.2: 425 %6:vgpr(s32) = G_PHI %0(s32), %bb.0, %5(s32), %bb.1 426 $vgpr0 = COPY %6 427 S_SETPC_B64 undef $sgpr30_sgpr31 428 429... 430