xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s64.mir (revision 9e9907f1cfa424366fba58d9520f9305b537cec9)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck %s
3
4---
5name: ffloor_s64_vv
6legalized: true
7regBankSelected: true
8tracksRegLiveness: true
9
10body: |
11  bb.0:
12    liveins: $vgpr0_vgpr1
13
14    ; CHECK-LABEL: name: ffloor_s64_vv
15    ; CHECK: liveins: $vgpr0_vgpr1
16    ; CHECK-NEXT: {{  $}}
17    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
18    ; CHECK-NEXT: %1:vreg_64 = nofpexcept V_FLOOR_F64_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
19    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY %1
20    %0:vgpr(s64) = COPY $vgpr0_vgpr1
21    %1:vgpr(s64) = G_FFLOOR %0
22    $vgpr0_vgpr1 = COPY %1
23...
24
25# FIXME: Constant bus restriction
26# ---
27# name: ffloor_s64_vs
28# legalized: true
29# regBankSelected: true
30# tracksRegLiveness: true
31
32# body: |
33#   bb.0:
34#     liveins: $sgpr0_sgpr1
35
36#     %0:sgpr(s64) = COPY $sgpr0_sgpr1
37#     %1:vgpr(s64) = G_FFLOOR %0
38#     $vgpr0_vgpr1 = COPY %1
39# ...
40
41---
42name: ffloor_fneg_s64_vv
43legalized: true
44regBankSelected: true
45tracksRegLiveness: true
46
47body: |
48  bb.0:
49    liveins: $vgpr0_vgpr1
50
51    ; CHECK-LABEL: name: ffloor_fneg_s64_vv
52    ; CHECK: liveins: $vgpr0_vgpr1
53    ; CHECK-NEXT: {{  $}}
54    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
55    ; CHECK-NEXT: %2:vreg_64 = nofpexcept V_FLOOR_F64_e64 1, [[COPY]], 0, 0, implicit $mode, implicit $exec
56    ; CHECK-NEXT: $vgpr0_vgpr1 = COPY %2
57    %0:vgpr(s64) = COPY $vgpr0_vgpr1
58    %1:vgpr(s64) = G_FNEG %0
59    %2:vgpr(s64) = G_FFLOOR %1
60    $vgpr0_vgpr1 = COPY %2
61...
62