xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-br.mir (revision 9e9907f1cfa424366fba58d9520f9305b537cec9) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=GCN
3
4---
5
6name:            br
7legalized:       true
8regBankSelected: true
9
10body: |
11  ; GCN-LABEL: name: br
12  ; GCN: bb.0:
13  ; GCN-NEXT:   successors: %bb.1(0x80000000)
14  ; GCN-NEXT: {{  $}}
15  ; GCN-NEXT:   S_BRANCH %bb.1
16  ; GCN-NEXT: {{  $}}
17  ; GCN-NEXT: bb.1:
18  bb.0:
19    G_BR %bb.1
20
21  bb.1:
22
23...
24