xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.sendmsg.mir (revision 9e9907f1cfa424366fba58d9520f9305b537cec9) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=GCN
3
4---
5name:            test_sendmsg
6legalized:       true
7regBankSelected: true
8tracksRegLiveness: true
9
10body:             |
11  bb.0:
12    liveins: $sgpr0
13
14    ; GCN-LABEL: name: test_sendmsg
15    ; GCN: liveins: $sgpr0
16    ; GCN-NEXT: {{  $}}
17    ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
18    ; GCN-NEXT: $m0 = COPY [[COPY]]
19    ; GCN-NEXT: S_SENDMSG 1, implicit $exec, implicit $m0
20    ; GCN-NEXT: S_ENDPGM 0
21    %0:sgpr(s32) = COPY $sgpr0
22    G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.s.sendmsg), 1, %0(s32)
23    S_ENDPGM 0
24
25...
26