xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pk.u16.mir (revision 9e9907f1cfa424366fba58d9520f9305b537cec9) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o -  | FileCheck -check-prefix=GCN %s
3# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o -  | FileCheck -check-prefix=GCN %s
4
5---
6name: cvt_pk_u16_vsv
7legalized: true
8regBankSelected: true
9tracksRegLiveness: true
10
11body: |
12  bb.0:
13    liveins: $sgpr0, $vgpr0
14    ; GCN-LABEL: name: cvt_pk_u16_vsv
15    ; GCN: liveins: $sgpr0, $vgpr0
16    ; GCN-NEXT: {{  $}}
17    ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
18    ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
19    ; GCN-NEXT: [[V_CVT_PK_U16_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_PK_U16_U32_e64 [[COPY]], [[COPY1]], implicit $exec
20    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_CVT_PK_U16_U32_e64_]]
21    %0:sgpr(s32) = COPY $sgpr0
22    %1:vgpr(s32) = COPY $vgpr0
23    %2:vgpr(<2 x s16>) = G_INTRINSIC intrinsic(@llvm.amdgcn.cvt.pk.u16), %0, %1
24    S_ENDPGM 0, implicit %2
25...
26
27---
28name: cvt_pk_u16_vvs
29legalized: true
30regBankSelected: true
31tracksRegLiveness: true
32
33body: |
34  bb.0:
35    liveins: $sgpr0, $vgpr0
36
37    ; GCN-LABEL: name: cvt_pk_u16_vvs
38    ; GCN: liveins: $sgpr0, $vgpr0
39    ; GCN-NEXT: {{  $}}
40    ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
41    ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
42    ; GCN-NEXT: [[V_CVT_PK_U16_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_PK_U16_U32_e64 [[COPY]], [[COPY1]], implicit $exec
43    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_CVT_PK_U16_U32_e64_]]
44    %0:vgpr(s32) = COPY $vgpr0
45    %1:sgpr(s32) = COPY $sgpr0
46    %2:vgpr(<2 x s16>) = G_INTRINSIC intrinsic(@llvm.amdgcn.cvt.pk.u16), %0, %1
47    S_ENDPGM 0, implicit %2
48...
49
50---
51name: cvt_pk_u16_vvv
52legalized: true
53regBankSelected: true
54tracksRegLiveness: true
55
56body: |
57  bb.0:
58    liveins: $vgpr0, $vgpr1
59    ; GCN-LABEL: name: cvt_pk_u16_vvv
60    ; GCN: liveins: $vgpr0, $vgpr1
61    ; GCN-NEXT: {{  $}}
62    ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
63    ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
64    ; GCN-NEXT: [[V_CVT_PK_U16_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_PK_U16_U32_e64 [[COPY]], [[COPY1]], implicit $exec
65    ; GCN-NEXT: S_ENDPGM 0, implicit [[V_CVT_PK_U16_U32_e64_]]
66    %0:vgpr(s32) = COPY $vgpr0
67    %1:vgpr(s32) = COPY $vgpr1
68    %2:vgpr(<2 x s16>) = G_INTRINSIC intrinsic(@llvm.amdgcn.cvt.pk.u16), %0, %1
69    S_ENDPGM 0, implicit %2
70...
71