1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -stop-after=legalizer < %s | FileCheck -check-prefix=GCN %s 3; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=hawaii -stop-after=legalizer < %s | FileCheck -check-prefix=GCN-PAL %s 4 5@external_constant = external addrspace(4) constant i32, align 4 6@external_constant32 = external addrspace(6) constant i32, align 4 7@external_global = external addrspace(1) global i32, align 4 8@external_other = external addrspace(999) global i32, align 4 9 10@internal_constant = internal addrspace(4) constant i32 9, align 4 11@internal_constant32 = internal addrspace(6) constant i32 9, align 4 12@internal_global = internal addrspace(1) global i32 9, align 4 13@internal_other = internal addrspace(999) global i32 9, align 4 14 15 16define ptr addrspace(4) @external_constant_got() { 17 18 ; GCN-LABEL: name: external_constant_got 19 ; GCN: bb.1 (%ir-block.0): 20 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_constant, target-flags(amdgpu-gotprel32-hi) @external_constant, implicit-def $scc 21 ; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p4) from got, addrspace 4) 22 ; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](p4) 23 ; GCN-NEXT: $vgpr0 = COPY [[UV]](s32) 24 ; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32) 25 ; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 26 ; 27 ; GCN-PAL-LABEL: name: external_constant_got 28 ; GCN-PAL: bb.1 (%ir-block.0): 29 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @external_constant 30 ; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @external_constant 31 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32) 32 ; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32) 33 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 34 ret ptr addrspace(4) @external_constant 35} 36 37define ptr addrspace(1) @external_global_got() { 38 39 ; GCN-LABEL: name: external_global_got 40 ; GCN: bb.1 (%ir-block.0): 41 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_global, target-flags(amdgpu-gotprel32-hi) @external_global, implicit-def $scc 42 ; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p1) from got, addrspace 4) 43 ; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](p1) 44 ; GCN-NEXT: $vgpr0 = COPY [[UV]](s32) 45 ; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32) 46 ; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 47 ; 48 ; GCN-PAL-LABEL: name: external_global_got 49 ; GCN-PAL: bb.1 (%ir-block.0): 50 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @external_global 51 ; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @external_global 52 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32) 53 ; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32) 54 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 55 ret ptr addrspace(1) @external_global 56} 57 58define ptr addrspace(999) @external_other_got() { 59 60 ; GCN-LABEL: name: external_other_got 61 ; GCN: bb.1 (%ir-block.0): 62 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_other, target-flags(amdgpu-gotprel32-hi) @external_other, implicit-def $scc 63 ; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p999) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p999) from got, addrspace 4) 64 ; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](p999) 65 ; GCN-NEXT: $vgpr0 = COPY [[UV]](s32) 66 ; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32) 67 ; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 68 ; 69 ; GCN-PAL-LABEL: name: external_other_got 70 ; GCN-PAL: bb.1 (%ir-block.0): 71 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @external_other 72 ; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @external_other 73 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32) 74 ; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32) 75 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 76 ret ptr addrspace(999) @external_other 77} 78 79define ptr addrspace(4) @internal_constant_pcrel() { 80 81 ; GCN-LABEL: name: internal_constant_pcrel 82 ; GCN: bb.1 (%ir-block.0): 83 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_constant, target-flags(amdgpu-rel32-hi) @internal_constant, implicit-def $scc 84 ; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SI_PC_ADD_REL_OFFSET]](p4) 85 ; GCN-NEXT: $vgpr0 = COPY [[UV]](s32) 86 ; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32) 87 ; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 88 ; 89 ; GCN-PAL-LABEL: name: internal_constant_pcrel 90 ; GCN-PAL: bb.1 (%ir-block.0): 91 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @internal_constant 92 ; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @internal_constant 93 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32) 94 ; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32) 95 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 96 ret ptr addrspace(4) @internal_constant 97} 98 99define ptr addrspace(1) @internal_global_pcrel() { 100 101 ; GCN-LABEL: name: internal_global_pcrel 102 ; GCN: bb.1 (%ir-block.0): 103 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p1) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_global, target-flags(amdgpu-rel32-hi) @internal_global, implicit-def $scc 104 ; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SI_PC_ADD_REL_OFFSET]](p1) 105 ; GCN-NEXT: $vgpr0 = COPY [[UV]](s32) 106 ; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32) 107 ; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 108 ; 109 ; GCN-PAL-LABEL: name: internal_global_pcrel 110 ; GCN-PAL: bb.1 (%ir-block.0): 111 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @internal_global 112 ; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @internal_global 113 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32) 114 ; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32) 115 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 116 ret ptr addrspace(1) @internal_global 117} 118 119define ptr addrspace(999) @internal_other_pcrel() { 120 121 ; GCN-LABEL: name: internal_other_pcrel 122 ; GCN: bb.1 (%ir-block.0): 123 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p999) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_other, target-flags(amdgpu-rel32-hi) @internal_other, implicit-def $scc 124 ; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SI_PC_ADD_REL_OFFSET]](p999) 125 ; GCN-NEXT: $vgpr0 = COPY [[UV]](s32) 126 ; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32) 127 ; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 128 ; 129 ; GCN-PAL-LABEL: name: internal_other_pcrel 130 ; GCN-PAL: bb.1 (%ir-block.0): 131 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @internal_other 132 ; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @internal_other 133 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32) 134 ; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32) 135 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 136 ret ptr addrspace(999) @internal_other 137} 138 139define ptr addrspace(6) @external_constant32_got() { 140 141 ; GCN-LABEL: name: external_constant32_got 142 ; GCN: bb.1 (%ir-block.0): 143 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_constant32, target-flags(amdgpu-gotprel32-hi) @external_constant32, implicit-def $scc 144 ; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p4) from got, addrspace 4) 145 ; GCN-NEXT: [[EXTRACT:%[0-9]+]]:_(p6) = G_EXTRACT [[LOAD]](p4), 0 146 ; GCN-NEXT: $vgpr0 = COPY [[EXTRACT]](p6) 147 ; GCN-NEXT: SI_RETURN implicit $vgpr0 148 ; 149 ; GCN-PAL-LABEL: name: external_constant32_got 150 ; GCN-PAL: bb.1 (%ir-block.0): 151 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(p6) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @external_constant32 152 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](p6) 153 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0 154 ret ptr addrspace(6) @external_constant32 155} 156 157define ptr addrspace(6) @internal_constant32_pcrel() { 158 159 ; GCN-LABEL: name: internal_constant32_pcrel 160 ; GCN: bb.1 (%ir-block.0): 161 ; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_constant32, target-flags(amdgpu-rel32-hi) @internal_constant32, implicit-def $scc 162 ; GCN-NEXT: [[EXTRACT:%[0-9]+]]:_(p6) = G_EXTRACT [[SI_PC_ADD_REL_OFFSET]](p4), 0 163 ; GCN-NEXT: $vgpr0 = COPY [[EXTRACT]](p6) 164 ; GCN-NEXT: SI_RETURN implicit $vgpr0 165 ; 166 ; GCN-PAL-LABEL: name: internal_constant32_pcrel 167 ; GCN-PAL: bb.1 (%ir-block.0): 168 ; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(p6) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @internal_constant32 169 ; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](p6) 170 ; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0 171 ret ptr addrspace(6) @internal_constant32 172} 173