xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll (revision fd3eaf76ba3392a4406247d996e757ef49f7a8b2)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -mattr=-xnack -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9 %s
3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX12 %s
4
5; Check lowering of some large extractelement that use the stack
6; instead of register indexing.
7
8define i32 @v_extract_v64i32_varidx(ptr addrspace(1) %ptr, i32 %idx) {
9; GFX9-LABEL: v_extract_v64i32_varidx:
10; GFX9:       ; %bb.0:
11; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12; GFX9-NEXT:    v_and_b32_e32 v2, 63, v2
13; GFX9-NEXT:    v_lshlrev_b32_e32 v2, 2, v2
14; GFX9-NEXT:    v_add_co_u32_e32 v0, vcc, v0, v2
15; GFX9-NEXT:    v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
16; GFX9-NEXT:    global_load_dword v0, v[0:1], off
17; GFX9-NEXT:    s_waitcnt vmcnt(0)
18; GFX9-NEXT:    s_setpc_b64 s[30:31]
19;
20; GFX12-LABEL: v_extract_v64i32_varidx:
21; GFX12:       ; %bb.0:
22; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
23; GFX12-NEXT:    s_wait_expcnt 0x0
24; GFX12-NEXT:    s_wait_samplecnt 0x0
25; GFX12-NEXT:    s_wait_bvhcnt 0x0
26; GFX12-NEXT:    s_wait_kmcnt 0x0
27; GFX12-NEXT:    v_and_b32_e32 v2, 63, v2
28; GFX12-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
29; GFX12-NEXT:    v_lshlrev_b32_e32 v2, 2, v2
30; GFX12-NEXT:    v_add_co_u32 v0, vcc_lo, v0, v2
31; GFX12-NEXT:    v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
32; GFX12-NEXT:    global_load_b32 v0, v[0:1], off
33; GFX12-NEXT:    s_wait_loadcnt 0x0
34; GFX12-NEXT:    s_setpc_b64 s[30:31]
35  %vec = load <64 x i32>, ptr addrspace(1) %ptr
36  %elt = extractelement <64 x i32> %vec, i32 %idx
37  ret i32 %elt
38}
39
40define i16 @v_extract_v128i16_varidx(ptr addrspace(1) %ptr, i32 %idx) {
41; GFX9-LABEL: v_extract_v128i16_varidx:
42; GFX9:       ; %bb.0:
43; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
44; GFX9-NEXT:    v_and_b32_e32 v2, 0x7f, v2
45; GFX9-NEXT:    v_lshlrev_b32_e32 v2, 1, v2
46; GFX9-NEXT:    v_add_co_u32_e32 v0, vcc, v0, v2
47; GFX9-NEXT:    v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
48; GFX9-NEXT:    global_load_ushort v0, v[0:1], off
49; GFX9-NEXT:    s_waitcnt vmcnt(0)
50; GFX9-NEXT:    s_setpc_b64 s[30:31]
51;
52; GFX12-LABEL: v_extract_v128i16_varidx:
53; GFX12:       ; %bb.0:
54; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
55; GFX12-NEXT:    s_wait_expcnt 0x0
56; GFX12-NEXT:    s_wait_samplecnt 0x0
57; GFX12-NEXT:    s_wait_bvhcnt 0x0
58; GFX12-NEXT:    s_wait_kmcnt 0x0
59; GFX12-NEXT:    v_and_b32_e32 v2, 0x7f, v2
60; GFX12-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
61; GFX12-NEXT:    v_lshlrev_b32_e32 v2, 1, v2
62; GFX12-NEXT:    v_add_co_u32 v0, vcc_lo, v0, v2
63; GFX12-NEXT:    v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
64; GFX12-NEXT:    global_load_u16 v0, v[0:1], off
65; GFX12-NEXT:    s_wait_loadcnt 0x0
66; GFX12-NEXT:    s_setpc_b64 s[30:31]
67  %vec = load <128 x i16>, ptr addrspace(1) %ptr
68  %elt = extractelement <128 x i16> %vec, i32 %idx
69  ret i16 %elt
70}
71
72define i64 @v_extract_v32i64_varidx(ptr addrspace(1) %ptr, i32 %idx) {
73; GFX9-LABEL: v_extract_v32i64_varidx:
74; GFX9:       ; %bb.0:
75; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
76; GFX9-NEXT:    v_and_b32_e32 v2, 31, v2
77; GFX9-NEXT:    v_lshlrev_b32_e32 v2, 3, v2
78; GFX9-NEXT:    v_add_co_u32_e32 v0, vcc, v0, v2
79; GFX9-NEXT:    v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
80; GFX9-NEXT:    global_load_dwordx2 v[0:1], v[0:1], off
81; GFX9-NEXT:    s_waitcnt vmcnt(0)
82; GFX9-NEXT:    s_setpc_b64 s[30:31]
83;
84; GFX12-LABEL: v_extract_v32i64_varidx:
85; GFX12:       ; %bb.0:
86; GFX12-NEXT:    s_wait_loadcnt_dscnt 0x0
87; GFX12-NEXT:    s_wait_expcnt 0x0
88; GFX12-NEXT:    s_wait_samplecnt 0x0
89; GFX12-NEXT:    s_wait_bvhcnt 0x0
90; GFX12-NEXT:    s_wait_kmcnt 0x0
91; GFX12-NEXT:    v_and_b32_e32 v2, 31, v2
92; GFX12-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
93; GFX12-NEXT:    v_lshlrev_b32_e32 v2, 3, v2
94; GFX12-NEXT:    v_add_co_u32 v0, vcc_lo, v0, v2
95; GFX12-NEXT:    v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
96; GFX12-NEXT:    global_load_b64 v[0:1], v[0:1], off
97; GFX12-NEXT:    s_wait_loadcnt 0x0
98; GFX12-NEXT:    s_setpc_b64 s[30:31]
99  %vec = load <32 x i64>, ptr addrspace(1) %ptr
100  %elt = extractelement <32 x i64> %vec, i32 %idx
101  ret i64 %elt
102}
103