xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll (revision 6548b6354d1d990e1c98736f5e7c3de876bedc8e)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -global-isel -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -o - %s | FileCheck %s
3
4; Make sure there's no crash at -O0 when matching MUBUF addressing
5; modes for the stack.
6
7define amdgpu_kernel void @stack_write_fi() {
8; CHECK-LABEL: stack_write_fi:
9; CHECK:       ; %bb.0: ; %entry
10; CHECK-NEXT:    s_add_u32 s0, s0, s17
11; CHECK-NEXT:    s_addc_u32 s1, s1, 0
12; CHECK-NEXT:    s_mov_b32 s5, 0
13; CHECK-NEXT:    s_mov_b32 s6, 0
14; CHECK-NEXT:    s_mov_b32 s4, 0
15; CHECK-NEXT:    v_mov_b32_e32 v0, s6
16; CHECK-NEXT:    v_mov_b32_e32 v1, s5
17; CHECK-NEXT:    buffer_store_dword v0, v1, s[0:3], 0 offen
18; CHECK-NEXT:    s_waitcnt vmcnt(0)
19; CHECK-NEXT:    v_mov_b32_e32 v0, s4
20; CHECK-NEXT:    buffer_store_dword v0, off, s[0:3], 0 offset:4
21; CHECK-NEXT:    s_waitcnt vmcnt(0)
22; CHECK-NEXT:    s_endpgm
23entry:
24  %alloca = alloca i64, align 4, addrspace(5)
25  store volatile i64 0, ptr addrspace(5) %alloca, align 4
26  ret void
27}
28
29!llvm.module.flags = !{!0}
30!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
31