1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=amdgpu-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s 3 4--- 5name: add_nullptr_shl_add 6tracksRegLiveness: true 7body: | 8 bb.0: 9 liveins: $sgpr0 10 11 ; CHECK-LABEL: name: add_nullptr_shl_add 12 ; CHECK: liveins: $sgpr0 13 ; CHECK-NEXT: {{ $}} 14 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $sgpr0 15 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 16 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32) 17 ; CHECK-NEXT: $vgpr0 = COPY [[SHL]](s32) 18 %0:_(s32) = COPY $sgpr0 19 %1:_(s32) = G_CONSTANT i32 3 20 %2:_(s32) = G_SHL %0, %1(s32) 21 %3:_(p3) = G_CONSTANT i32 0 22 %4:_(p3) = G_PTR_ADD %3, %2(s32) 23 %5:_(s32) = G_PTRTOINT %4(p3) 24 $vgpr0 = COPY %5(s32) 25 26... 27 28--- 29name: add_nullptr_mul_add 30tracksRegLiveness: true 31body: | 32 bb.0: 33 liveins: $vgpr0, $vgpr1 34 35 ; CHECK-LABEL: name: add_nullptr_mul_add 36 ; CHECK: liveins: $vgpr0, $vgpr1 37 ; CHECK-NEXT: {{ $}} 38 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 39 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 40 ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY]], [[COPY1]] 41 ; CHECK-NEXT: $vgpr0 = COPY [[MUL]](s32) 42 %0:_(s32) = COPY $vgpr0 43 %1:_(s32) = COPY $vgpr1 44 %2:_(p3) = G_CONSTANT i32 0 45 %3:_(s32) = G_MUL %0:_, %1:_ 46 %4:_(p3) = G_PTR_ADD %2:_, %3:_(s32) 47 %5:_(s32) = G_PTRTOINT %4:_(p3) 48 $vgpr0 = COPY %5:_(s32) 49 50... 51 52--- 53name: add_nullptr_vec_all_zero 54tracksRegLiveness: true 55body: | 56 bb.0: 57 liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3 58 59 ; CHECK-LABEL: name: add_nullptr_vec_all_zero 60 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2, $vgpr3 61 ; CHECK-NEXT: {{ $}} 62 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 63 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 64 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr3 65 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[COPY2]](s32) 66 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(<2 x s32>) = G_SHL [[COPY]], [[BUILD_VECTOR]](<2 x s32>) 67 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[SHL]](<2 x s32>) 68 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 69 %1:_(s32) = COPY $vgpr2 70 %2:_(s32) = COPY $vgpr3 71 %3:_(<2 x s32>) = G_BUILD_VECTOR %1:_(s32), %2:_(s32) 72 %4:_(<2 x s32>) = G_SHL %0, %3(<2 x s32>) 73 %5:_(p3) = G_CONSTANT i32 0 74 %6:_(<2 x p3>) = G_BUILD_VECTOR %5:_(p3), %5:_(p3) 75 %7:_(<2 x p3>) = G_PTR_ADD %6, %4(<2 x s32>) 76 %8:_(<2 x s32>) = G_PTRTOINT %7(<2 x p3>) 77 $vgpr0_vgpr1 = COPY %8(<2 x s32>) 78 79... 80