xref: /llvm-project/llvm/test/CodeGen/AArch64/vector-lrint.ll (revision 109ede496ecf6de5dabace08d73ec7604b343a6b) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=aarch64 -mattr=+neon |\
3; RUN:   FileCheck %s --check-prefixes=CHECK-i32
4; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=aarch64 -mattr=+neon |\
5; RUN:   FileCheck %s --check-prefixes=CHECK-i64,CHECK-i64-SD
6; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=aarch64 -mattr=+neon \
7; RUN:   -global-isel -global-isel-abort=2 2>&1 |\
8; RUN:   FileCheck %s --check-prefixes=CHECK-i32,CHECK-i32-GI
9; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=aarch64 -mattr=+neon \
10; RUN:   -global-isel -global-isel-abort=2 2>&1 |\
11; RUN:   FileCheck %s --check-prefixes=CHECK-i64,CHECK-i64-GI
12
13; CHECK-i32-GI:       warning: Instruction selection used fallback path for lrint_v1f16
14; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v2f16
15; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v4f16
16; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v8f16
17; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v16f16
18; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v32f16
19; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v1f32
20; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v2f32
21; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v4f32
22; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v8f32
23; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v16f32
24; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v32f32
25; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v1f64
26; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v2f64
27; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v4f64
28; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v8f64
29; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v16f64
30; CHECK-i32-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v32f64
31
32; CHECK-i64-GI:       warning: Instruction selection used fallback path for lrint_v2f16
33; CHECK-i64-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v4f16
34; CHECK-i64-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v8f16
35; CHECK-i64-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v16f16
36; CHECK-i64-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v32f16
37; CHECK-i64-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v2f32
38; CHECK-i64-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v4f32
39; CHECK-i64-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v8f32
40; CHECK-i64-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v16f32
41; CHECK-i64-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v32f32
42; CHECK-i64-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v2f64
43; CHECK-i64-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v4f64
44; CHECK-i64-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v8f64
45; CHECK-i64-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v16f64
46; CHECK-i64-GI-NEXT:  warning: Instruction selection used fallback path for lrint_v32f64
47
48define <1 x iXLen> @lrint_v1f16(<1 x half> %x) {
49; CHECK-i32-LABEL: lrint_v1f16:
50; CHECK-i32:       // %bb.0:
51; CHECK-i32-NEXT:    fcvt s0, h0
52; CHECK-i32-NEXT:    frintx s0, s0
53; CHECK-i32-NEXT:    fcvtzs w8, s0
54; CHECK-i32-NEXT:    fmov s0, w8
55; CHECK-i32-NEXT:    ret
56;
57; CHECK-i64-LABEL: lrint_v1f16:
58; CHECK-i64:       // %bb.0:
59; CHECK-i64-NEXT:    fcvt s0, h0
60; CHECK-i64-NEXT:    frintx s0, s0
61; CHECK-i64-NEXT:    fcvtzs x8, s0
62; CHECK-i64-NEXT:    fmov d0, x8
63; CHECK-i64-NEXT:    ret
64  %a = call <1 x iXLen> @llvm.lrint.v1iXLen.v1f16(<1 x half> %x)
65  ret <1 x iXLen> %a
66}
67declare <1 x iXLen> @llvm.lrint.v1iXLen.v1f16(<1 x half>)
68
69define <2 x iXLen> @lrint_v2f16(<2 x half> %x) {
70; CHECK-i32-LABEL: lrint_v2f16:
71; CHECK-i32:       // %bb.0:
72; CHECK-i32-NEXT:    // kill: def $d0 killed $d0 def $q0
73; CHECK-i32-NEXT:    mov h1, v0.h[1]
74; CHECK-i32-NEXT:    fcvt s0, h0
75; CHECK-i32-NEXT:    fcvt s1, h1
76; CHECK-i32-NEXT:    frintx s0, s0
77; CHECK-i32-NEXT:    frintx s1, s1
78; CHECK-i32-NEXT:    fcvtzs w8, s0
79; CHECK-i32-NEXT:    fcvtzs w9, s1
80; CHECK-i32-NEXT:    fmov s0, w8
81; CHECK-i32-NEXT:    mov v0.s[1], w9
82; CHECK-i32-NEXT:    // kill: def $d0 killed $d0 killed $q0
83; CHECK-i32-NEXT:    ret
84;
85; CHECK-i64-LABEL: lrint_v2f16:
86; CHECK-i64:       // %bb.0:
87; CHECK-i64-NEXT:    // kill: def $d0 killed $d0 def $q0
88; CHECK-i64-NEXT:    mov h1, v0.h[1]
89; CHECK-i64-NEXT:    fcvt s0, h0
90; CHECK-i64-NEXT:    fcvt s1, h1
91; CHECK-i64-NEXT:    frintx s0, s0
92; CHECK-i64-NEXT:    frintx s1, s1
93; CHECK-i64-NEXT:    fcvtzs x8, s0
94; CHECK-i64-NEXT:    fcvtzs x9, s1
95; CHECK-i64-NEXT:    fmov d0, x8
96; CHECK-i64-NEXT:    mov v0.d[1], x9
97; CHECK-i64-NEXT:    ret
98  %a = call <2 x iXLen> @llvm.lrint.v2iXLen.v2f16(<2 x half> %x)
99  ret <2 x iXLen> %a
100}
101declare <2 x iXLen> @llvm.lrint.v2iXLen.v2f16(<2 x half>)
102
103define <4 x iXLen> @lrint_v4f16(<4 x half> %x) {
104; CHECK-i32-LABEL: lrint_v4f16:
105; CHECK-i32:       // %bb.0:
106; CHECK-i32-NEXT:    // kill: def $d0 killed $d0 def $q0
107; CHECK-i32-NEXT:    mov h1, v0.h[1]
108; CHECK-i32-NEXT:    fcvt s2, h0
109; CHECK-i32-NEXT:    mov h3, v0.h[2]
110; CHECK-i32-NEXT:    mov h0, v0.h[3]
111; CHECK-i32-NEXT:    fcvt s1, h1
112; CHECK-i32-NEXT:    frintx s2, s2
113; CHECK-i32-NEXT:    fcvt s3, h3
114; CHECK-i32-NEXT:    frintx s1, s1
115; CHECK-i32-NEXT:    fcvtzs w8, s2
116; CHECK-i32-NEXT:    fcvt s2, h0
117; CHECK-i32-NEXT:    fcvtzs w9, s1
118; CHECK-i32-NEXT:    frintx s1, s3
119; CHECK-i32-NEXT:    fmov s0, w8
120; CHECK-i32-NEXT:    mov v0.s[1], w9
121; CHECK-i32-NEXT:    fcvtzs w8, s1
122; CHECK-i32-NEXT:    frintx s1, s2
123; CHECK-i32-NEXT:    mov v0.s[2], w8
124; CHECK-i32-NEXT:    fcvtzs w8, s1
125; CHECK-i32-NEXT:    mov v0.s[3], w8
126; CHECK-i32-NEXT:    ret
127;
128; CHECK-i64-LABEL: lrint_v4f16:
129; CHECK-i64:       // %bb.0:
130; CHECK-i64-NEXT:    // kill: def $d0 killed $d0 def $q0
131; CHECK-i64-NEXT:    mov h1, v0.h[2]
132; CHECK-i64-NEXT:    mov h2, v0.h[1]
133; CHECK-i64-NEXT:    mov h3, v0.h[3]
134; CHECK-i64-NEXT:    fcvt s0, h0
135; CHECK-i64-NEXT:    fcvt s1, h1
136; CHECK-i64-NEXT:    fcvt s2, h2
137; CHECK-i64-NEXT:    fcvt s3, h3
138; CHECK-i64-NEXT:    frintx s0, s0
139; CHECK-i64-NEXT:    frintx s1, s1
140; CHECK-i64-NEXT:    frintx s2, s2
141; CHECK-i64-NEXT:    frintx s3, s3
142; CHECK-i64-NEXT:    fcvtzs x8, s0
143; CHECK-i64-NEXT:    fcvtzs x9, s1
144; CHECK-i64-NEXT:    fcvtzs x10, s2
145; CHECK-i64-NEXT:    fcvtzs x11, s3
146; CHECK-i64-NEXT:    fmov d0, x8
147; CHECK-i64-NEXT:    fmov d1, x9
148; CHECK-i64-NEXT:    mov v0.d[1], x10
149; CHECK-i64-NEXT:    mov v1.d[1], x11
150; CHECK-i64-NEXT:    ret
151  %a = call <4 x iXLen> @llvm.lrint.v4iXLen.v4f16(<4 x half> %x)
152  ret <4 x iXLen> %a
153}
154declare <4 x iXLen> @llvm.lrint.v4iXLen.v4f16(<4 x half>)
155
156define <8 x iXLen> @lrint_v8f16(<8 x half> %x) {
157; CHECK-i32-LABEL: lrint_v8f16:
158; CHECK-i32:       // %bb.0:
159; CHECK-i32-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
160; CHECK-i32-NEXT:    mov h3, v0.h[1]
161; CHECK-i32-NEXT:    fcvt s6, h0
162; CHECK-i32-NEXT:    mov h4, v0.h[2]
163; CHECK-i32-NEXT:    mov h0, v0.h[3]
164; CHECK-i32-NEXT:    mov h2, v1.h[1]
165; CHECK-i32-NEXT:    fcvt s5, h1
166; CHECK-i32-NEXT:    mov h7, v1.h[2]
167; CHECK-i32-NEXT:    fcvt s3, h3
168; CHECK-i32-NEXT:    frintx s6, s6
169; CHECK-i32-NEXT:    fcvt s4, h4
170; CHECK-i32-NEXT:    mov h1, v1.h[3]
171; CHECK-i32-NEXT:    fcvt s2, h2
172; CHECK-i32-NEXT:    frintx s5, s5
173; CHECK-i32-NEXT:    fcvt s7, h7
174; CHECK-i32-NEXT:    frintx s3, s3
175; CHECK-i32-NEXT:    fcvtzs w9, s6
176; CHECK-i32-NEXT:    frintx s4, s4
177; CHECK-i32-NEXT:    frintx s2, s2
178; CHECK-i32-NEXT:    fcvtzs w8, s5
179; CHECK-i32-NEXT:    fcvt s5, h1
180; CHECK-i32-NEXT:    fcvtzs w11, s3
181; CHECK-i32-NEXT:    fcvt s3, h0
182; CHECK-i32-NEXT:    fmov s0, w9
183; CHECK-i32-NEXT:    fcvtzs w12, s4
184; CHECK-i32-NEXT:    fcvtzs w10, s2
185; CHECK-i32-NEXT:    frintx s2, s7
186; CHECK-i32-NEXT:    fmov s1, w8
187; CHECK-i32-NEXT:    mov v0.s[1], w11
188; CHECK-i32-NEXT:    fcvtzs w8, s2
189; CHECK-i32-NEXT:    mov v1.s[1], w10
190; CHECK-i32-NEXT:    frintx s2, s3
191; CHECK-i32-NEXT:    frintx s3, s5
192; CHECK-i32-NEXT:    mov v0.s[2], w12
193; CHECK-i32-NEXT:    mov v1.s[2], w8
194; CHECK-i32-NEXT:    fcvtzs w9, s2
195; CHECK-i32-NEXT:    fcvtzs w8, s3
196; CHECK-i32-NEXT:    mov v0.s[3], w9
197; CHECK-i32-NEXT:    mov v1.s[3], w8
198; CHECK-i32-NEXT:    ret
199;
200; CHECK-i64-LABEL: lrint_v8f16:
201; CHECK-i64:       // %bb.0:
202; CHECK-i64-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
203; CHECK-i64-NEXT:    mov h4, v0.h[2]
204; CHECK-i64-NEXT:    mov h3, v0.h[1]
205; CHECK-i64-NEXT:    mov h7, v0.h[3]
206; CHECK-i64-NEXT:    fcvt s0, h0
207; CHECK-i64-NEXT:    mov h2, v1.h[2]
208; CHECK-i64-NEXT:    mov h5, v1.h[1]
209; CHECK-i64-NEXT:    mov h6, v1.h[3]
210; CHECK-i64-NEXT:    fcvt s1, h1
211; CHECK-i64-NEXT:    fcvt s4, h4
212; CHECK-i64-NEXT:    fcvt s3, h3
213; CHECK-i64-NEXT:    fcvt s7, h7
214; CHECK-i64-NEXT:    frintx s0, s0
215; CHECK-i64-NEXT:    fcvt s2, h2
216; CHECK-i64-NEXT:    fcvt s5, h5
217; CHECK-i64-NEXT:    fcvt s6, h6
218; CHECK-i64-NEXT:    frintx s1, s1
219; CHECK-i64-NEXT:    frintx s4, s4
220; CHECK-i64-NEXT:    frintx s3, s3
221; CHECK-i64-NEXT:    frintx s7, s7
222; CHECK-i64-NEXT:    fcvtzs x9, s0
223; CHECK-i64-NEXT:    frintx s2, s2
224; CHECK-i64-NEXT:    frintx s5, s5
225; CHECK-i64-NEXT:    frintx s6, s6
226; CHECK-i64-NEXT:    fcvtzs x8, s1
227; CHECK-i64-NEXT:    fcvtzs x12, s4
228; CHECK-i64-NEXT:    fcvtzs x11, s3
229; CHECK-i64-NEXT:    fcvtzs x15, s7
230; CHECK-i64-NEXT:    fmov d0, x9
231; CHECK-i64-NEXT:    fcvtzs x10, s2
232; CHECK-i64-NEXT:    fcvtzs x13, s5
233; CHECK-i64-NEXT:    fcvtzs x14, s6
234; CHECK-i64-NEXT:    fmov d2, x8
235; CHECK-i64-NEXT:    fmov d1, x12
236; CHECK-i64-NEXT:    mov v0.d[1], x11
237; CHECK-i64-NEXT:    fmov d3, x10
238; CHECK-i64-NEXT:    mov v2.d[1], x13
239; CHECK-i64-NEXT:    mov v1.d[1], x15
240; CHECK-i64-NEXT:    mov v3.d[1], x14
241; CHECK-i64-NEXT:    ret
242  %a = call <8 x iXLen> @llvm.lrint.v8iXLen.v8f16(<8 x half> %x)
243  ret <8 x iXLen> %a
244}
245declare <8 x iXLen> @llvm.lrint.v8iXLen.v8f16(<8 x half>)
246
247define <16 x iXLen> @lrint_v16f16(<16 x half> %x) {
248; CHECK-i32-LABEL: lrint_v16f16:
249; CHECK-i32:       // %bb.0:
250; CHECK-i32-NEXT:    ext v2.16b, v0.16b, v0.16b, #8
251; CHECK-i32-NEXT:    ext v3.16b, v1.16b, v1.16b, #8
252; CHECK-i32-NEXT:    mov h18, v0.h[1]
253; CHECK-i32-NEXT:    mov h19, v1.h[1]
254; CHECK-i32-NEXT:    fcvt s20, h0
255; CHECK-i32-NEXT:    mov h21, v0.h[2]
256; CHECK-i32-NEXT:    mov h0, v0.h[3]
257; CHECK-i32-NEXT:    mov h4, v2.h[1]
258; CHECK-i32-NEXT:    mov h5, v2.h[2]
259; CHECK-i32-NEXT:    fcvt s6, h2
260; CHECK-i32-NEXT:    fcvt s7, h3
261; CHECK-i32-NEXT:    mov h16, v3.h[1]
262; CHECK-i32-NEXT:    mov h17, v3.h[2]
263; CHECK-i32-NEXT:    fcvt s18, h18
264; CHECK-i32-NEXT:    fcvt s19, h19
265; CHECK-i32-NEXT:    mov h2, v2.h[3]
266; CHECK-i32-NEXT:    fcvt s4, h4
267; CHECK-i32-NEXT:    fcvt s5, h5
268; CHECK-i32-NEXT:    frintx s6, s6
269; CHECK-i32-NEXT:    frintx s7, s7
270; CHECK-i32-NEXT:    fcvt s16, h16
271; CHECK-i32-NEXT:    fcvt s17, h17
272; CHECK-i32-NEXT:    frintx s18, s18
273; CHECK-i32-NEXT:    fcvt s2, h2
274; CHECK-i32-NEXT:    frintx s4, s4
275; CHECK-i32-NEXT:    frintx s5, s5
276; CHECK-i32-NEXT:    fcvtzs w8, s6
277; CHECK-i32-NEXT:    fcvt s6, h1
278; CHECK-i32-NEXT:    fcvtzs w9, s7
279; CHECK-i32-NEXT:    mov h7, v1.h[2]
280; CHECK-i32-NEXT:    frintx s16, s16
281; CHECK-i32-NEXT:    fcvtzs w15, s18
282; CHECK-i32-NEXT:    fcvtzs w10, s4
283; CHECK-i32-NEXT:    frintx s4, s17
284; CHECK-i32-NEXT:    fcvtzs w11, s5
285; CHECK-i32-NEXT:    frintx s5, s20
286; CHECK-i32-NEXT:    fcvt s17, h21
287; CHECK-i32-NEXT:    frintx s6, s6
288; CHECK-i32-NEXT:    fcvtzs w12, s16
289; CHECK-i32-NEXT:    frintx s16, s19
290; CHECK-i32-NEXT:    fcvt s7, h7
291; CHECK-i32-NEXT:    mov h19, v1.h[3]
292; CHECK-i32-NEXT:    fmov s1, w8
293; CHECK-i32-NEXT:    fcvtzs w13, s4
294; CHECK-i32-NEXT:    mov h4, v3.h[3]
295; CHECK-i32-NEXT:    fmov s3, w9
296; CHECK-i32-NEXT:    fcvtzs w14, s5
297; CHECK-i32-NEXT:    frintx s5, s17
298; CHECK-i32-NEXT:    fcvtzs w16, s6
299; CHECK-i32-NEXT:    fcvt s17, h0
300; CHECK-i32-NEXT:    fcvtzs w8, s16
301; CHECK-i32-NEXT:    frintx s6, s7
302; CHECK-i32-NEXT:    fcvt s7, h19
303; CHECK-i32-NEXT:    mov v1.s[1], w10
304; CHECK-i32-NEXT:    mov v3.s[1], w12
305; CHECK-i32-NEXT:    fcvt s4, h4
306; CHECK-i32-NEXT:    fcvtzs w9, s5
307; CHECK-i32-NEXT:    fmov s0, w14
308; CHECK-i32-NEXT:    frintx s5, s2
309; CHECK-i32-NEXT:    fmov s2, w16
310; CHECK-i32-NEXT:    frintx s16, s17
311; CHECK-i32-NEXT:    fcvtzs w10, s6
312; CHECK-i32-NEXT:    frintx s6, s7
313; CHECK-i32-NEXT:    mov v1.s[2], w11
314; CHECK-i32-NEXT:    mov v3.s[2], w13
315; CHECK-i32-NEXT:    mov v0.s[1], w15
316; CHECK-i32-NEXT:    frintx s4, s4
317; CHECK-i32-NEXT:    mov v2.s[1], w8
318; CHECK-i32-NEXT:    fcvtzs w8, s5
319; CHECK-i32-NEXT:    fcvtzs w12, s16
320; CHECK-i32-NEXT:    mov v0.s[2], w9
321; CHECK-i32-NEXT:    fcvtzs w9, s4
322; CHECK-i32-NEXT:    mov v2.s[2], w10
323; CHECK-i32-NEXT:    fcvtzs w10, s6
324; CHECK-i32-NEXT:    mov v1.s[3], w8
325; CHECK-i32-NEXT:    mov v0.s[3], w12
326; CHECK-i32-NEXT:    mov v3.s[3], w9
327; CHECK-i32-NEXT:    mov v2.s[3], w10
328; CHECK-i32-NEXT:    ret
329;
330; CHECK-i64-LABEL: lrint_v16f16:
331; CHECK-i64:       // %bb.0:
332; CHECK-i64-NEXT:    ext v2.16b, v0.16b, v0.16b, #8
333; CHECK-i64-NEXT:    ext v3.16b, v1.16b, v1.16b, #8
334; CHECK-i64-NEXT:    mov h17, v0.h[1]
335; CHECK-i64-NEXT:    mov h19, v0.h[2]
336; CHECK-i64-NEXT:    fcvt s18, h0
337; CHECK-i64-NEXT:    mov h0, v0.h[3]
338; CHECK-i64-NEXT:    mov h4, v2.h[1]
339; CHECK-i64-NEXT:    mov h5, v2.h[2]
340; CHECK-i64-NEXT:    fcvt s7, h3
341; CHECK-i64-NEXT:    fcvt s6, h2
342; CHECK-i64-NEXT:    mov h16, v3.h[2]
343; CHECK-i64-NEXT:    mov h2, v2.h[3]
344; CHECK-i64-NEXT:    fcvt s17, h17
345; CHECK-i64-NEXT:    fcvt s19, h19
346; CHECK-i64-NEXT:    frintx s18, s18
347; CHECK-i64-NEXT:    fcvt s0, h0
348; CHECK-i64-NEXT:    fcvt s4, h4
349; CHECK-i64-NEXT:    fcvt s5, h5
350; CHECK-i64-NEXT:    frintx s7, s7
351; CHECK-i64-NEXT:    frintx s6, s6
352; CHECK-i64-NEXT:    fcvt s16, h16
353; CHECK-i64-NEXT:    fcvt s2, h2
354; CHECK-i64-NEXT:    frintx s17, s17
355; CHECK-i64-NEXT:    frintx s19, s19
356; CHECK-i64-NEXT:    fcvtzs x13, s18
357; CHECK-i64-NEXT:    frintx s0, s0
358; CHECK-i64-NEXT:    frintx s4, s4
359; CHECK-i64-NEXT:    frintx s5, s5
360; CHECK-i64-NEXT:    fcvtzs x9, s7
361; CHECK-i64-NEXT:    mov h7, v1.h[2]
362; CHECK-i64-NEXT:    fcvtzs x8, s6
363; CHECK-i64-NEXT:    mov h6, v1.h[1]
364; CHECK-i64-NEXT:    frintx s16, s16
365; CHECK-i64-NEXT:    fcvtzs x14, s17
366; CHECK-i64-NEXT:    fcvtzs x15, s19
367; CHECK-i64-NEXT:    fcvtzs x10, s4
368; CHECK-i64-NEXT:    mov h4, v3.h[1]
369; CHECK-i64-NEXT:    fcvtzs x11, s5
370; CHECK-i64-NEXT:    mov h5, v1.h[3]
371; CHECK-i64-NEXT:    mov h3, v3.h[3]
372; CHECK-i64-NEXT:    fcvt s1, h1
373; CHECK-i64-NEXT:    fcvt s7, h7
374; CHECK-i64-NEXT:    fcvt s6, h6
375; CHECK-i64-NEXT:    fcvtzs x12, s16
376; CHECK-i64-NEXT:    frintx s16, s2
377; CHECK-i64-NEXT:    fmov d2, x8
378; CHECK-i64-NEXT:    fcvt s4, h4
379; CHECK-i64-NEXT:    fcvt s3, h3
380; CHECK-i64-NEXT:    fcvt s5, h5
381; CHECK-i64-NEXT:    frintx s1, s1
382; CHECK-i64-NEXT:    frintx s7, s7
383; CHECK-i64-NEXT:    frintx s17, s6
384; CHECK-i64-NEXT:    fmov d6, x9
385; CHECK-i64-NEXT:    mov v2.d[1], x10
386; CHECK-i64-NEXT:    frintx s4, s4
387; CHECK-i64-NEXT:    frintx s18, s3
388; CHECK-i64-NEXT:    frintx s5, s5
389; CHECK-i64-NEXT:    fcvtzs x8, s1
390; CHECK-i64-NEXT:    fcvtzs x9, s7
391; CHECK-i64-NEXT:    fmov d3, x11
392; CHECK-i64-NEXT:    fcvtzs x11, s0
393; CHECK-i64-NEXT:    fmov d7, x12
394; CHECK-i64-NEXT:    fcvtzs x12, s16
395; CHECK-i64-NEXT:    fcvtzs x16, s17
396; CHECK-i64-NEXT:    fcvtzs x17, s4
397; CHECK-i64-NEXT:    fmov d0, x13
398; CHECK-i64-NEXT:    fmov d1, x15
399; CHECK-i64-NEXT:    fcvtzs x18, s18
400; CHECK-i64-NEXT:    fcvtzs x0, s5
401; CHECK-i64-NEXT:    fmov d4, x8
402; CHECK-i64-NEXT:    fmov d5, x9
403; CHECK-i64-NEXT:    mov v0.d[1], x14
404; CHECK-i64-NEXT:    mov v1.d[1], x11
405; CHECK-i64-NEXT:    mov v3.d[1], x12
406; CHECK-i64-NEXT:    mov v4.d[1], x16
407; CHECK-i64-NEXT:    mov v6.d[1], x17
408; CHECK-i64-NEXT:    mov v7.d[1], x18
409; CHECK-i64-NEXT:    mov v5.d[1], x0
410; CHECK-i64-NEXT:    ret
411  %a = call <16 x iXLen> @llvm.lrint.v16iXLen.v16f16(<16 x half> %x)
412  ret <16 x iXLen> %a
413}
414declare <16 x iXLen> @llvm.lrint.v16iXLen.v16f16(<16 x half>)
415
416define <32 x iXLen> @lrint_v32f16(<32 x half> %x) {
417; CHECK-i32-LABEL: lrint_v32f16:
418; CHECK-i32:       // %bb.0:
419; CHECK-i32-NEXT:    ext v5.16b, v0.16b, v0.16b, #8
420; CHECK-i32-NEXT:    ext v4.16b, v1.16b, v1.16b, #8
421; CHECK-i32-NEXT:    ext v17.16b, v2.16b, v2.16b, #8
422; CHECK-i32-NEXT:    mov h6, v5.h[1]
423; CHECK-i32-NEXT:    fcvt s7, h5
424; CHECK-i32-NEXT:    mov h16, v5.h[2]
425; CHECK-i32-NEXT:    mov h5, v5.h[3]
426; CHECK-i32-NEXT:    mov h18, v4.h[1]
427; CHECK-i32-NEXT:    mov h20, v4.h[3]
428; CHECK-i32-NEXT:    mov h19, v4.h[2]
429; CHECK-i32-NEXT:    fcvt s21, h4
430; CHECK-i32-NEXT:    mov h23, v17.h[1]
431; CHECK-i32-NEXT:    ext v4.16b, v3.16b, v3.16b, #8
432; CHECK-i32-NEXT:    fcvt s22, h17
433; CHECK-i32-NEXT:    fcvt s6, h6
434; CHECK-i32-NEXT:    frintx s7, s7
435; CHECK-i32-NEXT:    fcvt s16, h16
436; CHECK-i32-NEXT:    fcvt s5, h5
437; CHECK-i32-NEXT:    fcvt s18, h18
438; CHECK-i32-NEXT:    fcvt s20, h20
439; CHECK-i32-NEXT:    fcvt s19, h19
440; CHECK-i32-NEXT:    frintx s22, s22
441; CHECK-i32-NEXT:    frintx s6, s6
442; CHECK-i32-NEXT:    fcvtzs w12, s7
443; CHECK-i32-NEXT:    frintx s7, s16
444; CHECK-i32-NEXT:    frintx s5, s5
445; CHECK-i32-NEXT:    frintx s16, s21
446; CHECK-i32-NEXT:    fcvt s21, h23
447; CHECK-i32-NEXT:    frintx s18, s18
448; CHECK-i32-NEXT:    frintx s20, s20
449; CHECK-i32-NEXT:    frintx s19, s19
450; CHECK-i32-NEXT:    fcvtzs w15, s22
451; CHECK-i32-NEXT:    mov h22, v1.h[2]
452; CHECK-i32-NEXT:    fcvtzs w17, s6
453; CHECK-i32-NEXT:    mov h6, v17.h[2]
454; CHECK-i32-NEXT:    mov h17, v17.h[3]
455; CHECK-i32-NEXT:    fcvtzs w9, s7
456; CHECK-i32-NEXT:    mov h7, v4.h[2]
457; CHECK-i32-NEXT:    fcvtzs w8, s5
458; CHECK-i32-NEXT:    mov h5, v4.h[1]
459; CHECK-i32-NEXT:    fcvtzs w13, s16
460; CHECK-i32-NEXT:    frintx s16, s21
461; CHECK-i32-NEXT:    fcvtzs w14, s18
462; CHECK-i32-NEXT:    fcvtzs w10, s20
463; CHECK-i32-NEXT:    fcvt s18, h4
464; CHECK-i32-NEXT:    fcvt s6, h6
465; CHECK-i32-NEXT:    fcvt s17, h17
466; CHECK-i32-NEXT:    mov h20, v0.h[2]
467; CHECK-i32-NEXT:    fcvt s7, h7
468; CHECK-i32-NEXT:    fcvtzs w11, s19
469; CHECK-i32-NEXT:    mov h19, v0.h[1]
470; CHECK-i32-NEXT:    fcvt s5, h5
471; CHECK-i32-NEXT:    fcvtzs w0, s16
472; CHECK-i32-NEXT:    mov h21, v1.h[1]
473; CHECK-i32-NEXT:    frintx s18, s18
474; CHECK-i32-NEXT:    mov h4, v4.h[3]
475; CHECK-i32-NEXT:    frintx s6, s6
476; CHECK-i32-NEXT:    frintx s16, s17
477; CHECK-i32-NEXT:    mov h17, v0.h[3]
478; CHECK-i32-NEXT:    fcvt s0, h0
479; CHECK-i32-NEXT:    fcvt s19, h19
480; CHECK-i32-NEXT:    frintx s5, s5
481; CHECK-i32-NEXT:    fcvtzs w2, s18
482; CHECK-i32-NEXT:    fcvt s18, h21
483; CHECK-i32-NEXT:    fcvt s21, h2
484; CHECK-i32-NEXT:    fcvtzs w18, s6
485; CHECK-i32-NEXT:    frintx s6, s7
486; CHECK-i32-NEXT:    fcvt s7, h20
487; CHECK-i32-NEXT:    fcvtzs w16, s16
488; CHECK-i32-NEXT:    fcvt s16, h17
489; CHECK-i32-NEXT:    fcvt s17, h1
490; CHECK-i32-NEXT:    frintx s0, s0
491; CHECK-i32-NEXT:    fcvtzs w3, s5
492; CHECK-i32-NEXT:    frintx s5, s19
493; CHECK-i32-NEXT:    fcvt s19, h22
494; CHECK-i32-NEXT:    mov h1, v1.h[3]
495; CHECK-i32-NEXT:    fcvtzs w1, s6
496; CHECK-i32-NEXT:    frintx s6, s7
497; CHECK-i32-NEXT:    mov h7, v2.h[1]
498; CHECK-i32-NEXT:    frintx s17, s17
499; CHECK-i32-NEXT:    frintx s20, s16
500; CHECK-i32-NEXT:    fmov s16, w12
501; CHECK-i32-NEXT:    fcvtzs w4, s0
502; CHECK-i32-NEXT:    frintx s0, s18
503; CHECK-i32-NEXT:    fcvtzs w5, s5
504; CHECK-i32-NEXT:    frintx s5, s19
505; CHECK-i32-NEXT:    frintx s18, s21
506; CHECK-i32-NEXT:    fcvt s19, h3
507; CHECK-i32-NEXT:    fcvtzs w12, s6
508; CHECK-i32-NEXT:    fcvt s6, h7
509; CHECK-i32-NEXT:    mov h7, v3.h[1]
510; CHECK-i32-NEXT:    fcvtzs w6, s17
511; CHECK-i32-NEXT:    fmov s17, w13
512; CHECK-i32-NEXT:    mov v16.s[1], w17
513; CHECK-i32-NEXT:    fcvtzs w17, s20
514; CHECK-i32-NEXT:    fcvtzs w7, s0
515; CHECK-i32-NEXT:    mov h0, v2.h[2]
516; CHECK-i32-NEXT:    mov h20, v3.h[2]
517; CHECK-i32-NEXT:    fcvtzs w13, s5
518; CHECK-i32-NEXT:    fmov s5, w15
519; CHECK-i32-NEXT:    frintx s6, s6
520; CHECK-i32-NEXT:    fcvt s7, h7
521; CHECK-i32-NEXT:    mov v17.s[1], w14
522; CHECK-i32-NEXT:    fcvtzs w14, s18
523; CHECK-i32-NEXT:    frintx s18, s19
524; CHECK-i32-NEXT:    mov h2, v2.h[3]
525; CHECK-i32-NEXT:    fcvt s0, h0
526; CHECK-i32-NEXT:    mov h3, v3.h[3]
527; CHECK-i32-NEXT:    mov v5.s[1], w0
528; CHECK-i32-NEXT:    fcvt s19, h20
529; CHECK-i32-NEXT:    fcvt s1, h1
530; CHECK-i32-NEXT:    mov v16.s[2], w9
531; CHECK-i32-NEXT:    fcvtzs w15, s6
532; CHECK-i32-NEXT:    frintx s6, s7
533; CHECK-i32-NEXT:    fmov s7, w2
534; CHECK-i32-NEXT:    fcvtzs w0, s18
535; CHECK-i32-NEXT:    fcvt s20, h2
536; CHECK-i32-NEXT:    fcvt s18, h4
537; CHECK-i32-NEXT:    frintx s21, s0
538; CHECK-i32-NEXT:    fcvt s3, h3
539; CHECK-i32-NEXT:    fmov s0, w4
540; CHECK-i32-NEXT:    frintx s19, s19
541; CHECK-i32-NEXT:    fmov s2, w6
542; CHECK-i32-NEXT:    fmov s4, w14
543; CHECK-i32-NEXT:    fcvtzs w2, s6
544; CHECK-i32-NEXT:    mov v7.s[1], w3
545; CHECK-i32-NEXT:    frintx s1, s1
546; CHECK-i32-NEXT:    fmov s6, w0
547; CHECK-i32-NEXT:    mov v0.s[1], w5
548; CHECK-i32-NEXT:    frintx s20, s20
549; CHECK-i32-NEXT:    mov v2.s[1], w7
550; CHECK-i32-NEXT:    fcvtzs w3, s21
551; CHECK-i32-NEXT:    mov v4.s[1], w15
552; CHECK-i32-NEXT:    fcvtzs w14, s19
553; CHECK-i32-NEXT:    frintx s18, s18
554; CHECK-i32-NEXT:    frintx s3, s3
555; CHECK-i32-NEXT:    mov v6.s[1], w2
556; CHECK-i32-NEXT:    mov v17.s[2], w11
557; CHECK-i32-NEXT:    fcvtzs w15, s1
558; CHECK-i32-NEXT:    fcvtzs w0, s20
559; CHECK-i32-NEXT:    mov v5.s[2], w18
560; CHECK-i32-NEXT:    mov v0.s[2], w12
561; CHECK-i32-NEXT:    mov v7.s[2], w1
562; CHECK-i32-NEXT:    mov v2.s[2], w13
563; CHECK-i32-NEXT:    mov v4.s[2], w3
564; CHECK-i32-NEXT:    fcvtzs w9, s18
565; CHECK-i32-NEXT:    fcvtzs w11, s3
566; CHECK-i32-NEXT:    mov v16.s[3], w8
567; CHECK-i32-NEXT:    mov v6.s[2], w14
568; CHECK-i32-NEXT:    mov v17.s[3], w10
569; CHECK-i32-NEXT:    mov v0.s[3], w17
570; CHECK-i32-NEXT:    mov v5.s[3], w16
571; CHECK-i32-NEXT:    mov v2.s[3], w15
572; CHECK-i32-NEXT:    mov v4.s[3], w0
573; CHECK-i32-NEXT:    mov v7.s[3], w9
574; CHECK-i32-NEXT:    mov v1.16b, v16.16b
575; CHECK-i32-NEXT:    mov v6.s[3], w11
576; CHECK-i32-NEXT:    mov v3.16b, v17.16b
577; CHECK-i32-NEXT:    ret
578;
579; CHECK-i64-LABEL: lrint_v32f16:
580; CHECK-i64:       // %bb.0:
581; CHECK-i64-NEXT:    ext v4.16b, v1.16b, v1.16b, #8
582; CHECK-i64-NEXT:    ext v5.16b, v2.16b, v2.16b, #8
583; CHECK-i64-NEXT:    ext v6.16b, v3.16b, v3.16b, #8
584; CHECK-i64-NEXT:    ext v7.16b, v0.16b, v0.16b, #8
585; CHECK-i64-NEXT:    mov h19, v0.h[1]
586; CHECK-i64-NEXT:    fcvt s21, h0
587; CHECK-i64-NEXT:    mov h23, v1.h[2]
588; CHECK-i64-NEXT:    fcvt s22, h1
589; CHECK-i64-NEXT:    fcvt s26, h2
590; CHECK-i64-NEXT:    mov h27, v2.h[1]
591; CHECK-i64-NEXT:    mov h28, v2.h[2]
592; CHECK-i64-NEXT:    mov h16, v4.h[2]
593; CHECK-i64-NEXT:    fcvt s17, h5
594; CHECK-i64-NEXT:    mov h18, v5.h[2]
595; CHECK-i64-NEXT:    mov h20, v6.h[2]
596; CHECK-i64-NEXT:    fcvt s24, h7
597; CHECK-i64-NEXT:    fcvt s25, h6
598; CHECK-i64-NEXT:    fcvt s19, h19
599; CHECK-i64-NEXT:    frintx s22, s22
600; CHECK-i64-NEXT:    fcvt s16, h16
601; CHECK-i64-NEXT:    frintx s17, s17
602; CHECK-i64-NEXT:    fcvt s18, h18
603; CHECK-i64-NEXT:    fcvt s20, h20
604; CHECK-i64-NEXT:    frintx s16, s16
605; CHECK-i64-NEXT:    fcvtzs x12, s17
606; CHECK-i64-NEXT:    frintx s17, s18
607; CHECK-i64-NEXT:    frintx s18, s21
608; CHECK-i64-NEXT:    fcvt s21, h23
609; CHECK-i64-NEXT:    frintx s23, s24
610; CHECK-i64-NEXT:    frintx s24, s25
611; CHECK-i64-NEXT:    frintx s25, s19
612; CHECK-i64-NEXT:    mov h19, v7.h[1]
613; CHECK-i64-NEXT:    fcvtzs x13, s16
614; CHECK-i64-NEXT:    frintx s16, s20
615; CHECK-i64-NEXT:    frintx s20, s26
616; CHECK-i64-NEXT:    fcvtzs x9, s23
617; CHECK-i64-NEXT:    mov h23, v3.h[2]
618; CHECK-i64-NEXT:    fcvt s26, h27
619; CHECK-i64-NEXT:    fcvtzs x15, s24
620; CHECK-i64-NEXT:    fcvtzs x10, s25
621; CHECK-i64-NEXT:    fcvt s24, h28
622; CHECK-i64-NEXT:    mov h25, v3.h[3]
623; CHECK-i64-NEXT:    fcvtzs x14, s17
624; CHECK-i64-NEXT:    frintx s21, s21
625; CHECK-i64-NEXT:    fmov d17, x12
626; CHECK-i64-NEXT:    fcvtzs x12, s16
627; CHECK-i64-NEXT:    fmov d16, x13
628; CHECK-i64-NEXT:    fcvtzs x13, s22
629; CHECK-i64-NEXT:    fcvt s22, h3
630; CHECK-i64-NEXT:    mov h3, v3.h[1]
631; CHECK-i64-NEXT:    mov h27, v0.h[2]
632; CHECK-i64-NEXT:    mov h28, v2.h[3]
633; CHECK-i64-NEXT:    fcvt s23, h23
634; CHECK-i64-NEXT:    frintx s26, s26
635; CHECK-i64-NEXT:    fcvtzs x16, s20
636; CHECK-i64-NEXT:    frintx s20, s24
637; CHECK-i64-NEXT:    fcvt s24, h25
638; CHECK-i64-NEXT:    fcvtzs x11, s18
639; CHECK-i64-NEXT:    fmov d18, x14
640; CHECK-i64-NEXT:    fcvtzs x14, s21
641; CHECK-i64-NEXT:    frintx s22, s22
642; CHECK-i64-NEXT:    fcvt s3, h3
643; CHECK-i64-NEXT:    fcvt s25, h27
644; CHECK-i64-NEXT:    fcvt s27, h28
645; CHECK-i64-NEXT:    frintx s23, s23
646; CHECK-i64-NEXT:    mov h21, v1.h[3]
647; CHECK-i64-NEXT:    fmov d2, x15
648; CHECK-i64-NEXT:    fcvtzs x15, s26
649; CHECK-i64-NEXT:    fmov d26, x13
650; CHECK-i64-NEXT:    mov h1, v1.h[1]
651; CHECK-i64-NEXT:    fcvtzs x13, s20
652; CHECK-i64-NEXT:    frintx s20, s24
653; CHECK-i64-NEXT:    fmov d24, x14
654; CHECK-i64-NEXT:    fcvtzs x14, s22
655; CHECK-i64-NEXT:    frintx s3, s3
656; CHECK-i64-NEXT:    fmov d22, x16
657; CHECK-i64-NEXT:    frintx s27, s27
658; CHECK-i64-NEXT:    fcvtzs x16, s23
659; CHECK-i64-NEXT:    fcvt s21, h21
660; CHECK-i64-NEXT:    frintx s25, s25
661; CHECK-i64-NEXT:    fcvt s1, h1
662; CHECK-i64-NEXT:    mov h0, v0.h[3]
663; CHECK-i64-NEXT:    mov h23, v7.h[2]
664; CHECK-i64-NEXT:    mov v22.d[1], x15
665; CHECK-i64-NEXT:    fcvtzs x15, s20
666; CHECK-i64-NEXT:    fmov d20, x13
667; CHECK-i64-NEXT:    fcvtzs x13, s3
668; CHECK-i64-NEXT:    fmov d3, x14
669; CHECK-i64-NEXT:    fcvtzs x14, s27
670; CHECK-i64-NEXT:    fmov d27, x16
671; CHECK-i64-NEXT:    frintx s21, s21
672; CHECK-i64-NEXT:    mov h7, v7.h[3]
673; CHECK-i64-NEXT:    frintx s1, s1
674; CHECK-i64-NEXT:    fcvt s0, h0
675; CHECK-i64-NEXT:    fcvt s23, h23
676; CHECK-i64-NEXT:    fcvt s19, h19
677; CHECK-i64-NEXT:    mov v27.d[1], x15
678; CHECK-i64-NEXT:    fcvtzs x15, s25
679; CHECK-i64-NEXT:    mov h25, v6.h[3]
680; CHECK-i64-NEXT:    mov h6, v6.h[1]
681; CHECK-i64-NEXT:    mov v3.d[1], x13
682; CHECK-i64-NEXT:    fcvtzs x13, s21
683; CHECK-i64-NEXT:    mov h21, v5.h[1]
684; CHECK-i64-NEXT:    mov h5, v5.h[3]
685; CHECK-i64-NEXT:    mov v20.d[1], x14
686; CHECK-i64-NEXT:    fcvtzs x14, s1
687; CHECK-i64-NEXT:    mov h1, v4.h[1]
688; CHECK-i64-NEXT:    frintx s0, s0
689; CHECK-i64-NEXT:    fcvt s25, h25
690; CHECK-i64-NEXT:    fcvt s7, h7
691; CHECK-i64-NEXT:    stp q3, q27, [x8, #192]
692; CHECK-i64-NEXT:    fcvt s6, h6
693; CHECK-i64-NEXT:    mov h3, v4.h[3]
694; CHECK-i64-NEXT:    stp q22, q20, [x8, #128]
695; CHECK-i64-NEXT:    fcvt s21, h21
696; CHECK-i64-NEXT:    fcvt s5, h5
697; CHECK-i64-NEXT:    mov v24.d[1], x13
698; CHECK-i64-NEXT:    mov v26.d[1], x14
699; CHECK-i64-NEXT:    fcvt s4, h4
700; CHECK-i64-NEXT:    frintx s22, s25
701; CHECK-i64-NEXT:    fmov d20, x12
702; CHECK-i64-NEXT:    fcvt s1, h1
703; CHECK-i64-NEXT:    frintx s6, s6
704; CHECK-i64-NEXT:    fcvt s3, h3
705; CHECK-i64-NEXT:    fcvtzs x12, s0
706; CHECK-i64-NEXT:    frintx s5, s5
707; CHECK-i64-NEXT:    frintx s21, s21
708; CHECK-i64-NEXT:    fmov d0, x11
709; CHECK-i64-NEXT:    stp q26, q24, [x8, #64]
710; CHECK-i64-NEXT:    fmov d24, x15
711; CHECK-i64-NEXT:    frintx s4, s4
712; CHECK-i64-NEXT:    fcvtzs x11, s22
713; CHECK-i64-NEXT:    frintx s22, s23
714; CHECK-i64-NEXT:    frintx s1, s1
715; CHECK-i64-NEXT:    fcvtzs x13, s6
716; CHECK-i64-NEXT:    frintx s3, s3
717; CHECK-i64-NEXT:    frintx s6, s7
718; CHECK-i64-NEXT:    fcvtzs x14, s5
719; CHECK-i64-NEXT:    mov v24.d[1], x12
720; CHECK-i64-NEXT:    frintx s5, s19
721; CHECK-i64-NEXT:    fcvtzs x12, s21
722; CHECK-i64-NEXT:    mov v0.d[1], x10
723; CHECK-i64-NEXT:    fcvtzs x10, s4
724; CHECK-i64-NEXT:    mov v20.d[1], x11
725; CHECK-i64-NEXT:    fcvtzs x11, s22
726; CHECK-i64-NEXT:    mov v2.d[1], x13
727; CHECK-i64-NEXT:    fcvtzs x15, s3
728; CHECK-i64-NEXT:    fcvtzs x13, s1
729; CHECK-i64-NEXT:    mov v18.d[1], x14
730; CHECK-i64-NEXT:    fcvtzs x14, s6
731; CHECK-i64-NEXT:    stp q0, q24, [x8]
732; CHECK-i64-NEXT:    mov v17.d[1], x12
733; CHECK-i64-NEXT:    fcvtzs x12, s5
734; CHECK-i64-NEXT:    fmov d0, x10
735; CHECK-i64-NEXT:    fmov d1, x11
736; CHECK-i64-NEXT:    stp q2, q20, [x8, #224]
737; CHECK-i64-NEXT:    fmov d2, x9
738; CHECK-i64-NEXT:    mov v16.d[1], x15
739; CHECK-i64-NEXT:    stp q17, q18, [x8, #160]
740; CHECK-i64-NEXT:    mov v0.d[1], x13
741; CHECK-i64-NEXT:    mov v1.d[1], x14
742; CHECK-i64-NEXT:    mov v2.d[1], x12
743; CHECK-i64-NEXT:    stp q0, q16, [x8, #96]
744; CHECK-i64-NEXT:    stp q2, q1, [x8, #32]
745; CHECK-i64-NEXT:    ret
746  %a = call <32 x iXLen> @llvm.lrint.v32iXLen.v32f16(<32 x half> %x)
747  ret <32 x iXLen> %a
748}
749declare <32 x iXLen> @llvm.lrint.v32iXLen.v32f16(<32 x half>)
750
751define <1 x iXLen> @lrint_v1f32(<1 x float> %x) {
752; CHECK-i32-LABEL: lrint_v1f32:
753; CHECK-i32:       // %bb.0:
754; CHECK-i32-NEXT:    frintx v0.2s, v0.2s
755; CHECK-i32-NEXT:    fcvtzs v0.2s, v0.2s
756; CHECK-i32-NEXT:    ret
757;
758; CHECK-i64-SD-LABEL: lrint_v1f32:
759; CHECK-i64-SD:       // %bb.0:
760; CHECK-i64-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
761; CHECK-i64-SD-NEXT:    frintx s0, s0
762; CHECK-i64-SD-NEXT:    fcvtzs x8, s0
763; CHECK-i64-SD-NEXT:    fmov d0, x8
764; CHECK-i64-SD-NEXT:    ret
765;
766; CHECK-i64-GI-LABEL: lrint_v1f32:
767; CHECK-i64-GI:       // %bb.0:
768; CHECK-i64-GI-NEXT:    frintx s0, s0
769; CHECK-i64-GI-NEXT:    fcvtzs x8, s0
770; CHECK-i64-GI-NEXT:    fmov d0, x8
771; CHECK-i64-GI-NEXT:    ret
772  %a = call <1 x iXLen> @llvm.lrint.v1iXLen.v1f32(<1 x float> %x)
773  ret <1 x iXLen> %a
774}
775declare <1 x iXLen> @llvm.lrint.v1iXLen.v1f32(<1 x float>)
776
777define <2 x iXLen> @lrint_v2f32(<2 x float> %x) {
778; CHECK-i32-LABEL: lrint_v2f32:
779; CHECK-i32:       // %bb.0:
780; CHECK-i32-NEXT:    frintx v0.2s, v0.2s
781; CHECK-i32-NEXT:    fcvtzs v0.2s, v0.2s
782; CHECK-i32-NEXT:    ret
783;
784; CHECK-i64-LABEL: lrint_v2f32:
785; CHECK-i64:       // %bb.0:
786; CHECK-i64-NEXT:    frintx v0.2s, v0.2s
787; CHECK-i64-NEXT:    fcvtl v0.2d, v0.2s
788; CHECK-i64-NEXT:    fcvtzs v0.2d, v0.2d
789; CHECK-i64-NEXT:    ret
790  %a = call <2 x iXLen> @llvm.lrint.v2iXLen.v2f32(<2 x float> %x)
791  ret <2 x iXLen> %a
792}
793declare <2 x iXLen> @llvm.lrint.v2iXLen.v2f32(<2 x float>)
794
795define <4 x iXLen> @lrint_v4f32(<4 x float> %x) {
796; CHECK-i32-LABEL: lrint_v4f32:
797; CHECK-i32:       // %bb.0:
798; CHECK-i32-NEXT:    frintx v0.4s, v0.4s
799; CHECK-i32-NEXT:    fcvtzs v0.4s, v0.4s
800; CHECK-i32-NEXT:    ret
801;
802; CHECK-i64-LABEL: lrint_v4f32:
803; CHECK-i64:       // %bb.0:
804; CHECK-i64-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
805; CHECK-i64-NEXT:    frintx v0.2s, v0.2s
806; CHECK-i64-NEXT:    frintx v1.2s, v1.2s
807; CHECK-i64-NEXT:    fcvtl v0.2d, v0.2s
808; CHECK-i64-NEXT:    fcvtl v1.2d, v1.2s
809; CHECK-i64-NEXT:    fcvtzs v0.2d, v0.2d
810; CHECK-i64-NEXT:    fcvtzs v1.2d, v1.2d
811; CHECK-i64-NEXT:    ret
812  %a = call <4 x iXLen> @llvm.lrint.v4iXLen.v4f32(<4 x float> %x)
813  ret <4 x iXLen> %a
814}
815declare <4 x iXLen> @llvm.lrint.v4iXLen.v4f32(<4 x float>)
816
817define <8 x iXLen> @lrint_v8f32(<8 x float> %x) {
818; CHECK-i32-LABEL: lrint_v8f32:
819; CHECK-i32:       // %bb.0:
820; CHECK-i32-NEXT:    frintx v0.4s, v0.4s
821; CHECK-i32-NEXT:    frintx v1.4s, v1.4s
822; CHECK-i32-NEXT:    fcvtzs v0.4s, v0.4s
823; CHECK-i32-NEXT:    fcvtzs v1.4s, v1.4s
824; CHECK-i32-NEXT:    ret
825;
826; CHECK-i64-LABEL: lrint_v8f32:
827; CHECK-i64:       // %bb.0:
828; CHECK-i64-NEXT:    ext v2.16b, v0.16b, v0.16b, #8
829; CHECK-i64-NEXT:    ext v3.16b, v1.16b, v1.16b, #8
830; CHECK-i64-NEXT:    frintx v0.2s, v0.2s
831; CHECK-i64-NEXT:    frintx v1.2s, v1.2s
832; CHECK-i64-NEXT:    frintx v2.2s, v2.2s
833; CHECK-i64-NEXT:    frintx v3.2s, v3.2s
834; CHECK-i64-NEXT:    fcvtl v0.2d, v0.2s
835; CHECK-i64-NEXT:    fcvtl v1.2d, v1.2s
836; CHECK-i64-NEXT:    fcvtl v4.2d, v2.2s
837; CHECK-i64-NEXT:    fcvtl v3.2d, v3.2s
838; CHECK-i64-NEXT:    fcvtzs v0.2d, v0.2d
839; CHECK-i64-NEXT:    fcvtzs v2.2d, v1.2d
840; CHECK-i64-NEXT:    fcvtzs v1.2d, v4.2d
841; CHECK-i64-NEXT:    fcvtzs v3.2d, v3.2d
842; CHECK-i64-NEXT:    ret
843  %a = call <8 x iXLen> @llvm.lrint.v8iXLen.v8f32(<8 x float> %x)
844  ret <8 x iXLen> %a
845}
846declare <8 x iXLen> @llvm.lrint.v8iXLen.v8f32(<8 x float>)
847
848define <16 x iXLen> @lrint_v16f32(<16 x float> %x) {
849; CHECK-i32-LABEL: lrint_v16f32:
850; CHECK-i32:       // %bb.0:
851; CHECK-i32-NEXT:    frintx v0.4s, v0.4s
852; CHECK-i32-NEXT:    frintx v1.4s, v1.4s
853; CHECK-i32-NEXT:    frintx v2.4s, v2.4s
854; CHECK-i32-NEXT:    frintx v3.4s, v3.4s
855; CHECK-i32-NEXT:    fcvtzs v0.4s, v0.4s
856; CHECK-i32-NEXT:    fcvtzs v1.4s, v1.4s
857; CHECK-i32-NEXT:    fcvtzs v2.4s, v2.4s
858; CHECK-i32-NEXT:    fcvtzs v3.4s, v3.4s
859; CHECK-i32-NEXT:    ret
860;
861; CHECK-i64-LABEL: lrint_v16f32:
862; CHECK-i64:       // %bb.0:
863; CHECK-i64-NEXT:    ext v4.16b, v1.16b, v1.16b, #8
864; CHECK-i64-NEXT:    ext v5.16b, v0.16b, v0.16b, #8
865; CHECK-i64-NEXT:    ext v6.16b, v2.16b, v2.16b, #8
866; CHECK-i64-NEXT:    ext v7.16b, v3.16b, v3.16b, #8
867; CHECK-i64-NEXT:    frintx v0.2s, v0.2s
868; CHECK-i64-NEXT:    frintx v1.2s, v1.2s
869; CHECK-i64-NEXT:    frintx v2.2s, v2.2s
870; CHECK-i64-NEXT:    frintx v3.2s, v3.2s
871; CHECK-i64-NEXT:    frintx v5.2s, v5.2s
872; CHECK-i64-NEXT:    frintx v4.2s, v4.2s
873; CHECK-i64-NEXT:    frintx v6.2s, v6.2s
874; CHECK-i64-NEXT:    frintx v7.2s, v7.2s
875; CHECK-i64-NEXT:    fcvtl v0.2d, v0.2s
876; CHECK-i64-NEXT:    fcvtl v1.2d, v1.2s
877; CHECK-i64-NEXT:    fcvtl v16.2d, v2.2s
878; CHECK-i64-NEXT:    fcvtl v18.2d, v3.2s
879; CHECK-i64-NEXT:    fcvtl v5.2d, v5.2s
880; CHECK-i64-NEXT:    fcvtl v17.2d, v4.2s
881; CHECK-i64-NEXT:    fcvtl v19.2d, v6.2s
882; CHECK-i64-NEXT:    fcvtl v7.2d, v7.2s
883; CHECK-i64-NEXT:    fcvtzs v0.2d, v0.2d
884; CHECK-i64-NEXT:    fcvtzs v2.2d, v1.2d
885; CHECK-i64-NEXT:    fcvtzs v4.2d, v16.2d
886; CHECK-i64-NEXT:    fcvtzs v6.2d, v18.2d
887; CHECK-i64-NEXT:    fcvtzs v1.2d, v5.2d
888; CHECK-i64-NEXT:    fcvtzs v3.2d, v17.2d
889; CHECK-i64-NEXT:    fcvtzs v5.2d, v19.2d
890; CHECK-i64-NEXT:    fcvtzs v7.2d, v7.2d
891; CHECK-i64-NEXT:    ret
892  %a = call <16 x iXLen> @llvm.lrint.v16iXLen.v16f32(<16 x float> %x)
893  ret <16 x iXLen> %a
894}
895declare <16 x iXLen> @llvm.lrint.v16iXLen.v16f32(<16 x float>)
896
897define <32 x iXLen> @lrint_v32f32(<32 x float> %x) {
898; CHECK-i32-LABEL: lrint_v32f32:
899; CHECK-i32:       // %bb.0:
900; CHECK-i32-NEXT:    frintx v0.4s, v0.4s
901; CHECK-i32-NEXT:    frintx v1.4s, v1.4s
902; CHECK-i32-NEXT:    frintx v2.4s, v2.4s
903; CHECK-i32-NEXT:    frintx v3.4s, v3.4s
904; CHECK-i32-NEXT:    frintx v4.4s, v4.4s
905; CHECK-i32-NEXT:    frintx v5.4s, v5.4s
906; CHECK-i32-NEXT:    frintx v6.4s, v6.4s
907; CHECK-i32-NEXT:    frintx v7.4s, v7.4s
908; CHECK-i32-NEXT:    fcvtzs v0.4s, v0.4s
909; CHECK-i32-NEXT:    fcvtzs v1.4s, v1.4s
910; CHECK-i32-NEXT:    fcvtzs v2.4s, v2.4s
911; CHECK-i32-NEXT:    fcvtzs v3.4s, v3.4s
912; CHECK-i32-NEXT:    fcvtzs v4.4s, v4.4s
913; CHECK-i32-NEXT:    fcvtzs v5.4s, v5.4s
914; CHECK-i32-NEXT:    fcvtzs v6.4s, v6.4s
915; CHECK-i32-NEXT:    fcvtzs v7.4s, v7.4s
916; CHECK-i32-NEXT:    ret
917;
918; CHECK-i64-LABEL: lrint_v32f32:
919; CHECK-i64:       // %bb.0:
920; CHECK-i64-NEXT:    ext v16.16b, v7.16b, v7.16b, #8
921; CHECK-i64-NEXT:    ext v17.16b, v6.16b, v6.16b, #8
922; CHECK-i64-NEXT:    frintx v7.2s, v7.2s
923; CHECK-i64-NEXT:    frintx v6.2s, v6.2s
924; CHECK-i64-NEXT:    ext v18.16b, v5.16b, v5.16b, #8
925; CHECK-i64-NEXT:    ext v21.16b, v4.16b, v4.16b, #8
926; CHECK-i64-NEXT:    ext v22.16b, v2.16b, v2.16b, #8
927; CHECK-i64-NEXT:    frintx v5.2s, v5.2s
928; CHECK-i64-NEXT:    ext v23.16b, v3.16b, v3.16b, #8
929; CHECK-i64-NEXT:    frintx v4.2s, v4.2s
930; CHECK-i64-NEXT:    ext v19.16b, v0.16b, v0.16b, #8
931; CHECK-i64-NEXT:    ext v20.16b, v1.16b, v1.16b, #8
932; CHECK-i64-NEXT:    frintx v16.2s, v16.2s
933; CHECK-i64-NEXT:    frintx v17.2s, v17.2s
934; CHECK-i64-NEXT:    fcvtl v7.2d, v7.2s
935; CHECK-i64-NEXT:    fcvtl v6.2d, v6.2s
936; CHECK-i64-NEXT:    frintx v18.2s, v18.2s
937; CHECK-i64-NEXT:    frintx v21.2s, v21.2s
938; CHECK-i64-NEXT:    frintx v2.2s, v2.2s
939; CHECK-i64-NEXT:    frintx v3.2s, v3.2s
940; CHECK-i64-NEXT:    fcvtl v5.2d, v5.2s
941; CHECK-i64-NEXT:    frintx v23.2s, v23.2s
942; CHECK-i64-NEXT:    fcvtl v4.2d, v4.2s
943; CHECK-i64-NEXT:    frintx v1.2s, v1.2s
944; CHECK-i64-NEXT:    fcvtl v16.2d, v16.2s
945; CHECK-i64-NEXT:    fcvtl v17.2d, v17.2s
946; CHECK-i64-NEXT:    fcvtzs v7.2d, v7.2d
947; CHECK-i64-NEXT:    fcvtzs v6.2d, v6.2d
948; CHECK-i64-NEXT:    fcvtl v18.2d, v18.2s
949; CHECK-i64-NEXT:    fcvtl v21.2d, v21.2s
950; CHECK-i64-NEXT:    frintx v20.2s, v20.2s
951; CHECK-i64-NEXT:    fcvtl v3.2d, v3.2s
952; CHECK-i64-NEXT:    fcvtzs v5.2d, v5.2d
953; CHECK-i64-NEXT:    frintx v0.2s, v0.2s
954; CHECK-i64-NEXT:    fcvtl v2.2d, v2.2s
955; CHECK-i64-NEXT:    fcvtzs v4.2d, v4.2d
956; CHECK-i64-NEXT:    fcvtzs v16.2d, v16.2d
957; CHECK-i64-NEXT:    fcvtzs v17.2d, v17.2d
958; CHECK-i64-NEXT:    fcvtl v1.2d, v1.2s
959; CHECK-i64-NEXT:    fcvtzs v3.2d, v3.2d
960; CHECK-i64-NEXT:    fcvtl v0.2d, v0.2s
961; CHECK-i64-NEXT:    fcvtzs v2.2d, v2.2d
962; CHECK-i64-NEXT:    stp q6, q17, [x8, #192]
963; CHECK-i64-NEXT:    fcvtl v6.2d, v23.2s
964; CHECK-i64-NEXT:    frintx v17.2s, v19.2s
965; CHECK-i64-NEXT:    stp q7, q16, [x8, #224]
966; CHECK-i64-NEXT:    frintx v7.2s, v22.2s
967; CHECK-i64-NEXT:    fcvtzs v16.2d, v18.2d
968; CHECK-i64-NEXT:    fcvtzs v18.2d, v21.2d
969; CHECK-i64-NEXT:    fcvtzs v1.2d, v1.2d
970; CHECK-i64-NEXT:    fcvtzs v0.2d, v0.2d
971; CHECK-i64-NEXT:    fcvtzs v6.2d, v6.2d
972; CHECK-i64-NEXT:    stp q5, q16, [x8, #160]
973; CHECK-i64-NEXT:    fcvtl v7.2d, v7.2s
974; CHECK-i64-NEXT:    fcvtl v5.2d, v20.2s
975; CHECK-i64-NEXT:    stp q4, q18, [x8, #128]
976; CHECK-i64-NEXT:    fcvtl v4.2d, v17.2s
977; CHECK-i64-NEXT:    stp q3, q6, [x8, #96]
978; CHECK-i64-NEXT:    fcvtzs v7.2d, v7.2d
979; CHECK-i64-NEXT:    fcvtzs v3.2d, v5.2d
980; CHECK-i64-NEXT:    stp q1, q3, [x8, #32]
981; CHECK-i64-NEXT:    stp q2, q7, [x8, #64]
982; CHECK-i64-NEXT:    fcvtzs v2.2d, v4.2d
983; CHECK-i64-NEXT:    stp q0, q2, [x8]
984; CHECK-i64-NEXT:    ret
985  %a = call <32 x iXLen> @llvm.lrint.v32iXLen.v32f32(<32 x float> %x)
986  ret <32 x iXLen> %a
987}
988declare <32 x iXLen> @llvm.lrint.v32iXLen.v32f32(<32 x float>)
989
990define <1 x iXLen> @lrint_v1f64(<1 x double> %x) {
991; CHECK-i32-LABEL: lrint_v1f64:
992; CHECK-i32:       // %bb.0:
993; CHECK-i32-NEXT:    frintx d0, d0
994; CHECK-i32-NEXT:    fcvtzs w8, d0
995; CHECK-i32-NEXT:    fmov s0, w8
996; CHECK-i32-NEXT:    ret
997;
998; CHECK-i64-LABEL: lrint_v1f64:
999; CHECK-i64:       // %bb.0:
1000; CHECK-i64-NEXT:    frintx d0, d0
1001; CHECK-i64-NEXT:    fcvtzs x8, d0
1002; CHECK-i64-NEXT:    fmov d0, x8
1003; CHECK-i64-NEXT:    ret
1004  %a = call <1 x iXLen> @llvm.lrint.v1iXLen.v1f64(<1 x double> %x)
1005  ret <1 x iXLen> %a
1006}
1007declare <1 x iXLen> @llvm.lrint.v1iXLen.v1f64(<1 x double>)
1008
1009define <2 x iXLen> @lrint_v2f64(<2 x double> %x) {
1010; CHECK-i32-LABEL: lrint_v2f64:
1011; CHECK-i32:       // %bb.0:
1012; CHECK-i32-NEXT:    frintx v0.2d, v0.2d
1013; CHECK-i32-NEXT:    mov d1, v0.d[1]
1014; CHECK-i32-NEXT:    fcvtzs w8, d0
1015; CHECK-i32-NEXT:    fcvtzs w9, d1
1016; CHECK-i32-NEXT:    fmov s0, w8
1017; CHECK-i32-NEXT:    mov v0.s[1], w9
1018; CHECK-i32-NEXT:    // kill: def $d0 killed $d0 killed $q0
1019; CHECK-i32-NEXT:    ret
1020;
1021; CHECK-i64-LABEL: lrint_v2f64:
1022; CHECK-i64:       // %bb.0:
1023; CHECK-i64-NEXT:    frintx v0.2d, v0.2d
1024; CHECK-i64-NEXT:    fcvtzs v0.2d, v0.2d
1025; CHECK-i64-NEXT:    ret
1026  %a = call <2 x iXLen> @llvm.lrint.v2iXLen.v2f64(<2 x double> %x)
1027  ret <2 x iXLen> %a
1028}
1029declare <2 x iXLen> @llvm.lrint.v2iXLen.v2f64(<2 x double>)
1030
1031define <4 x iXLen> @lrint_v4f64(<4 x double> %x) {
1032; CHECK-i32-LABEL: lrint_v4f64:
1033; CHECK-i32:       // %bb.0:
1034; CHECK-i32-NEXT:    frintx v0.2d, v0.2d
1035; CHECK-i32-NEXT:    frintx v1.2d, v1.2d
1036; CHECK-i32-NEXT:    mov d2, v0.d[1]
1037; CHECK-i32-NEXT:    fcvtzs w8, d0
1038; CHECK-i32-NEXT:    fcvtzs w9, d2
1039; CHECK-i32-NEXT:    fmov s0, w8
1040; CHECK-i32-NEXT:    fcvtzs w8, d1
1041; CHECK-i32-NEXT:    mov d1, v1.d[1]
1042; CHECK-i32-NEXT:    mov v0.s[1], w9
1043; CHECK-i32-NEXT:    mov v0.s[2], w8
1044; CHECK-i32-NEXT:    fcvtzs w8, d1
1045; CHECK-i32-NEXT:    mov v0.s[3], w8
1046; CHECK-i32-NEXT:    ret
1047;
1048; CHECK-i64-LABEL: lrint_v4f64:
1049; CHECK-i64:       // %bb.0:
1050; CHECK-i64-NEXT:    frintx v0.2d, v0.2d
1051; CHECK-i64-NEXT:    frintx v1.2d, v1.2d
1052; CHECK-i64-NEXT:    fcvtzs v0.2d, v0.2d
1053; CHECK-i64-NEXT:    fcvtzs v1.2d, v1.2d
1054; CHECK-i64-NEXT:    ret
1055  %a = call <4 x iXLen> @llvm.lrint.v4iXLen.v4f64(<4 x double> %x)
1056  ret <4 x iXLen> %a
1057}
1058declare <4 x iXLen> @llvm.lrint.v4iXLen.v4f64(<4 x double>)
1059
1060define <8 x iXLen> @lrint_v8f64(<8 x double> %x) {
1061; CHECK-i32-LABEL: lrint_v8f64:
1062; CHECK-i32:       // %bb.0:
1063; CHECK-i32-NEXT:    frintx v2.2d, v2.2d
1064; CHECK-i32-NEXT:    frintx v0.2d, v0.2d
1065; CHECK-i32-NEXT:    frintx v3.2d, v3.2d
1066; CHECK-i32-NEXT:    mov d4, v0.d[1]
1067; CHECK-i32-NEXT:    mov d5, v2.d[1]
1068; CHECK-i32-NEXT:    fcvtzs w8, d0
1069; CHECK-i32-NEXT:    fcvtzs w9, d2
1070; CHECK-i32-NEXT:    frintx v2.2d, v1.2d
1071; CHECK-i32-NEXT:    fcvtzs w10, d4
1072; CHECK-i32-NEXT:    fcvtzs w11, d5
1073; CHECK-i32-NEXT:    fmov s0, w8
1074; CHECK-i32-NEXT:    fmov s1, w9
1075; CHECK-i32-NEXT:    fcvtzs w8, d2
1076; CHECK-i32-NEXT:    mov d2, v2.d[1]
1077; CHECK-i32-NEXT:    fcvtzs w9, d3
1078; CHECK-i32-NEXT:    mov d3, v3.d[1]
1079; CHECK-i32-NEXT:    mov v0.s[1], w10
1080; CHECK-i32-NEXT:    mov v1.s[1], w11
1081; CHECK-i32-NEXT:    mov v0.s[2], w8
1082; CHECK-i32-NEXT:    fcvtzs w8, d2
1083; CHECK-i32-NEXT:    mov v1.s[2], w9
1084; CHECK-i32-NEXT:    fcvtzs w9, d3
1085; CHECK-i32-NEXT:    mov v0.s[3], w8
1086; CHECK-i32-NEXT:    mov v1.s[3], w9
1087; CHECK-i32-NEXT:    ret
1088;
1089; CHECK-i64-LABEL: lrint_v8f64:
1090; CHECK-i64:       // %bb.0:
1091; CHECK-i64-NEXT:    frintx v0.2d, v0.2d
1092; CHECK-i64-NEXT:    frintx v1.2d, v1.2d
1093; CHECK-i64-NEXT:    frintx v2.2d, v2.2d
1094; CHECK-i64-NEXT:    frintx v3.2d, v3.2d
1095; CHECK-i64-NEXT:    fcvtzs v0.2d, v0.2d
1096; CHECK-i64-NEXT:    fcvtzs v1.2d, v1.2d
1097; CHECK-i64-NEXT:    fcvtzs v2.2d, v2.2d
1098; CHECK-i64-NEXT:    fcvtzs v3.2d, v3.2d
1099; CHECK-i64-NEXT:    ret
1100  %a = call <8 x iXLen> @llvm.lrint.v8iXLen.v8f64(<8 x double> %x)
1101  ret <8 x iXLen> %a
1102}
1103declare <8 x iXLen> @llvm.lrint.v8iXLen.v8f64(<8 x double>)
1104
1105define <16 x iXLen> @lrint_v16f64(<16 x double> %x) {
1106; CHECK-i32-LABEL: lrint_v16f64:
1107; CHECK-i32:       // %bb.0:
1108; CHECK-i32-NEXT:    frintx v0.2d, v0.2d
1109; CHECK-i32-NEXT:    frintx v2.2d, v2.2d
1110; CHECK-i32-NEXT:    frintx v4.2d, v4.2d
1111; CHECK-i32-NEXT:    frintx v6.2d, v6.2d
1112; CHECK-i32-NEXT:    frintx v17.2d, v1.2d
1113; CHECK-i32-NEXT:    frintx v5.2d, v5.2d
1114; CHECK-i32-NEXT:    fcvtzs w8, d0
1115; CHECK-i32-NEXT:    mov d16, v0.d[1]
1116; CHECK-i32-NEXT:    fcvtzs w9, d2
1117; CHECK-i32-NEXT:    mov d2, v2.d[1]
1118; CHECK-i32-NEXT:    fcvtzs w10, d4
1119; CHECK-i32-NEXT:    mov d4, v4.d[1]
1120; CHECK-i32-NEXT:    fcvtzs w11, d6
1121; CHECK-i32-NEXT:    mov d6, v6.d[1]
1122; CHECK-i32-NEXT:    fmov s0, w8
1123; CHECK-i32-NEXT:    fcvtzs w8, d16
1124; CHECK-i32-NEXT:    frintx v16.2d, v3.2d
1125; CHECK-i32-NEXT:    fmov s1, w9
1126; CHECK-i32-NEXT:    fcvtzs w9, d2
1127; CHECK-i32-NEXT:    fmov s2, w10
1128; CHECK-i32-NEXT:    fcvtzs w10, d4
1129; CHECK-i32-NEXT:    frintx v4.2d, v7.2d
1130; CHECK-i32-NEXT:    fmov s3, w11
1131; CHECK-i32-NEXT:    fcvtzs w11, d6
1132; CHECK-i32-NEXT:    mov d6, v17.d[1]
1133; CHECK-i32-NEXT:    mov v0.s[1], w8
1134; CHECK-i32-NEXT:    fcvtzs w8, d17
1135; CHECK-i32-NEXT:    mov d7, v16.d[1]
1136; CHECK-i32-NEXT:    mov v1.s[1], w9
1137; CHECK-i32-NEXT:    fcvtzs w9, d16
1138; CHECK-i32-NEXT:    mov v2.s[1], w10
1139; CHECK-i32-NEXT:    fcvtzs w10, d5
1140; CHECK-i32-NEXT:    mov d5, v5.d[1]
1141; CHECK-i32-NEXT:    mov v3.s[1], w11
1142; CHECK-i32-NEXT:    fcvtzs w11, d4
1143; CHECK-i32-NEXT:    mov d4, v4.d[1]
1144; CHECK-i32-NEXT:    mov v0.s[2], w8
1145; CHECK-i32-NEXT:    fcvtzs w8, d6
1146; CHECK-i32-NEXT:    mov v1.s[2], w9
1147; CHECK-i32-NEXT:    fcvtzs w9, d7
1148; CHECK-i32-NEXT:    mov v2.s[2], w10
1149; CHECK-i32-NEXT:    fcvtzs w10, d5
1150; CHECK-i32-NEXT:    mov v3.s[2], w11
1151; CHECK-i32-NEXT:    fcvtzs w11, d4
1152; CHECK-i32-NEXT:    mov v0.s[3], w8
1153; CHECK-i32-NEXT:    mov v1.s[3], w9
1154; CHECK-i32-NEXT:    mov v2.s[3], w10
1155; CHECK-i32-NEXT:    mov v3.s[3], w11
1156; CHECK-i32-NEXT:    ret
1157;
1158; CHECK-i64-LABEL: lrint_v16f64:
1159; CHECK-i64:       // %bb.0:
1160; CHECK-i64-NEXT:    frintx v0.2d, v0.2d
1161; CHECK-i64-NEXT:    frintx v1.2d, v1.2d
1162; CHECK-i64-NEXT:    frintx v2.2d, v2.2d
1163; CHECK-i64-NEXT:    frintx v3.2d, v3.2d
1164; CHECK-i64-NEXT:    frintx v4.2d, v4.2d
1165; CHECK-i64-NEXT:    frintx v5.2d, v5.2d
1166; CHECK-i64-NEXT:    frintx v6.2d, v6.2d
1167; CHECK-i64-NEXT:    frintx v7.2d, v7.2d
1168; CHECK-i64-NEXT:    fcvtzs v0.2d, v0.2d
1169; CHECK-i64-NEXT:    fcvtzs v1.2d, v1.2d
1170; CHECK-i64-NEXT:    fcvtzs v2.2d, v2.2d
1171; CHECK-i64-NEXT:    fcvtzs v3.2d, v3.2d
1172; CHECK-i64-NEXT:    fcvtzs v4.2d, v4.2d
1173; CHECK-i64-NEXT:    fcvtzs v5.2d, v5.2d
1174; CHECK-i64-NEXT:    fcvtzs v6.2d, v6.2d
1175; CHECK-i64-NEXT:    fcvtzs v7.2d, v7.2d
1176; CHECK-i64-NEXT:    ret
1177  %a = call <16 x iXLen> @llvm.lrint.v16iXLen.v16f64(<16 x double> %x)
1178  ret <16 x iXLen> %a
1179}
1180declare <16 x iXLen> @llvm.lrint.v16iXLen.v16f64(<16 x double>)
1181
1182define <32 x iXLen> @lrint_v32f64(<32 x double> %x) {
1183; CHECK-i32-LABEL: lrint_v32f64:
1184; CHECK-i32:       // %bb.0:
1185; CHECK-i32-NEXT:    frintx v17.2d, v0.2d
1186; CHECK-i32-NEXT:    frintx v19.2d, v2.2d
1187; CHECK-i32-NEXT:    frintx v0.2d, v1.2d
1188; CHECK-i32-NEXT:    frintx v1.2d, v4.2d
1189; CHECK-i32-NEXT:    frintx v2.2d, v3.2d
1190; CHECK-i32-NEXT:    frintx v3.2d, v5.2d
1191; CHECK-i32-NEXT:    ldp q16, q5, [sp]
1192; CHECK-i32-NEXT:    frintx v18.2d, v6.2d
1193; CHECK-i32-NEXT:    frintx v4.2d, v7.2d
1194; CHECK-i32-NEXT:    ldp q22, q6, [sp, #64]
1195; CHECK-i32-NEXT:    mov d20, v17.d[1]
1196; CHECK-i32-NEXT:    mov d21, v19.d[1]
1197; CHECK-i32-NEXT:    fcvtzs w8, d17
1198; CHECK-i32-NEXT:    fcvtzs w9, d19
1199; CHECK-i32-NEXT:    ldp q17, q7, [sp, #32]
1200; CHECK-i32-NEXT:    fcvtzs w12, d0
1201; CHECK-i32-NEXT:    mov d19, v1.d[1]
1202; CHECK-i32-NEXT:    fcvtzs w13, d1
1203; CHECK-i32-NEXT:    frintx v16.2d, v16.2d
1204; CHECK-i32-NEXT:    mov d23, v18.d[1]
1205; CHECK-i32-NEXT:    fcvtzs w15, d18
1206; CHECK-i32-NEXT:    fcvtzs w10, d20
1207; CHECK-i32-NEXT:    fcvtzs w11, d21
1208; CHECK-i32-NEXT:    mov d21, v0.d[1]
1209; CHECK-i32-NEXT:    fmov s0, w8
1210; CHECK-i32-NEXT:    fmov s1, w9
1211; CHECK-i32-NEXT:    frintx v17.2d, v17.2d
1212; CHECK-i32-NEXT:    frintx v20.2d, v22.2d
1213; CHECK-i32-NEXT:    mov d22, v2.d[1]
1214; CHECK-i32-NEXT:    fcvtzs w14, d19
1215; CHECK-i32-NEXT:    mov d18, v16.d[1]
1216; CHECK-i32-NEXT:    frintx v7.2d, v7.2d
1217; CHECK-i32-NEXT:    mov v0.s[1], w10
1218; CHECK-i32-NEXT:    fcvtzs w10, d2
1219; CHECK-i32-NEXT:    mov v1.s[1], w11
1220; CHECK-i32-NEXT:    fcvtzs w8, d21
1221; CHECK-i32-NEXT:    ldp q21, q19, [sp, #96]
1222; CHECK-i32-NEXT:    fmov s2, w13
1223; CHECK-i32-NEXT:    fcvtzs w11, d23
1224; CHECK-i32-NEXT:    mov d23, v3.d[1]
1225; CHECK-i32-NEXT:    fcvtzs w9, d22
1226; CHECK-i32-NEXT:    mov d22, v17.d[1]
1227; CHECK-i32-NEXT:    fcvtzs w13, d18
1228; CHECK-i32-NEXT:    mov v0.s[2], w12
1229; CHECK-i32-NEXT:    fcvtzs w12, d16
1230; CHECK-i32-NEXT:    mov v1.s[2], w10
1231; CHECK-i32-NEXT:    fcvtzs w10, d3
1232; CHECK-i32-NEXT:    fmov s3, w15
1233; CHECK-i32-NEXT:    frintx v21.2d, v21.2d
1234; CHECK-i32-NEXT:    mov v2.s[1], w14
1235; CHECK-i32-NEXT:    mov d16, v20.d[1]
1236; CHECK-i32-NEXT:    fcvtzs w14, d17
1237; CHECK-i32-NEXT:    mov d17, v4.d[1]
1238; CHECK-i32-NEXT:    fcvtzs w15, d22
1239; CHECK-i32-NEXT:    frintx v22.2d, v5.2d
1240; CHECK-i32-NEXT:    mov v3.s[1], w11
1241; CHECK-i32-NEXT:    fcvtzs w11, d4
1242; CHECK-i32-NEXT:    fmov s4, w12
1243; CHECK-i32-NEXT:    fcvtzs w12, d20
1244; CHECK-i32-NEXT:    mov d18, v21.d[1]
1245; CHECK-i32-NEXT:    mov d20, v7.d[1]
1246; CHECK-i32-NEXT:    fmov s5, w14
1247; CHECK-i32-NEXT:    fcvtzs w14, d21
1248; CHECK-i32-NEXT:    mov v2.s[2], w10
1249; CHECK-i32-NEXT:    mov v4.s[1], w13
1250; CHECK-i32-NEXT:    fcvtzs w13, d16
1251; CHECK-i32-NEXT:    frintx v16.2d, v6.2d
1252; CHECK-i32-NEXT:    fcvtzs w10, d23
1253; CHECK-i32-NEXT:    mov v3.s[2], w11
1254; CHECK-i32-NEXT:    fcvtzs w11, d17
1255; CHECK-i32-NEXT:    fmov s6, w12
1256; CHECK-i32-NEXT:    mov v5.s[1], w15
1257; CHECK-i32-NEXT:    fcvtzs w15, d18
1258; CHECK-i32-NEXT:    frintx v18.2d, v19.2d
1259; CHECK-i32-NEXT:    fcvtzs w12, d22
1260; CHECK-i32-NEXT:    mov d19, v22.d[1]
1261; CHECK-i32-NEXT:    mov v0.s[3], w8
1262; CHECK-i32-NEXT:    mov v1.s[3], w9
1263; CHECK-i32-NEXT:    mov v6.s[1], w13
1264; CHECK-i32-NEXT:    fcvtzs w13, d7
1265; CHECK-i32-NEXT:    fmov s7, w14
1266; CHECK-i32-NEXT:    fcvtzs w14, d16
1267; CHECK-i32-NEXT:    mov d16, v16.d[1]
1268; CHECK-i32-NEXT:    mov v2.s[3], w10
1269; CHECK-i32-NEXT:    mov v4.s[2], w12
1270; CHECK-i32-NEXT:    fcvtzs w12, d19
1271; CHECK-i32-NEXT:    mov v3.s[3], w11
1272; CHECK-i32-NEXT:    mov v7.s[1], w15
1273; CHECK-i32-NEXT:    fcvtzs w15, d18
1274; CHECK-i32-NEXT:    mov d18, v18.d[1]
1275; CHECK-i32-NEXT:    mov v5.s[2], w13
1276; CHECK-i32-NEXT:    fcvtzs w13, d20
1277; CHECK-i32-NEXT:    mov v6.s[2], w14
1278; CHECK-i32-NEXT:    fcvtzs w14, d16
1279; CHECK-i32-NEXT:    mov v4.s[3], w12
1280; CHECK-i32-NEXT:    mov v7.s[2], w15
1281; CHECK-i32-NEXT:    fcvtzs w15, d18
1282; CHECK-i32-NEXT:    mov v5.s[3], w13
1283; CHECK-i32-NEXT:    mov v6.s[3], w14
1284; CHECK-i32-NEXT:    mov v7.s[3], w15
1285; CHECK-i32-NEXT:    ret
1286;
1287; CHECK-i64-LABEL: lrint_v32f64:
1288; CHECK-i64:       // %bb.0:
1289; CHECK-i64-NEXT:    ldp q17, q16, [sp, #96]
1290; CHECK-i64-NEXT:    frintx v7.2d, v7.2d
1291; CHECK-i64-NEXT:    ldp q19, q18, [sp, #64]
1292; CHECK-i64-NEXT:    frintx v6.2d, v6.2d
1293; CHECK-i64-NEXT:    ldp q21, q20, [sp, #32]
1294; CHECK-i64-NEXT:    frintx v5.2d, v5.2d
1295; CHECK-i64-NEXT:    frintx v16.2d, v16.2d
1296; CHECK-i64-NEXT:    frintx v17.2d, v17.2d
1297; CHECK-i64-NEXT:    frintx v4.2d, v4.2d
1298; CHECK-i64-NEXT:    frintx v18.2d, v18.2d
1299; CHECK-i64-NEXT:    frintx v19.2d, v19.2d
1300; CHECK-i64-NEXT:    frintx v3.2d, v3.2d
1301; CHECK-i64-NEXT:    ldp q23, q22, [sp]
1302; CHECK-i64-NEXT:    frintx v20.2d, v20.2d
1303; CHECK-i64-NEXT:    frintx v21.2d, v21.2d
1304; CHECK-i64-NEXT:    frintx v2.2d, v2.2d
1305; CHECK-i64-NEXT:    frintx v1.2d, v1.2d
1306; CHECK-i64-NEXT:    fcvtzs v16.2d, v16.2d
1307; CHECK-i64-NEXT:    fcvtzs v17.2d, v17.2d
1308; CHECK-i64-NEXT:    frintx v0.2d, v0.2d
1309; CHECK-i64-NEXT:    frintx v22.2d, v22.2d
1310; CHECK-i64-NEXT:    fcvtzs v18.2d, v18.2d
1311; CHECK-i64-NEXT:    frintx v23.2d, v23.2d
1312; CHECK-i64-NEXT:    fcvtzs v19.2d, v19.2d
1313; CHECK-i64-NEXT:    fcvtzs v20.2d, v20.2d
1314; CHECK-i64-NEXT:    fcvtzs v7.2d, v7.2d
1315; CHECK-i64-NEXT:    fcvtzs v6.2d, v6.2d
1316; CHECK-i64-NEXT:    fcvtzs v5.2d, v5.2d
1317; CHECK-i64-NEXT:    fcvtzs v4.2d, v4.2d
1318; CHECK-i64-NEXT:    stp q17, q16, [x8, #224]
1319; CHECK-i64-NEXT:    fcvtzs v16.2d, v21.2d
1320; CHECK-i64-NEXT:    fcvtzs v3.2d, v3.2d
1321; CHECK-i64-NEXT:    fcvtzs v17.2d, v22.2d
1322; CHECK-i64-NEXT:    fcvtzs v2.2d, v2.2d
1323; CHECK-i64-NEXT:    fcvtzs v1.2d, v1.2d
1324; CHECK-i64-NEXT:    stp q19, q18, [x8, #192]
1325; CHECK-i64-NEXT:    fcvtzs v18.2d, v23.2d
1326; CHECK-i64-NEXT:    fcvtzs v0.2d, v0.2d
1327; CHECK-i64-NEXT:    stp q4, q5, [x8, #64]
1328; CHECK-i64-NEXT:    stp q6, q7, [x8, #96]
1329; CHECK-i64-NEXT:    stp q2, q3, [x8, #32]
1330; CHECK-i64-NEXT:    stp q0, q1, [x8]
1331; CHECK-i64-NEXT:    stp q18, q17, [x8, #128]
1332; CHECK-i64-NEXT:    stp q16, q20, [x8, #160]
1333; CHECK-i64-NEXT:    ret
1334  %a = call <32 x iXLen> @llvm.lrint.v32iXLen.v16f64(<32 x double> %x)
1335  ret <32 x iXLen> %a
1336}
1337declare <32 x iXLen> @llvm.lrint.v32iXLen.v32f64(<32 x double>)
1338