1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s --check-prefixes=CHECK 3 4; Note: halves are tested in fp16-v8-instructions.ll. 5 6define <4 x float> @sitofp_v4i8_float(<4 x i8> %a) { 7; CHECK-LABEL: sitofp_v4i8_float: 8; CHECK: // %bb.0: 9; CHECK-NEXT: shl v0.4h, v0.4h, #8 10; CHECK-NEXT: sshr v0.4h, v0.4h, #8 11; CHECK-NEXT: sshll v0.4s, v0.4h, #0 12; CHECK-NEXT: scvtf v0.4s, v0.4s 13; CHECK-NEXT: ret 14 %1 = sitofp <4 x i8> %a to <4 x float> 15 ret <4 x float> %1 16} 17 18define <8 x float> @sitofp_v8i8_float(<8 x i8> %a) { 19; CHECK-LABEL: sitofp_v8i8_float: 20; CHECK: // %bb.0: 21; CHECK-NEXT: zip1 v1.8b, v0.8b, v0.8b 22; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b 23; CHECK-NEXT: shl v1.4h, v1.4h, #8 24; CHECK-NEXT: shl v0.4h, v0.4h, #8 25; CHECK-NEXT: sshr v1.4h, v1.4h, #8 26; CHECK-NEXT: sshr v0.4h, v0.4h, #8 27; CHECK-NEXT: sshll v1.4s, v1.4h, #0 28; CHECK-NEXT: sshll v2.4s, v0.4h, #0 29; CHECK-NEXT: scvtf v0.4s, v1.4s 30; CHECK-NEXT: scvtf v1.4s, v2.4s 31; CHECK-NEXT: ret 32 %1 = sitofp <8 x i8> %a to <8 x float> 33 ret <8 x float> %1 34} 35 36define <16 x float> @sitofp_v16i8_float(<16 x i8> %a) { 37; CHECK-LABEL: sitofp_v16i8_float: 38; CHECK: // %bb.0: 39; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8 40; CHECK-NEXT: zip1 v2.8b, v0.8b, v0.8b 41; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b 42; CHECK-NEXT: zip1 v3.8b, v1.8b, v0.8b 43; CHECK-NEXT: zip2 v1.8b, v1.8b, v0.8b 44; CHECK-NEXT: shl v2.4h, v2.4h, #8 45; CHECK-NEXT: shl v0.4h, v0.4h, #8 46; CHECK-NEXT: sshr v2.4h, v2.4h, #8 47; CHECK-NEXT: shl v3.4h, v3.4h, #8 48; CHECK-NEXT: shl v1.4h, v1.4h, #8 49; CHECK-NEXT: sshr v0.4h, v0.4h, #8 50; CHECK-NEXT: sshll v2.4s, v2.4h, #0 51; CHECK-NEXT: sshr v3.4h, v3.4h, #8 52; CHECK-NEXT: sshr v1.4h, v1.4h, #8 53; CHECK-NEXT: sshll v4.4s, v0.4h, #0 54; CHECK-NEXT: scvtf v0.4s, v2.4s 55; CHECK-NEXT: sshll v3.4s, v3.4h, #0 56; CHECK-NEXT: sshll v5.4s, v1.4h, #0 57; CHECK-NEXT: scvtf v1.4s, v4.4s 58; CHECK-NEXT: scvtf v2.4s, v3.4s 59; CHECK-NEXT: scvtf v3.4s, v5.4s 60; CHECK-NEXT: ret 61 %1 = sitofp <16 x i8> %a to <16 x float> 62 ret <16 x float> %1 63} 64 65define <8 x float> @sitofp_i16_float(<8 x i16> %a) { 66; CHECK-LABEL: sitofp_i16_float: 67; CHECK: // %bb.0: 68; CHECK-NEXT: sshll2 v1.4s, v0.8h, #0 69; CHECK-NEXT: sshll v0.4s, v0.4h, #0 70; CHECK-NEXT: scvtf v1.4s, v1.4s 71; CHECK-NEXT: scvtf v0.4s, v0.4s 72; CHECK-NEXT: ret 73 %1 = sitofp <8 x i16> %a to <8 x float> 74 ret <8 x float> %1 75} 76 77define <8 x float> @sitofp_i32_float(<8 x i32> %a) { 78; CHECK-LABEL: sitofp_i32_float: 79; CHECK: // %bb.0: 80; CHECK-NEXT: scvtf v0.4s, v0.4s 81; CHECK-NEXT: scvtf v1.4s, v1.4s 82; CHECK-NEXT: ret 83 %1 = sitofp <8 x i32> %a to <8 x float> 84 ret <8 x float> %1 85} 86 87define <8 x float> @sitofp_i64_float(<8 x i64> %a) { 88; CHECK-LABEL: sitofp_i64_float: 89; CHECK: // %bb.0: 90; CHECK-NEXT: scvtf v0.2d, v0.2d 91; CHECK-NEXT: scvtf v2.2d, v2.2d 92; CHECK-NEXT: scvtf v4.2d, v1.2d 93; CHECK-NEXT: fcvtn v0.2s, v0.2d 94; CHECK-NEXT: fcvtn v1.2s, v2.2d 95; CHECK-NEXT: scvtf v2.2d, v3.2d 96; CHECK-NEXT: fcvtn2 v0.4s, v4.2d 97; CHECK-NEXT: fcvtn2 v1.4s, v2.2d 98; CHECK-NEXT: ret 99 %1 = sitofp <8 x i64> %a to <8 x float> 100 ret <8 x float> %1 101} 102 103define <4 x float> @uitofp_v4i8_float(<4 x i8> %a) { 104; CHECK-LABEL: uitofp_v4i8_float: 105; CHECK: // %bb.0: 106; CHECK-NEXT: bic v0.4h, #255, lsl #8 107; CHECK-NEXT: ushll v0.4s, v0.4h, #0 108; CHECK-NEXT: ucvtf v0.4s, v0.4s 109; CHECK-NEXT: ret 110 %1 = uitofp <4 x i8> %a to <4 x float> 111 ret <4 x float> %1 112} 113 114define <8 x float> @uitofp_v8i8_float(<8 x i8> %a) { 115; CHECK-LABEL: uitofp_v8i8_float: 116; CHECK: // %bb.0: 117; CHECK-NEXT: zip1 v1.8b, v0.8b, v0.8b 118; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b 119; CHECK-NEXT: bic v1.4h, #255, lsl #8 120; CHECK-NEXT: bic v0.4h, #255, lsl #8 121; CHECK-NEXT: ushll v1.4s, v1.4h, #0 122; CHECK-NEXT: ushll v2.4s, v0.4h, #0 123; CHECK-NEXT: ucvtf v0.4s, v1.4s 124; CHECK-NEXT: ucvtf v1.4s, v2.4s 125; CHECK-NEXT: ret 126 %1 = uitofp <8 x i8> %a to <8 x float> 127 ret <8 x float> %1 128} 129 130define <16 x float> @uitofp_v16i8_float(<16 x i8> %a) { 131; CHECK-LABEL: uitofp_v16i8_float: 132; CHECK: // %bb.0: 133; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8 134; CHECK-NEXT: zip1 v2.8b, v0.8b, v0.8b 135; CHECK-NEXT: zip2 v0.8b, v0.8b, v0.8b 136; CHECK-NEXT: zip1 v3.8b, v1.8b, v0.8b 137; CHECK-NEXT: zip2 v1.8b, v1.8b, v0.8b 138; CHECK-NEXT: bic v2.4h, #255, lsl #8 139; CHECK-NEXT: bic v0.4h, #255, lsl #8 140; CHECK-NEXT: ushll v2.4s, v2.4h, #0 141; CHECK-NEXT: bic v3.4h, #255, lsl #8 142; CHECK-NEXT: bic v1.4h, #255, lsl #8 143; CHECK-NEXT: ushll v4.4s, v0.4h, #0 144; CHECK-NEXT: ucvtf v0.4s, v2.4s 145; CHECK-NEXT: ushll v3.4s, v3.4h, #0 146; CHECK-NEXT: ushll v5.4s, v1.4h, #0 147; CHECK-NEXT: ucvtf v1.4s, v4.4s 148; CHECK-NEXT: ucvtf v2.4s, v3.4s 149; CHECK-NEXT: ucvtf v3.4s, v5.4s 150; CHECK-NEXT: ret 151 %1 = uitofp <16 x i8> %a to <16 x float> 152 ret <16 x float> %1 153} 154 155define <8 x float> @uitofp_i16_float(<8 x i16> %a) { 156; CHECK-LABEL: uitofp_i16_float: 157; CHECK: // %bb.0: 158; CHECK-NEXT: ushll2 v1.4s, v0.8h, #0 159; CHECK-NEXT: ushll v0.4s, v0.4h, #0 160; CHECK-NEXT: ucvtf v1.4s, v1.4s 161; CHECK-NEXT: ucvtf v0.4s, v0.4s 162; CHECK-NEXT: ret 163 %1 = uitofp <8 x i16> %a to <8 x float> 164 ret <8 x float> %1 165} 166 167define <8 x float> @uitofp_i32_float(<8 x i32> %a) { 168; CHECK-LABEL: uitofp_i32_float: 169; CHECK: // %bb.0: 170; CHECK-NEXT: ucvtf v0.4s, v0.4s 171; CHECK-NEXT: ucvtf v1.4s, v1.4s 172; CHECK-NEXT: ret 173 %1 = uitofp <8 x i32> %a to <8 x float> 174 ret <8 x float> %1 175} 176 177define <8 x float> @uitofp_i64_float(<8 x i64> %a) { 178; CHECK-LABEL: uitofp_i64_float: 179; CHECK: // %bb.0: 180; CHECK-NEXT: ucvtf v0.2d, v0.2d 181; CHECK-NEXT: ucvtf v2.2d, v2.2d 182; CHECK-NEXT: ucvtf v4.2d, v1.2d 183; CHECK-NEXT: fcvtn v0.2s, v0.2d 184; CHECK-NEXT: fcvtn v1.2s, v2.2d 185; CHECK-NEXT: ucvtf v2.2d, v3.2d 186; CHECK-NEXT: fcvtn2 v0.4s, v4.2d 187; CHECK-NEXT: fcvtn2 v1.4s, v2.2d 188; CHECK-NEXT: ret 189 %1 = uitofp <8 x i64> %a to <8 x float> 190 ret <8 x float> %1 191} 192 193 194define <4 x double> @sitofp_v4i8_double(<4 x i8> %a) { 195; CHECK-LABEL: sitofp_v4i8_double: 196; CHECK: // %bb.0: 197; CHECK-NEXT: ushll v0.4s, v0.4h, #0 198; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8 199; CHECK-NEXT: shl v0.2s, v0.2s, #24 200; CHECK-NEXT: sshr v0.2s, v0.2s, #24 201; CHECK-NEXT: shl v1.2s, v1.2s, #24 202; CHECK-NEXT: sshll v0.2d, v0.2s, #0 203; CHECK-NEXT: sshr v1.2s, v1.2s, #24 204; CHECK-NEXT: scvtf v0.2d, v0.2d 205; CHECK-NEXT: sshll v1.2d, v1.2s, #0 206; CHECK-NEXT: scvtf v1.2d, v1.2d 207; CHECK-NEXT: ret 208 %1 = sitofp <4 x i8> %a to <4 x double> 209 ret <4 x double> %1 210} 211 212define <8 x double> @sitofp_v8i8_double(<8 x i8> %a) { 213; CHECK-LABEL: sitofp_v8i8_double: 214; CHECK: // %bb.0: 215; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 216; CHECK-NEXT: umov w8, v0.b[0] 217; CHECK-NEXT: umov w9, v0.b[2] 218; CHECK-NEXT: umov w11, v0.b[4] 219; CHECK-NEXT: umov w12, v0.b[6] 220; CHECK-NEXT: umov w10, v0.b[1] 221; CHECK-NEXT: umov w13, v0.b[3] 222; CHECK-NEXT: umov w14, v0.b[5] 223; CHECK-NEXT: umov w15, v0.b[7] 224; CHECK-NEXT: fmov s0, w8 225; CHECK-NEXT: fmov s1, w9 226; CHECK-NEXT: fmov s2, w11 227; CHECK-NEXT: fmov s3, w12 228; CHECK-NEXT: mov v0.s[1], w10 229; CHECK-NEXT: mov v1.s[1], w13 230; CHECK-NEXT: mov v2.s[1], w14 231; CHECK-NEXT: mov v3.s[1], w15 232; CHECK-NEXT: shl v0.2s, v0.2s, #24 233; CHECK-NEXT: shl v1.2s, v1.2s, #24 234; CHECK-NEXT: shl v2.2s, v2.2s, #24 235; CHECK-NEXT: shl v3.2s, v3.2s, #24 236; CHECK-NEXT: sshr v0.2s, v0.2s, #24 237; CHECK-NEXT: sshr v1.2s, v1.2s, #24 238; CHECK-NEXT: sshr v2.2s, v2.2s, #24 239; CHECK-NEXT: sshr v3.2s, v3.2s, #24 240; CHECK-NEXT: sshll v0.2d, v0.2s, #0 241; CHECK-NEXT: sshll v1.2d, v1.2s, #0 242; CHECK-NEXT: sshll v2.2d, v2.2s, #0 243; CHECK-NEXT: sshll v3.2d, v3.2s, #0 244; CHECK-NEXT: scvtf v0.2d, v0.2d 245; CHECK-NEXT: scvtf v1.2d, v1.2d 246; CHECK-NEXT: scvtf v2.2d, v2.2d 247; CHECK-NEXT: scvtf v3.2d, v3.2d 248; CHECK-NEXT: ret 249 %1 = sitofp <8 x i8> %a to <8 x double> 250 ret <8 x double> %1 251} 252 253define <16 x double> @sitofp_v16i8_double(<16 x i8> %a) { 254; CHECK-LABEL: sitofp_v16i8_double: 255; CHECK: // %bb.0: 256; CHECK-NEXT: umov w8, v0.b[0] 257; CHECK-NEXT: ext v1.16b, v0.16b, v0.16b, #8 258; CHECK-NEXT: umov w9, v0.b[1] 259; CHECK-NEXT: umov w10, v0.b[2] 260; CHECK-NEXT: umov w12, v0.b[4] 261; CHECK-NEXT: umov w14, v0.b[6] 262; CHECK-NEXT: umov w11, v0.b[3] 263; CHECK-NEXT: umov w13, v0.b[5] 264; CHECK-NEXT: fmov s2, w8 265; CHECK-NEXT: umov w15, v1.b[0] 266; CHECK-NEXT: umov w17, v1.b[2] 267; CHECK-NEXT: umov w0, v1.b[4] 268; CHECK-NEXT: umov w16, v1.b[1] 269; CHECK-NEXT: umov w18, v1.b[3] 270; CHECK-NEXT: umov w8, v0.b[7] 271; CHECK-NEXT: fmov s0, w10 272; CHECK-NEXT: umov w10, v1.b[5] 273; CHECK-NEXT: mov v2.s[1], w9 274; CHECK-NEXT: umov w9, v1.b[6] 275; CHECK-NEXT: fmov s3, w12 276; CHECK-NEXT: umov w12, v1.b[7] 277; CHECK-NEXT: fmov s1, w14 278; CHECK-NEXT: fmov s4, w15 279; CHECK-NEXT: fmov s5, w17 280; CHECK-NEXT: fmov s6, w0 281; CHECK-NEXT: mov v0.s[1], w11 282; CHECK-NEXT: mov v3.s[1], w13 283; CHECK-NEXT: fmov s7, w9 284; CHECK-NEXT: mov v1.s[1], w8 285; CHECK-NEXT: mov v4.s[1], w16 286; CHECK-NEXT: mov v5.s[1], w18 287; CHECK-NEXT: mov v6.s[1], w10 288; CHECK-NEXT: shl v2.2s, v2.2s, #24 289; CHECK-NEXT: shl v0.2s, v0.2s, #24 290; CHECK-NEXT: mov v7.s[1], w12 291; CHECK-NEXT: shl v3.2s, v3.2s, #24 292; CHECK-NEXT: shl v1.2s, v1.2s, #24 293; CHECK-NEXT: shl v4.2s, v4.2s, #24 294; CHECK-NEXT: sshr v2.2s, v2.2s, #24 295; CHECK-NEXT: shl v5.2s, v5.2s, #24 296; CHECK-NEXT: shl v6.2s, v6.2s, #24 297; CHECK-NEXT: sshr v0.2s, v0.2s, #24 298; CHECK-NEXT: sshr v3.2s, v3.2s, #24 299; CHECK-NEXT: shl v7.2s, v7.2s, #24 300; CHECK-NEXT: sshr v4.2s, v4.2s, #24 301; CHECK-NEXT: sshr v1.2s, v1.2s, #24 302; CHECK-NEXT: sshr v5.2s, v5.2s, #24 303; CHECK-NEXT: sshr v6.2s, v6.2s, #24 304; CHECK-NEXT: sshll v2.2d, v2.2s, #0 305; CHECK-NEXT: sshll v16.2d, v0.2s, #0 306; CHECK-NEXT: sshll v3.2d, v3.2s, #0 307; CHECK-NEXT: sshr v7.2s, v7.2s, #24 308; CHECK-NEXT: sshll v4.2d, v4.2s, #0 309; CHECK-NEXT: sshll v17.2d, v1.2s, #0 310; CHECK-NEXT: sshll v5.2d, v5.2s, #0 311; CHECK-NEXT: sshll v6.2d, v6.2s, #0 312; CHECK-NEXT: scvtf v0.2d, v2.2d 313; CHECK-NEXT: scvtf v1.2d, v16.2d 314; CHECK-NEXT: scvtf v2.2d, v3.2d 315; CHECK-NEXT: sshll v7.2d, v7.2s, #0 316; CHECK-NEXT: scvtf v4.2d, v4.2d 317; CHECK-NEXT: scvtf v3.2d, v17.2d 318; CHECK-NEXT: scvtf v5.2d, v5.2d 319; CHECK-NEXT: scvtf v6.2d, v6.2d 320; CHECK-NEXT: scvtf v7.2d, v7.2d 321; CHECK-NEXT: ret 322 %1 = sitofp <16 x i8> %a to <16 x double> 323 ret <16 x double> %1 324} 325 326define <8 x double> @sitofp_i16_double(<8 x i16> %a) { 327; CHECK-LABEL: sitofp_i16_double: 328; CHECK: // %bb.0: 329; CHECK-NEXT: sshll v1.4s, v0.4h, #0 330; CHECK-NEXT: sshll2 v0.4s, v0.8h, #0 331; CHECK-NEXT: sshll v2.2d, v1.2s, #0 332; CHECK-NEXT: sshll2 v3.2d, v0.4s, #0 333; CHECK-NEXT: sshll2 v1.2d, v1.4s, #0 334; CHECK-NEXT: sshll v4.2d, v0.2s, #0 335; CHECK-NEXT: scvtf v0.2d, v2.2d 336; CHECK-NEXT: scvtf v3.2d, v3.2d 337; CHECK-NEXT: scvtf v1.2d, v1.2d 338; CHECK-NEXT: scvtf v2.2d, v4.2d 339; CHECK-NEXT: ret 340 %1 = sitofp <8 x i16> %a to <8 x double> 341 ret <8 x double> %1 342} 343 344define <8 x double> @sitofp_i32_double(<8 x i32> %a) { 345; CHECK-LABEL: sitofp_i32_double: 346; CHECK: // %bb.0: 347; CHECK-NEXT: sshll v2.2d, v0.2s, #0 348; CHECK-NEXT: sshll2 v3.2d, v0.4s, #0 349; CHECK-NEXT: sshll2 v4.2d, v1.4s, #0 350; CHECK-NEXT: sshll v5.2d, v1.2s, #0 351; CHECK-NEXT: scvtf v0.2d, v2.2d 352; CHECK-NEXT: scvtf v1.2d, v3.2d 353; CHECK-NEXT: scvtf v3.2d, v4.2d 354; CHECK-NEXT: scvtf v2.2d, v5.2d 355; CHECK-NEXT: ret 356 %1 = sitofp <8 x i32> %a to <8 x double> 357 ret <8 x double> %1 358} 359 360define <8 x double> @sitofp_i64_double(<8 x i64> %a) { 361; CHECK-LABEL: sitofp_i64_double: 362; CHECK: // %bb.0: 363; CHECK-NEXT: scvtf v0.2d, v0.2d 364; CHECK-NEXT: scvtf v1.2d, v1.2d 365; CHECK-NEXT: scvtf v2.2d, v2.2d 366; CHECK-NEXT: scvtf v3.2d, v3.2d 367; CHECK-NEXT: ret 368 %1 = sitofp <8 x i64> %a to <8 x double> 369 ret <8 x double> %1 370} 371 372define <4 x double> @uitofp_v4i8_double(<4 x i8> %a) { 373; CHECK-LABEL: uitofp_v4i8_double: 374; CHECK: // %bb.0: 375; CHECK-NEXT: ushll v0.4s, v0.4h, #0 376; CHECK-NEXT: movi d1, #0x0000ff000000ff 377; CHECK-NEXT: ext v2.16b, v0.16b, v0.16b, #8 378; CHECK-NEXT: and v0.8b, v0.8b, v1.8b 379; CHECK-NEXT: and v1.8b, v2.8b, v1.8b 380; CHECK-NEXT: ushll v0.2d, v0.2s, #0 381; CHECK-NEXT: ushll v1.2d, v1.2s, #0 382; CHECK-NEXT: ucvtf v0.2d, v0.2d 383; CHECK-NEXT: ucvtf v1.2d, v1.2d 384; CHECK-NEXT: ret 385 %1 = uitofp <4 x i8> %a to <4 x double> 386 ret <4 x double> %1 387} 388 389define <8 x double> @uitofp_v8i8_double(<8 x i8> %a) { 390; CHECK-LABEL: uitofp_v8i8_double: 391; CHECK: // %bb.0: 392; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 393; CHECK-NEXT: umov w8, v0.b[0] 394; CHECK-NEXT: umov w9, v0.b[2] 395; CHECK-NEXT: umov w11, v0.b[4] 396; CHECK-NEXT: umov w12, v0.b[6] 397; CHECK-NEXT: umov w10, v0.b[1] 398; CHECK-NEXT: umov w13, v0.b[3] 399; CHECK-NEXT: umov w14, v0.b[5] 400; CHECK-NEXT: umov w15, v0.b[7] 401; CHECK-NEXT: movi d1, #0x0000ff000000ff 402; CHECK-NEXT: fmov s0, w8 403; CHECK-NEXT: fmov s2, w9 404; CHECK-NEXT: fmov s3, w11 405; CHECK-NEXT: fmov s4, w12 406; CHECK-NEXT: mov v0.s[1], w10 407; CHECK-NEXT: mov v2.s[1], w13 408; CHECK-NEXT: mov v3.s[1], w14 409; CHECK-NEXT: mov v4.s[1], w15 410; CHECK-NEXT: and v0.8b, v0.8b, v1.8b 411; CHECK-NEXT: and v2.8b, v2.8b, v1.8b 412; CHECK-NEXT: and v3.8b, v3.8b, v1.8b 413; CHECK-NEXT: and v1.8b, v4.8b, v1.8b 414; CHECK-NEXT: ushll v0.2d, v0.2s, #0 415; CHECK-NEXT: ushll v2.2d, v2.2s, #0 416; CHECK-NEXT: ushll v3.2d, v3.2s, #0 417; CHECK-NEXT: ushll v4.2d, v1.2s, #0 418; CHECK-NEXT: ucvtf v0.2d, v0.2d 419; CHECK-NEXT: ucvtf v1.2d, v2.2d 420; CHECK-NEXT: ucvtf v2.2d, v3.2d 421; CHECK-NEXT: ucvtf v3.2d, v4.2d 422; CHECK-NEXT: ret 423 %1 = uitofp <8 x i8> %a to <8 x double> 424 ret <8 x double> %1 425} 426 427define <16 x double> @uitofp_v16i8_double(<16 x i8> %a) { 428; CHECK-LABEL: uitofp_v16i8_double: 429; CHECK: // %bb.0: 430; CHECK-NEXT: ext v2.16b, v0.16b, v0.16b, #8 431; CHECK-NEXT: umov w8, v0.b[0] 432; CHECK-NEXT: umov w10, v0.b[2] 433; CHECK-NEXT: umov w9, v0.b[1] 434; CHECK-NEXT: umov w12, v0.b[4] 435; CHECK-NEXT: umov w11, v0.b[3] 436; CHECK-NEXT: umov w13, v0.b[5] 437; CHECK-NEXT: umov w18, v0.b[6] 438; CHECK-NEXT: movi d1, #0x0000ff000000ff 439; CHECK-NEXT: umov w14, v2.b[0] 440; CHECK-NEXT: umov w16, v2.b[2] 441; CHECK-NEXT: umov w0, v2.b[4] 442; CHECK-NEXT: fmov s3, w8 443; CHECK-NEXT: umov w8, v0.b[7] 444; CHECK-NEXT: fmov s0, w10 445; CHECK-NEXT: umov w10, v2.b[6] 446; CHECK-NEXT: umov w15, v2.b[1] 447; CHECK-NEXT: umov w17, v2.b[3] 448; CHECK-NEXT: fmov s4, w12 449; CHECK-NEXT: umov w12, v2.b[5] 450; CHECK-NEXT: fmov s7, w18 451; CHECK-NEXT: mov v3.s[1], w9 452; CHECK-NEXT: umov w9, v2.b[7] 453; CHECK-NEXT: fmov s2, w14 454; CHECK-NEXT: fmov s5, w16 455; CHECK-NEXT: fmov s6, w0 456; CHECK-NEXT: mov v0.s[1], w11 457; CHECK-NEXT: fmov s16, w10 458; CHECK-NEXT: mov v4.s[1], w13 459; CHECK-NEXT: mov v7.s[1], w8 460; CHECK-NEXT: mov v2.s[1], w15 461; CHECK-NEXT: mov v5.s[1], w17 462; CHECK-NEXT: mov v6.s[1], w12 463; CHECK-NEXT: and v3.8b, v3.8b, v1.8b 464; CHECK-NEXT: mov v16.s[1], w9 465; CHECK-NEXT: and v0.8b, v0.8b, v1.8b 466; CHECK-NEXT: and v4.8b, v4.8b, v1.8b 467; CHECK-NEXT: and v7.8b, v7.8b, v1.8b 468; CHECK-NEXT: and v2.8b, v2.8b, v1.8b 469; CHECK-NEXT: ushll v3.2d, v3.2s, #0 470; CHECK-NEXT: and v5.8b, v5.8b, v1.8b 471; CHECK-NEXT: and v6.8b, v6.8b, v1.8b 472; CHECK-NEXT: and v1.8b, v16.8b, v1.8b 473; CHECK-NEXT: ushll v16.2d, v0.2s, #0 474; CHECK-NEXT: ushll v17.2d, v4.2s, #0 475; CHECK-NEXT: ushll v2.2d, v2.2s, #0 476; CHECK-NEXT: ushll v7.2d, v7.2s, #0 477; CHECK-NEXT: ucvtf v0.2d, v3.2d 478; CHECK-NEXT: ushll v5.2d, v5.2s, #0 479; CHECK-NEXT: ushll v6.2d, v6.2s, #0 480; CHECK-NEXT: ushll v18.2d, v1.2s, #0 481; CHECK-NEXT: ucvtf v1.2d, v16.2d 482; CHECK-NEXT: ucvtf v4.2d, v2.2d 483; CHECK-NEXT: ucvtf v2.2d, v17.2d 484; CHECK-NEXT: ucvtf v3.2d, v7.2d 485; CHECK-NEXT: ucvtf v5.2d, v5.2d 486; CHECK-NEXT: ucvtf v6.2d, v6.2d 487; CHECK-NEXT: ucvtf v7.2d, v18.2d 488; CHECK-NEXT: ret 489 %1 = uitofp <16 x i8> %a to <16 x double> 490 ret <16 x double> %1 491} 492 493define <8 x double> @uitofp_i16_double(<8 x i16> %a) { 494; CHECK-LABEL: uitofp_i16_double: 495; CHECK: // %bb.0: 496; CHECK-NEXT: ushll v1.4s, v0.4h, #0 497; CHECK-NEXT: ushll2 v0.4s, v0.8h, #0 498; CHECK-NEXT: ushll v2.2d, v1.2s, #0 499; CHECK-NEXT: ushll2 v3.2d, v0.4s, #0 500; CHECK-NEXT: ushll2 v1.2d, v1.4s, #0 501; CHECK-NEXT: ushll v4.2d, v0.2s, #0 502; CHECK-NEXT: ucvtf v0.2d, v2.2d 503; CHECK-NEXT: ucvtf v3.2d, v3.2d 504; CHECK-NEXT: ucvtf v1.2d, v1.2d 505; CHECK-NEXT: ucvtf v2.2d, v4.2d 506; CHECK-NEXT: ret 507 %1 = uitofp <8 x i16> %a to <8 x double> 508 ret <8 x double> %1 509} 510 511define <8 x double> @uitofp_i32_double(<8 x i32> %a) { 512; CHECK-LABEL: uitofp_i32_double: 513; CHECK: // %bb.0: 514; CHECK-NEXT: ushll v2.2d, v0.2s, #0 515; CHECK-NEXT: ushll2 v3.2d, v0.4s, #0 516; CHECK-NEXT: ushll2 v4.2d, v1.4s, #0 517; CHECK-NEXT: ushll v5.2d, v1.2s, #0 518; CHECK-NEXT: ucvtf v0.2d, v2.2d 519; CHECK-NEXT: ucvtf v1.2d, v3.2d 520; CHECK-NEXT: ucvtf v3.2d, v4.2d 521; CHECK-NEXT: ucvtf v2.2d, v5.2d 522; CHECK-NEXT: ret 523 %1 = uitofp <8 x i32> %a to <8 x double> 524 ret <8 x double> %1 525} 526 527define <8 x double> @uitofp_i64_double(<8 x i64> %a) { 528; CHECK-LABEL: uitofp_i64_double: 529; CHECK: // %bb.0: 530; CHECK-NEXT: ucvtf v0.2d, v0.2d 531; CHECK-NEXT: ucvtf v1.2d, v1.2d 532; CHECK-NEXT: ucvtf v2.2d, v2.2d 533; CHECK-NEXT: ucvtf v3.2d, v3.2d 534; CHECK-NEXT: ret 535 %1 = uitofp <8 x i64> %a to <8 x double> 536 ret <8 x double> %1 537} 538