xref: /llvm-project/llvm/test/CodeGen/AArch64/vec_uaddo.ll (revision cc82f1290a1e2157a6c0530d78d8cc84d2b8553d) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s --check-prefix=CHECK
3
4declare {<1 x i32>, <1 x i1>} @llvm.uadd.with.overflow.v1i32(<1 x i32>, <1 x i32>)
5declare {<2 x i32>, <2 x i1>} @llvm.uadd.with.overflow.v2i32(<2 x i32>, <2 x i32>)
6declare {<3 x i32>, <3 x i1>} @llvm.uadd.with.overflow.v3i32(<3 x i32>, <3 x i32>)
7declare {<4 x i32>, <4 x i1>} @llvm.uadd.with.overflow.v4i32(<4 x i32>, <4 x i32>)
8declare {<6 x i32>, <6 x i1>} @llvm.uadd.with.overflow.v6i32(<6 x i32>, <6 x i32>)
9declare {<8 x i32>, <8 x i1>} @llvm.uadd.with.overflow.v8i32(<8 x i32>, <8 x i32>)
10
11declare {<16 x i8>, <16 x i1>} @llvm.uadd.with.overflow.v16i8(<16 x i8>, <16 x i8>)
12declare {<8 x i16>, <8 x i1>} @llvm.uadd.with.overflow.v8i16(<8 x i16>, <8 x i16>)
13declare {<2 x i64>, <2 x i1>} @llvm.uadd.with.overflow.v2i64(<2 x i64>, <2 x i64>)
14
15declare {<4 x i24>, <4 x i1>} @llvm.uadd.with.overflow.v4i24(<4 x i24>, <4 x i24>)
16declare {<4 x i1>, <4 x i1>} @llvm.uadd.with.overflow.v4i1(<4 x i1>, <4 x i1>)
17declare {<2 x i128>, <2 x i1>} @llvm.uadd.with.overflow.v2i128(<2 x i128>, <2 x i128>)
18
19define <1 x i32> @uaddo_v1i32(<1 x i32> %a0, <1 x i32> %a1, ptr %p2) nounwind {
20; CHECK-LABEL: uaddo_v1i32:
21; CHECK:       // %bb.0:
22; CHECK-NEXT:    add v1.2s, v0.2s, v1.2s
23; CHECK-NEXT:    cmhi v0.2s, v0.2s, v1.2s
24; CHECK-NEXT:    str s1, [x0]
25; CHECK-NEXT:    ret
26  %t = call {<1 x i32>, <1 x i1>} @llvm.uadd.with.overflow.v1i32(<1 x i32> %a0, <1 x i32> %a1)
27  %val = extractvalue {<1 x i32>, <1 x i1>} %t, 0
28  %obit = extractvalue {<1 x i32>, <1 x i1>} %t, 1
29  %res = sext <1 x i1> %obit to <1 x i32>
30  store <1 x i32> %val, ptr %p2
31  ret <1 x i32> %res
32}
33
34define <2 x i32> @uaddo_v2i32(<2 x i32> %a0, <2 x i32> %a1, ptr %p2) nounwind {
35; CHECK-LABEL: uaddo_v2i32:
36; CHECK:       // %bb.0:
37; CHECK-NEXT:    add v1.2s, v0.2s, v1.2s
38; CHECK-NEXT:    cmhi v0.2s, v0.2s, v1.2s
39; CHECK-NEXT:    str d1, [x0]
40; CHECK-NEXT:    ret
41  %t = call {<2 x i32>, <2 x i1>} @llvm.uadd.with.overflow.v2i32(<2 x i32> %a0, <2 x i32> %a1)
42  %val = extractvalue {<2 x i32>, <2 x i1>} %t, 0
43  %obit = extractvalue {<2 x i32>, <2 x i1>} %t, 1
44  %res = sext <2 x i1> %obit to <2 x i32>
45  store <2 x i32> %val, ptr %p2
46  ret <2 x i32> %res
47}
48
49define <3 x i32> @uaddo_v3i32(<3 x i32> %a0, <3 x i32> %a1, ptr %p2) nounwind {
50; CHECK-LABEL: uaddo_v3i32:
51; CHECK:       // %bb.0:
52; CHECK-NEXT:    add v1.4s, v0.4s, v1.4s
53; CHECK-NEXT:    add x8, x0, #8
54; CHECK-NEXT:    cmhi v0.4s, v0.4s, v1.4s
55; CHECK-NEXT:    st1 { v1.s }[2], [x8]
56; CHECK-NEXT:    str d1, [x0]
57; CHECK-NEXT:    ret
58  %t = call {<3 x i32>, <3 x i1>} @llvm.uadd.with.overflow.v3i32(<3 x i32> %a0, <3 x i32> %a1)
59  %val = extractvalue {<3 x i32>, <3 x i1>} %t, 0
60  %obit = extractvalue {<3 x i32>, <3 x i1>} %t, 1
61  %res = sext <3 x i1> %obit to <3 x i32>
62  store <3 x i32> %val, ptr %p2
63  ret <3 x i32> %res
64}
65
66define <4 x i32> @uaddo_v4i32(<4 x i32> %a0, <4 x i32> %a1, ptr %p2) nounwind {
67; CHECK-LABEL: uaddo_v4i32:
68; CHECK:       // %bb.0:
69; CHECK-NEXT:    add v1.4s, v0.4s, v1.4s
70; CHECK-NEXT:    cmhi v0.4s, v0.4s, v1.4s
71; CHECK-NEXT:    str q1, [x0]
72; CHECK-NEXT:    ret
73  %t = call {<4 x i32>, <4 x i1>} @llvm.uadd.with.overflow.v4i32(<4 x i32> %a0, <4 x i32> %a1)
74  %val = extractvalue {<4 x i32>, <4 x i1>} %t, 0
75  %obit = extractvalue {<4 x i32>, <4 x i1>} %t, 1
76  %res = sext <4 x i1> %obit to <4 x i32>
77  store <4 x i32> %val, ptr %p2
78  ret <4 x i32> %res
79}
80
81define <6 x i32> @uaddo_v6i32(<6 x i32> %a0, <6 x i32> %a1, ptr %p2) nounwind {
82; CHECK-LABEL: uaddo_v6i32:
83; CHECK:       // %bb.0:
84; CHECK-NEXT:    fmov s0, w0
85; CHECK-NEXT:    fmov s1, w6
86; CHECK-NEXT:    mov x8, sp
87; CHECK-NEXT:    fmov s3, w4
88; CHECK-NEXT:    ldr s2, [sp, #16]
89; CHECK-NEXT:    add x9, sp, #24
90; CHECK-NEXT:    mov v0.s[1], w1
91; CHECK-NEXT:    mov v1.s[1], w7
92; CHECK-NEXT:    ld1 { v2.s }[1], [x9]
93; CHECK-NEXT:    mov v3.s[1], w5
94; CHECK-NEXT:    mov v0.s[2], w2
95; CHECK-NEXT:    ld1 { v1.s }[2], [x8]
96; CHECK-NEXT:    add x8, sp, #8
97; CHECK-NEXT:    add v2.4s, v3.4s, v2.4s
98; CHECK-NEXT:    ld1 { v1.s }[3], [x8]
99; CHECK-NEXT:    ldr x8, [sp, #32]
100; CHECK-NEXT:    mov v0.s[3], w3
101; CHECK-NEXT:    cmhi v3.4s, v3.4s, v2.4s
102; CHECK-NEXT:    str d2, [x8, #16]
103; CHECK-NEXT:    mov w5, v3.s[1]
104; CHECK-NEXT:    fmov w4, s3
105; CHECK-NEXT:    add v1.4s, v0.4s, v1.4s
106; CHECK-NEXT:    cmhi v0.4s, v0.4s, v1.4s
107; CHECK-NEXT:    str q1, [x8]
108; CHECK-NEXT:    mov w1, v0.s[1]
109; CHECK-NEXT:    mov w2, v0.s[2]
110; CHECK-NEXT:    mov w3, v0.s[3]
111; CHECK-NEXT:    fmov w0, s0
112; CHECK-NEXT:    ret
113  %t = call {<6 x i32>, <6 x i1>} @llvm.uadd.with.overflow.v6i32(<6 x i32> %a0, <6 x i32> %a1)
114  %val = extractvalue {<6 x i32>, <6 x i1>} %t, 0
115  %obit = extractvalue {<6 x i32>, <6 x i1>} %t, 1
116  %res = sext <6 x i1> %obit to <6 x i32>
117  store <6 x i32> %val, ptr %p2
118  ret <6 x i32> %res
119}
120
121define <8 x i32> @uaddo_v8i32(<8 x i32> %a0, <8 x i32> %a1, ptr %p2) nounwind {
122; CHECK-LABEL: uaddo_v8i32:
123; CHECK:       // %bb.0:
124; CHECK-NEXT:    add v2.4s, v0.4s, v2.4s
125; CHECK-NEXT:    add v3.4s, v1.4s, v3.4s
126; CHECK-NEXT:    cmhi v0.4s, v0.4s, v2.4s
127; CHECK-NEXT:    cmhi v1.4s, v1.4s, v3.4s
128; CHECK-NEXT:    stp q2, q3, [x0]
129; CHECK-NEXT:    ret
130  %t = call {<8 x i32>, <8 x i1>} @llvm.uadd.with.overflow.v8i32(<8 x i32> %a0, <8 x i32> %a1)
131  %val = extractvalue {<8 x i32>, <8 x i1>} %t, 0
132  %obit = extractvalue {<8 x i32>, <8 x i1>} %t, 1
133  %res = sext <8 x i1> %obit to <8 x i32>
134  store <8 x i32> %val, ptr %p2
135  ret <8 x i32> %res
136}
137
138define <16 x i32> @uaddo_v16i8(<16 x i8> %a0, <16 x i8> %a1, ptr %p2) nounwind {
139; CHECK-LABEL: uaddo_v16i8:
140; CHECK:       // %bb.0:
141; CHECK-NEXT:    add v4.16b, v0.16b, v1.16b
142; CHECK-NEXT:    cmhi v0.16b, v0.16b, v4.16b
143; CHECK-NEXT:    str q4, [x0]
144; CHECK-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
145; CHECK-NEXT:    zip1 v2.8b, v0.8b, v0.8b
146; CHECK-NEXT:    zip2 v0.8b, v0.8b, v0.8b
147; CHECK-NEXT:    zip1 v3.8b, v1.8b, v0.8b
148; CHECK-NEXT:    zip2 v1.8b, v1.8b, v0.8b
149; CHECK-NEXT:    ushll v2.4s, v2.4h, #0
150; CHECK-NEXT:    ushll v0.4s, v0.4h, #0
151; CHECK-NEXT:    shl v2.4s, v2.4s, #31
152; CHECK-NEXT:    ushll v3.4s, v3.4h, #0
153; CHECK-NEXT:    ushll v1.4s, v1.4h, #0
154; CHECK-NEXT:    shl v5.4s, v0.4s, #31
155; CHECK-NEXT:    cmlt v0.4s, v2.4s, #0
156; CHECK-NEXT:    shl v3.4s, v3.4s, #31
157; CHECK-NEXT:    shl v6.4s, v1.4s, #31
158; CHECK-NEXT:    cmlt v1.4s, v5.4s, #0
159; CHECK-NEXT:    cmlt v2.4s, v3.4s, #0
160; CHECK-NEXT:    cmlt v3.4s, v6.4s, #0
161; CHECK-NEXT:    ret
162  %t = call {<16 x i8>, <16 x i1>} @llvm.uadd.with.overflow.v16i8(<16 x i8> %a0, <16 x i8> %a1)
163  %val = extractvalue {<16 x i8>, <16 x i1>} %t, 0
164  %obit = extractvalue {<16 x i8>, <16 x i1>} %t, 1
165  %res = sext <16 x i1> %obit to <16 x i32>
166  store <16 x i8> %val, ptr %p2
167  ret <16 x i32> %res
168}
169
170define <8 x i32> @uaddo_v8i16(<8 x i16> %a0, <8 x i16> %a1, ptr %p2) nounwind {
171; CHECK-LABEL: uaddo_v8i16:
172; CHECK:       // %bb.0:
173; CHECK-NEXT:    add v2.8h, v0.8h, v1.8h
174; CHECK-NEXT:    cmhi v0.8h, v0.8h, v2.8h
175; CHECK-NEXT:    str q2, [x0]
176; CHECK-NEXT:    xtn v0.8b, v0.8h
177; CHECK-NEXT:    zip1 v1.8b, v0.8b, v0.8b
178; CHECK-NEXT:    zip2 v0.8b, v0.8b, v0.8b
179; CHECK-NEXT:    ushll v1.4s, v1.4h, #0
180; CHECK-NEXT:    ushll v0.4s, v0.4h, #0
181; CHECK-NEXT:    shl v1.4s, v1.4s, #31
182; CHECK-NEXT:    shl v3.4s, v0.4s, #31
183; CHECK-NEXT:    cmlt v0.4s, v1.4s, #0
184; CHECK-NEXT:    cmlt v1.4s, v3.4s, #0
185; CHECK-NEXT:    ret
186  %t = call {<8 x i16>, <8 x i1>} @llvm.uadd.with.overflow.v8i16(<8 x i16> %a0, <8 x i16> %a1)
187  %val = extractvalue {<8 x i16>, <8 x i1>} %t, 0
188  %obit = extractvalue {<8 x i16>, <8 x i1>} %t, 1
189  %res = sext <8 x i1> %obit to <8 x i32>
190  store <8 x i16> %val, ptr %p2
191  ret <8 x i32> %res
192}
193
194define <2 x i32> @uaddo_v2i64(<2 x i64> %a0, <2 x i64> %a1, ptr %p2) nounwind {
195; CHECK-LABEL: uaddo_v2i64:
196; CHECK:       // %bb.0:
197; CHECK-NEXT:    add v1.2d, v0.2d, v1.2d
198; CHECK-NEXT:    cmhi v0.2d, v0.2d, v1.2d
199; CHECK-NEXT:    str q1, [x0]
200; CHECK-NEXT:    xtn v0.2s, v0.2d
201; CHECK-NEXT:    ret
202  %t = call {<2 x i64>, <2 x i1>} @llvm.uadd.with.overflow.v2i64(<2 x i64> %a0, <2 x i64> %a1)
203  %val = extractvalue {<2 x i64>, <2 x i1>} %t, 0
204  %obit = extractvalue {<2 x i64>, <2 x i1>} %t, 1
205  %res = sext <2 x i1> %obit to <2 x i32>
206  store <2 x i64> %val, ptr %p2
207  ret <2 x i32> %res
208}
209
210define <4 x i32> @uaddo_v4i24(<4 x i24> %a0, <4 x i24> %a1, ptr %p2) nounwind {
211; CHECK-LABEL: uaddo_v4i24:
212; CHECK:       // %bb.0:
213; CHECK-NEXT:    bic v1.4s, #255, lsl #24
214; CHECK-NEXT:    bic v0.4s, #255, lsl #24
215; CHECK-NEXT:    add v0.4s, v0.4s, v1.4s
216; CHECK-NEXT:    mov v1.16b, v0.16b
217; CHECK-NEXT:    mov w8, v0.s[3]
218; CHECK-NEXT:    mov w9, v0.s[2]
219; CHECK-NEXT:    mov w10, v0.s[1]
220; CHECK-NEXT:    fmov w11, s0
221; CHECK-NEXT:    bic v1.4s, #1, lsl #24
222; CHECK-NEXT:    sturh w8, [x0, #9]
223; CHECK-NEXT:    lsr w8, w8, #16
224; CHECK-NEXT:    strh w9, [x0, #6]
225; CHECK-NEXT:    lsr w9, w9, #16
226; CHECK-NEXT:    cmeq v1.4s, v1.4s, v0.4s
227; CHECK-NEXT:    strb w8, [x0, #11]
228; CHECK-NEXT:    lsr w8, w10, #16
229; CHECK-NEXT:    strb w9, [x0, #8]
230; CHECK-NEXT:    lsr w9, w11, #16
231; CHECK-NEXT:    sturh w10, [x0, #3]
232; CHECK-NEXT:    mvn v0.16b, v1.16b
233; CHECK-NEXT:    strh w11, [x0]
234; CHECK-NEXT:    strb w8, [x0, #5]
235; CHECK-NEXT:    strb w9, [x0, #2]
236; CHECK-NEXT:    ret
237  %t = call {<4 x i24>, <4 x i1>} @llvm.uadd.with.overflow.v4i24(<4 x i24> %a0, <4 x i24> %a1)
238  %val = extractvalue {<4 x i24>, <4 x i1>} %t, 0
239  %obit = extractvalue {<4 x i24>, <4 x i1>} %t, 1
240  %res = sext <4 x i1> %obit to <4 x i32>
241  store <4 x i24> %val, ptr %p2
242  ret <4 x i32> %res
243}
244
245define <4 x i32> @uaddo_v4i1(<4 x i1> %a0, <4 x i1> %a1, ptr %p2) nounwind {
246; CHECK-LABEL: uaddo_v4i1:
247; CHECK:       // %bb.0:
248; CHECK-NEXT:    eor v2.8b, v0.8b, v1.8b
249; CHECK-NEXT:    and v0.8b, v0.8b, v1.8b
250; CHECK-NEXT:    adrp x8, .LCPI10_0
251; CHECK-NEXT:    shl v1.4h, v2.4h, #15
252; CHECK-NEXT:    ldr d2, [x8, :lo12:.LCPI10_0]
253; CHECK-NEXT:    ushll v0.4s, v0.4h, #0
254; CHECK-NEXT:    cmlt v1.4h, v1.4h, #0
255; CHECK-NEXT:    shl v0.4s, v0.4s, #31
256; CHECK-NEXT:    and v1.8b, v1.8b, v2.8b
257; CHECK-NEXT:    cmlt v0.4s, v0.4s, #0
258; CHECK-NEXT:    addv h1, v1.4h
259; CHECK-NEXT:    fmov w8, s1
260; CHECK-NEXT:    strb w8, [x0]
261; CHECK-NEXT:    ret
262  %t = call {<4 x i1>, <4 x i1>} @llvm.uadd.with.overflow.v4i1(<4 x i1> %a0, <4 x i1> %a1)
263  %val = extractvalue {<4 x i1>, <4 x i1>} %t, 0
264  %obit = extractvalue {<4 x i1>, <4 x i1>} %t, 1
265  %res = sext <4 x i1> %obit to <4 x i32>
266  store <4 x i1> %val, ptr %p2
267  ret <4 x i32> %res
268}
269
270define <2 x i32> @uaddo_v2i128(<2 x i128> %a0, <2 x i128> %a1, ptr %p2) nounwind {
271; CHECK-LABEL: uaddo_v2i128:
272; CHECK:       // %bb.0:
273; CHECK-NEXT:    adds x8, x2, x6
274; CHECK-NEXT:    adcs x9, x3, x7
275; CHECK-NEXT:    cset w10, hs
276; CHECK-NEXT:    adds x11, x0, x4
277; CHECK-NEXT:    adcs x12, x1, x5
278; CHECK-NEXT:    cset w13, hs
279; CHECK-NEXT:    fmov s0, w13
280; CHECK-NEXT:    mov v0.s[1], w10
281; CHECK-NEXT:    ldr x10, [sp]
282; CHECK-NEXT:    stp x8, x9, [x10, #16]
283; CHECK-NEXT:    stp x11, x12, [x10]
284; CHECK-NEXT:    shl v0.2s, v0.2s, #31
285; CHECK-NEXT:    cmlt v0.2s, v0.2s, #0
286; CHECK-NEXT:    ret
287  %t = call {<2 x i128>, <2 x i1>} @llvm.uadd.with.overflow.v2i128(<2 x i128> %a0, <2 x i128> %a1)
288  %val = extractvalue {<2 x i128>, <2 x i1>} %t, 0
289  %obit = extractvalue {<2 x i128>, <2 x i1>} %t, 1
290  %res = sext <2 x i1> %obit to <2 x i32>
291  store <2 x i128> %val, ptr %p2
292  ret <2 x i32> %res
293}
294