1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -verify-machineinstrs | FileCheck %s 3 4define i32 @vec_extract_branch(<2 x double> %x, i32 %y) { 5; CHECK-LABEL: vec_extract_branch: 6; CHECK: // %bb.0: 7; CHECK-NEXT: fcmgt v0.2d, v0.2d, #0.0 8; CHECK-NEXT: xtn v0.2s, v0.2d 9; CHECK-NEXT: mov w8, v0.s[1] 10; CHECK-NEXT: fmov w9, s0 11; CHECK-NEXT: and w8, w9, w8 12; CHECK-NEXT: tbz w8, #0, .LBB0_2 13; CHECK-NEXT: // %bb.1: // %true 14; CHECK-NEXT: mov w8, #42 15; CHECK-NEXT: sdiv w0, w8, w0 16; CHECK-NEXT: ret 17; CHECK-NEXT: .LBB0_2: 18; CHECK-NEXT: mov w0, #88 19; CHECK-NEXT: ret 20 %t1 = fcmp ogt <2 x double> %x, zeroinitializer 21 %t2 = extractelement <2 x i1> %t1, i32 0 22 %t3 = extractelement <2 x i1> %t1, i32 1 23 %t4 = and i1 %t2, %t3 24 br i1 %t4, label %true, label %false 25true: 26 %y1 = sdiv i32 42, %y 27 ret i32 %y1 28false: 29 ret i32 88 30} 31