1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 2; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD 3; RUN: llc -mtriple=aarch64 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI 4 5define i8 @ucmp.8.8(i8 %x, i8 %y) nounwind { 6; CHECK-SD-LABEL: ucmp.8.8: 7; CHECK-SD: // %bb.0: 8; CHECK-SD-NEXT: and w8, w0, #0xff 9; CHECK-SD-NEXT: cmp w8, w1, uxtb 10; CHECK-SD-NEXT: cset w8, hi 11; CHECK-SD-NEXT: csinv w0, w8, wzr, hs 12; CHECK-SD-NEXT: ret 13; 14; CHECK-GI-LABEL: ucmp.8.8: 15; CHECK-GI: // %bb.0: 16; CHECK-GI-NEXT: and w8, w0, #0xff 17; CHECK-GI-NEXT: and w9, w1, #0xff 18; CHECK-GI-NEXT: cmp w8, w9 19; CHECK-GI-NEXT: cset w8, hi 20; CHECK-GI-NEXT: csinv w0, w8, wzr, hs 21; CHECK-GI-NEXT: ret 22 %1 = call i8 @llvm.ucmp(i8 %x, i8 %y) 23 ret i8 %1 24} 25 26define i8 @ucmp.8.16(i16 %x, i16 %y) nounwind { 27; CHECK-SD-LABEL: ucmp.8.16: 28; CHECK-SD: // %bb.0: 29; CHECK-SD-NEXT: and w8, w0, #0xffff 30; CHECK-SD-NEXT: cmp w8, w1, uxth 31; CHECK-SD-NEXT: cset w8, hi 32; CHECK-SD-NEXT: csinv w0, w8, wzr, hs 33; CHECK-SD-NEXT: ret 34; 35; CHECK-GI-LABEL: ucmp.8.16: 36; CHECK-GI: // %bb.0: 37; CHECK-GI-NEXT: and w8, w0, #0xffff 38; CHECK-GI-NEXT: and w9, w1, #0xffff 39; CHECK-GI-NEXT: cmp w8, w9 40; CHECK-GI-NEXT: cset w8, hi 41; CHECK-GI-NEXT: csinv w0, w8, wzr, hs 42; CHECK-GI-NEXT: ret 43 %1 = call i8 @llvm.ucmp(i16 %x, i16 %y) 44 ret i8 %1 45} 46 47define i8 @ucmp.8.32(i32 %x, i32 %y) nounwind { 48; CHECK-LABEL: ucmp.8.32: 49; CHECK: // %bb.0: 50; CHECK-NEXT: cmp w0, w1 51; CHECK-NEXT: cset w8, hi 52; CHECK-NEXT: csinv w0, w8, wzr, hs 53; CHECK-NEXT: ret 54 %1 = call i8 @llvm.ucmp(i32 %x, i32 %y) 55 ret i8 %1 56} 57 58define i8 @ucmp.8.64(i64 %x, i64 %y) nounwind { 59; CHECK-LABEL: ucmp.8.64: 60; CHECK: // %bb.0: 61; CHECK-NEXT: cmp x0, x1 62; CHECK-NEXT: cset w8, hi 63; CHECK-NEXT: csinv w0, w8, wzr, hs 64; CHECK-NEXT: ret 65 %1 = call i8 @llvm.ucmp(i64 %x, i64 %y) 66 ret i8 %1 67} 68 69define i8 @ucmp.8.128(i128 %x, i128 %y) nounwind { 70; CHECK-SD-LABEL: ucmp.8.128: 71; CHECK-SD: // %bb.0: 72; CHECK-SD-NEXT: cmp x2, x0 73; CHECK-SD-NEXT: sbcs xzr, x3, x1 74; CHECK-SD-NEXT: cset w8, lo 75; CHECK-SD-NEXT: cmp x0, x2 76; CHECK-SD-NEXT: sbcs xzr, x1, x3 77; CHECK-SD-NEXT: csinv w0, w8, wzr, hs 78; CHECK-SD-NEXT: ret 79; 80; CHECK-GI-LABEL: ucmp.8.128: 81; CHECK-GI: // %bb.0: 82; CHECK-GI-NEXT: cmp x0, x2 83; CHECK-GI-NEXT: cset w8, hi 84; CHECK-GI-NEXT: cmp x1, x3 85; CHECK-GI-NEXT: cset w9, hi 86; CHECK-GI-NEXT: csel w8, w8, w9, eq 87; CHECK-GI-NEXT: cmp x0, x2 88; CHECK-GI-NEXT: cset w9, lo 89; CHECK-GI-NEXT: cmp x1, x3 90; CHECK-GI-NEXT: cset w10, lo 91; CHECK-GI-NEXT: csel w9, w9, w10, eq 92; CHECK-GI-NEXT: tst w8, #0x1 93; CHECK-GI-NEXT: cset w8, ne 94; CHECK-GI-NEXT: tst w9, #0x1 95; CHECK-GI-NEXT: csinv w0, w8, wzr, eq 96; CHECK-GI-NEXT: ret 97 %1 = call i8 @llvm.ucmp(i128 %x, i128 %y) 98 ret i8 %1 99} 100 101define i32 @ucmp.32.32(i32 %x, i32 %y) nounwind { 102; CHECK-LABEL: ucmp.32.32: 103; CHECK: // %bb.0: 104; CHECK-NEXT: cmp w0, w1 105; CHECK-NEXT: cset w8, hi 106; CHECK-NEXT: csinv w0, w8, wzr, hs 107; CHECK-NEXT: ret 108 %1 = call i32 @llvm.ucmp(i32 %x, i32 %y) 109 ret i32 %1 110} 111 112define i32 @ucmp.32.64(i64 %x, i64 %y) nounwind { 113; CHECK-LABEL: ucmp.32.64: 114; CHECK: // %bb.0: 115; CHECK-NEXT: cmp x0, x1 116; CHECK-NEXT: cset w8, hi 117; CHECK-NEXT: csinv w0, w8, wzr, hs 118; CHECK-NEXT: ret 119 %1 = call i32 @llvm.ucmp(i64 %x, i64 %y) 120 ret i32 %1 121} 122 123define i64 @ucmp.64.64(i64 %x, i64 %y) nounwind { 124; CHECK-LABEL: ucmp.64.64: 125; CHECK: // %bb.0: 126; CHECK-NEXT: cmp x0, x1 127; CHECK-NEXT: cset x8, hi 128; CHECK-NEXT: csinv x0, x8, xzr, hs 129; CHECK-NEXT: ret 130 %1 = call i64 @llvm.ucmp(i64 %x, i64 %y) 131 ret i64 %1 132} 133 134define <1 x i64> @ucmp.1.64.65(<1 x i65> %x, <1 x i65> %y) { 135; CHECK-SD-LABEL: ucmp.1.64.65: 136; CHECK-SD: // %bb.0: 137; CHECK-SD-NEXT: and x8, x1, #0x1 138; CHECK-SD-NEXT: and x9, x3, #0x1 139; CHECK-SD-NEXT: cmp x2, x0 140; CHECK-SD-NEXT: sbcs xzr, x9, x8 141; CHECK-SD-NEXT: cset x10, lo 142; CHECK-SD-NEXT: cmp x0, x2 143; CHECK-SD-NEXT: sbcs xzr, x8, x9 144; CHECK-SD-NEXT: csinv x8, x10, xzr, hs 145; CHECK-SD-NEXT: fmov d0, x8 146; CHECK-SD-NEXT: ret 147; 148; CHECK-GI-LABEL: ucmp.1.64.65: 149; CHECK-GI: // %bb.0: 150; CHECK-GI-NEXT: and x8, x1, #0x1 151; CHECK-GI-NEXT: and x9, x3, #0x1 152; CHECK-GI-NEXT: cmp x0, x2 153; CHECK-GI-NEXT: cset w10, hi 154; CHECK-GI-NEXT: cmp x8, x9 155; CHECK-GI-NEXT: cset w11, hi 156; CHECK-GI-NEXT: csel w10, w10, w11, eq 157; CHECK-GI-NEXT: cmp x0, x2 158; CHECK-GI-NEXT: cset w11, lo 159; CHECK-GI-NEXT: cmp x8, x9 160; CHECK-GI-NEXT: cset w8, lo 161; CHECK-GI-NEXT: csel w8, w11, w8, eq 162; CHECK-GI-NEXT: tst w10, #0x1 163; CHECK-GI-NEXT: cset x9, ne 164; CHECK-GI-NEXT: tst w8, #0x1 165; CHECK-GI-NEXT: csinv x8, x9, xzr, eq 166; CHECK-GI-NEXT: fmov d0, x8 167; CHECK-GI-NEXT: ret 168 %1 = call <1 x i64> @llvm.ucmp(<1 x i65> %x, <1 x i65> %y) 169 ret <1 x i64> %1 170} 171 172define <8 x i8> @u_v8i8(<8 x i8> %a, <8 x i8> %b) { 173; CHECK-LABEL: u_v8i8: 174; CHECK: // %bb.0: // %entry 175; CHECK-NEXT: cmhi v2.8b, v0.8b, v1.8b 176; CHECK-NEXT: cmhi v0.8b, v1.8b, v0.8b 177; CHECK-NEXT: sub v0.8b, v0.8b, v2.8b 178; CHECK-NEXT: ret 179entry: 180 %c = call <8 x i8> @llvm.ucmp(<8 x i8> %a, <8 x i8> %b) 181 ret <8 x i8> %c 182} 183 184define <16 x i8> @u_v16i8(<16 x i8> %a, <16 x i8> %b) { 185; CHECK-LABEL: u_v16i8: 186; CHECK: // %bb.0: // %entry 187; CHECK-NEXT: cmhi v2.16b, v0.16b, v1.16b 188; CHECK-NEXT: cmhi v0.16b, v1.16b, v0.16b 189; CHECK-NEXT: sub v0.16b, v0.16b, v2.16b 190; CHECK-NEXT: ret 191entry: 192 %c = call <16 x i8> @llvm.ucmp(<16 x i8> %a, <16 x i8> %b) 193 ret <16 x i8> %c 194} 195 196define <4 x i16> @u_v4i16(<4 x i16> %a, <4 x i16> %b) { 197; CHECK-LABEL: u_v4i16: 198; CHECK: // %bb.0: // %entry 199; CHECK-NEXT: cmhi v2.4h, v0.4h, v1.4h 200; CHECK-NEXT: cmhi v0.4h, v1.4h, v0.4h 201; CHECK-NEXT: sub v0.4h, v0.4h, v2.4h 202; CHECK-NEXT: ret 203entry: 204 %c = call <4 x i16> @llvm.ucmp(<4 x i16> %a, <4 x i16> %b) 205 ret <4 x i16> %c 206} 207 208define <8 x i16> @u_v8i16(<8 x i16> %a, <8 x i16> %b) { 209; CHECK-LABEL: u_v8i16: 210; CHECK: // %bb.0: // %entry 211; CHECK-NEXT: cmhi v2.8h, v0.8h, v1.8h 212; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h 213; CHECK-NEXT: sub v0.8h, v0.8h, v2.8h 214; CHECK-NEXT: ret 215entry: 216 %c = call <8 x i16> @llvm.ucmp(<8 x i16> %a, <8 x i16> %b) 217 ret <8 x i16> %c 218} 219 220define <16 x i16> @u_v16i16(<16 x i16> %a, <16 x i16> %b) { 221; CHECK-SD-LABEL: u_v16i16: 222; CHECK-SD: // %bb.0: // %entry 223; CHECK-SD-NEXT: cmhi v4.8h, v1.8h, v3.8h 224; CHECK-SD-NEXT: cmhi v5.8h, v0.8h, v2.8h 225; CHECK-SD-NEXT: cmhi v0.8h, v2.8h, v0.8h 226; CHECK-SD-NEXT: cmhi v1.8h, v3.8h, v1.8h 227; CHECK-SD-NEXT: sub v0.8h, v0.8h, v5.8h 228; CHECK-SD-NEXT: sub v1.8h, v1.8h, v4.8h 229; CHECK-SD-NEXT: ret 230; 231; CHECK-GI-LABEL: u_v16i16: 232; CHECK-GI: // %bb.0: // %entry 233; CHECK-GI-NEXT: cmhi v4.8h, v0.8h, v2.8h 234; CHECK-GI-NEXT: cmhi v5.8h, v1.8h, v3.8h 235; CHECK-GI-NEXT: cmhi v0.8h, v2.8h, v0.8h 236; CHECK-GI-NEXT: cmhi v1.8h, v3.8h, v1.8h 237; CHECK-GI-NEXT: sub v0.8h, v0.8h, v4.8h 238; CHECK-GI-NEXT: sub v1.8h, v1.8h, v5.8h 239; CHECK-GI-NEXT: ret 240entry: 241 %c = call <16 x i16> @llvm.ucmp(<16 x i16> %a, <16 x i16> %b) 242 ret <16 x i16> %c 243} 244 245define <2 x i32> @u_v2i32(<2 x i32> %a, <2 x i32> %b) { 246; CHECK-LABEL: u_v2i32: 247; CHECK: // %bb.0: // %entry 248; CHECK-NEXT: cmhi v2.2s, v0.2s, v1.2s 249; CHECK-NEXT: cmhi v0.2s, v1.2s, v0.2s 250; CHECK-NEXT: sub v0.2s, v0.2s, v2.2s 251; CHECK-NEXT: ret 252entry: 253 %c = call <2 x i32> @llvm.ucmp(<2 x i32> %a, <2 x i32> %b) 254 ret <2 x i32> %c 255} 256 257define <4 x i32> @u_v4i32(<4 x i32> %a, <4 x i32> %b) { 258; CHECK-LABEL: u_v4i32: 259; CHECK: // %bb.0: // %entry 260; CHECK-NEXT: cmhi v2.4s, v0.4s, v1.4s 261; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s 262; CHECK-NEXT: sub v0.4s, v0.4s, v2.4s 263; CHECK-NEXT: ret 264entry: 265 %c = call <4 x i32> @llvm.ucmp(<4 x i32> %a, <4 x i32> %b) 266 ret <4 x i32> %c 267} 268 269define <8 x i32> @u_v8i32(<8 x i32> %a, <8 x i32> %b) { 270; CHECK-SD-LABEL: u_v8i32: 271; CHECK-SD: // %bb.0: // %entry 272; CHECK-SD-NEXT: cmhi v4.4s, v1.4s, v3.4s 273; CHECK-SD-NEXT: cmhi v5.4s, v0.4s, v2.4s 274; CHECK-SD-NEXT: cmhi v0.4s, v2.4s, v0.4s 275; CHECK-SD-NEXT: cmhi v1.4s, v3.4s, v1.4s 276; CHECK-SD-NEXT: sub v0.4s, v0.4s, v5.4s 277; CHECK-SD-NEXT: sub v1.4s, v1.4s, v4.4s 278; CHECK-SD-NEXT: ret 279; 280; CHECK-GI-LABEL: u_v8i32: 281; CHECK-GI: // %bb.0: // %entry 282; CHECK-GI-NEXT: cmhi v4.4s, v0.4s, v2.4s 283; CHECK-GI-NEXT: cmhi v5.4s, v1.4s, v3.4s 284; CHECK-GI-NEXT: cmhi v0.4s, v2.4s, v0.4s 285; CHECK-GI-NEXT: cmhi v1.4s, v3.4s, v1.4s 286; CHECK-GI-NEXT: sub v0.4s, v0.4s, v4.4s 287; CHECK-GI-NEXT: sub v1.4s, v1.4s, v5.4s 288; CHECK-GI-NEXT: ret 289entry: 290 %c = call <8 x i32> @llvm.ucmp(<8 x i32> %a, <8 x i32> %b) 291 ret <8 x i32> %c 292} 293 294define <2 x i64> @u_v2i64(<2 x i64> %a, <2 x i64> %b) { 295; CHECK-LABEL: u_v2i64: 296; CHECK: // %bb.0: // %entry 297; CHECK-NEXT: cmhi v2.2d, v0.2d, v1.2d 298; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d 299; CHECK-NEXT: sub v0.2d, v0.2d, v2.2d 300; CHECK-NEXT: ret 301entry: 302 %c = call <2 x i64> @llvm.ucmp(<2 x i64> %a, <2 x i64> %b) 303 ret <2 x i64> %c 304} 305 306define <4 x i64> @u_v4i64(<4 x i64> %a, <4 x i64> %b) { 307; CHECK-SD-LABEL: u_v4i64: 308; CHECK-SD: // %bb.0: // %entry 309; CHECK-SD-NEXT: cmhi v4.2d, v1.2d, v3.2d 310; CHECK-SD-NEXT: cmhi v5.2d, v0.2d, v2.2d 311; CHECK-SD-NEXT: cmhi v0.2d, v2.2d, v0.2d 312; CHECK-SD-NEXT: cmhi v1.2d, v3.2d, v1.2d 313; CHECK-SD-NEXT: sub v0.2d, v0.2d, v5.2d 314; CHECK-SD-NEXT: sub v1.2d, v1.2d, v4.2d 315; CHECK-SD-NEXT: ret 316; 317; CHECK-GI-LABEL: u_v4i64: 318; CHECK-GI: // %bb.0: // %entry 319; CHECK-GI-NEXT: cmhi v4.2d, v0.2d, v2.2d 320; CHECK-GI-NEXT: cmhi v5.2d, v1.2d, v3.2d 321; CHECK-GI-NEXT: cmhi v0.2d, v2.2d, v0.2d 322; CHECK-GI-NEXT: cmhi v1.2d, v3.2d, v1.2d 323; CHECK-GI-NEXT: sub v0.2d, v0.2d, v4.2d 324; CHECK-GI-NEXT: sub v1.2d, v1.2d, v5.2d 325; CHECK-GI-NEXT: ret 326entry: 327 %c = call <4 x i64> @llvm.ucmp(<4 x i64> %a, <4 x i64> %b) 328 ret <4 x i64> %c 329} 330 331define <16 x i8> @signOf_neon(<8 x i16> %s0_lo, <8 x i16> %s0_hi, <8 x i16> %s1_lo, <8 x i16> %s1_hi) { 332; CHECK-SD-LABEL: signOf_neon: 333; CHECK-SD: // %bb.0: // %entry 334; CHECK-SD-NEXT: cmhi v4.8h, v1.8h, v3.8h 335; CHECK-SD-NEXT: cmhi v1.8h, v3.8h, v1.8h 336; CHECK-SD-NEXT: cmhi v3.8h, v0.8h, v2.8h 337; CHECK-SD-NEXT: cmhi v0.8h, v2.8h, v0.8h 338; CHECK-SD-NEXT: sub v1.8h, v1.8h, v4.8h 339; CHECK-SD-NEXT: sub v0.8h, v0.8h, v3.8h 340; CHECK-SD-NEXT: uzp1 v0.16b, v0.16b, v1.16b 341; CHECK-SD-NEXT: ret 342; 343; CHECK-GI-LABEL: signOf_neon: 344; CHECK-GI: // %bb.0: // %entry 345; CHECK-GI-NEXT: cmhi v4.8h, v0.8h, v2.8h 346; CHECK-GI-NEXT: cmhi v5.8h, v1.8h, v3.8h 347; CHECK-GI-NEXT: cmhi v0.8h, v2.8h, v0.8h 348; CHECK-GI-NEXT: cmhi v1.8h, v3.8h, v1.8h 349; CHECK-GI-NEXT: uzp1 v0.16b, v0.16b, v1.16b 350; CHECK-GI-NEXT: uzp1 v1.16b, v4.16b, v5.16b 351; CHECK-GI-NEXT: shl v0.16b, v0.16b, #7 352; CHECK-GI-NEXT: shl v1.16b, v1.16b, #7 353; CHECK-GI-NEXT: sshr v0.16b, v0.16b, #7 354; CHECK-GI-NEXT: sshr v1.16b, v1.16b, #7 355; CHECK-GI-NEXT: sub v0.16b, v0.16b, v1.16b 356; CHECK-GI-NEXT: ret 357entry: 358 %0 = shufflevector <8 x i16> %s0_lo, <8 x i16> %s0_hi, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 359 %1 = shufflevector <8 x i16> %s1_lo, <8 x i16> %s1_hi, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 360 %or.i = tail call <16 x i8> @llvm.ucmp.v16i8.v16i16(<16 x i16> %0, <16 x i16> %1) 361 ret <16 x i8> %or.i 362} 363