xref: /llvm-project/llvm/test/CodeGen/AArch64/swift-async.ll (revision c649fd34e928ad01951cbff298c5c44853dd41dd)
1; RUN: llc -mtriple=arm64-apple-ios15 -aarch64-enable-sink-fold=true %s -o - | FileCheck %s --check-prefixes=CHECK-NOAUTH,CHECK
2; RUN: llc -mtriple=arm64-apple-ios15 -aarch64-enable-sink-fold=true -mcpu=apple-a13 %s -o - | FileCheck %s --check-prefixes=CHECK-NOAUTH,CHECK
3; RUN: llc -mtriple=arm64e-apple-ios15 -aarch64-enable-sink-fold=true %s -o - | FileCheck %s --check-prefixes=CHECK-AUTH,CHECK
4
5; Important details in prologue:
6;   * x22 is stored just below x29
7;   * Enough stack space is allocated for everything
8define swifttailcc void @simple(ptr swiftasync %ctx) "frame-pointer"="all" {
9; CHECK-LABEL: simple:
10; CHECK: orr x29, x29, #0x100000000000000
11; CHECK: sub sp, sp, #32
12; CHECK: stp x29, x30, [sp, #16]
13
14; CHECK-NOAUTH-DAG: str x22, [sp, #8]
15; CHECK-AUTH: add x16, sp, #8
16; CHECK-AUTH: movk x16, #49946, lsl #48
17; CHECK-AUTH: mov x17, x22
18; CHECK-AUTH: pacdb x17, x16
19; CHECK-AUTH: str x17, [sp, #8]
20
21; CHECK-DAG: add x29, sp, #16
22; CHECK: .cfi_def_cfa w29, 16
23; CHECK: .cfi_offset w30, -8
24; CHECK: .cfi_offset w29, -16
25
26;[...]
27
28; CHECK: ldp x29, x30, [sp, #16]
29; CHECK: and x29, x29, #0xefffffffffffffff
30; CHECK: add sp, sp, #32
31
32  ret void
33}
34
35define swifttailcc void @more_csrs(ptr swiftasync %ctx) "frame-pointer"="all" {
36; CHECK-LABEL: more_csrs:
37; CHECK: orr x29, x29, #0x100000000000000
38; CHECK: str x23, [sp, #-32]!
39; CHECK: stp x29, x30, [sp, #16]
40
41; CHECK-NOAUTH-DAG: str x22, [sp, #8]
42; CHECK-AUTH: add x16, sp, #8
43; CHECK-AUTH: movk x16, #49946, lsl #48
44; CHECK-AUTH: mov x17, x22
45; CHECK-AUTH: pacdb x17, x16
46; CHECK-AUTH: str x17, [sp, #8]
47
48; CHECK-DAG: add x29, sp, #16
49; CHECK: .cfi_def_cfa w29, 16
50; CHECK: .cfi_offset w30, -8
51; CHECK: .cfi_offset w29, -16
52; CHECK: .cfi_offset w23, -32
53
54; [...]
55
56; CHECK: ldp x29, x30, [sp, #16]
57; CHECK: ldr x23, [sp], #32
58; CHECK: and x29, x29, #0xefffffffffffffff
59  call void asm sideeffect "", "~{x23}"()
60  ret void
61}
62
63define swifttailcc void @locals(ptr swiftasync %ctx) "frame-pointer"="all" {
64; CHECK-LABEL: locals:
65; CHECK: orr x29, x29, #0x100000000000000
66; CHECK: sub sp, sp, #64
67; CHECK: stp x29, x30, [sp, #48]
68
69; CHECK-NOAUTH-DAG: str x22, [sp, #40]
70; CHECK-AUTH: add x16, sp, #40
71; CHECK-AUTH: movk x16, #49946, lsl #48
72; CHECK-AUTH: mov x17, x22
73; CHECK-AUTH: pacdb x17, x16
74; CHECK-AUTH: str x17, [sp, #40]
75
76; CHECK-DAG: add x29, sp, #48
77; CHECK: .cfi_def_cfa w29, 16
78; CHECK: .cfi_offset w30, -8
79; CHECK: .cfi_offset w29, -16
80
81; CHECK: mov x0, sp
82; CHECK: bl _bar
83
84; [...]
85
86; CHECK: ldp x29, x30, [sp, #48]
87; CHECK: and x29, x29, #0xefffffffffffffff
88; CHECK: add sp, sp, #64
89  %var = alloca i32, i32 10
90  call void @bar(ptr %var)
91  ret void
92}
93
94define swifttailcc void @use_input_context(ptr swiftasync %ctx, ptr %ptr) "frame-pointer"="all" {
95; CHECK-LABEL: use_input_context:
96
97; CHECK-NOAUTH: str x22, [sp
98; CHECK-AUTH: mov x17, x22
99
100; CHECK-NOT: x22
101; CHECK: str x22, [x0]
102
103  store ptr %ctx, ptr %ptr
104  ret void
105}
106
107define swifttailcc ptr @context_in_func() "frame-pointer"="non-leaf" {
108; CHECK-LABEL: context_in_func:
109
110; CHECK-NOAUTH: str xzr, [sp, #8]
111; CHECK-AUTH: add x16, sp, #8
112; CHECK-AUTH: movk x16, #49946, lsl #48
113; CHECK-AUTH: mov x17, xzr
114; CHECK-AUTH: pacdb x17, x16
115; CHECK-AUTH: str x17, [sp, #8]
116
117  %ptr = call ptr @llvm.swift.async.context.addr()
118  ret ptr %ptr
119}
120
121define swifttailcc void @write_frame_context(ptr swiftasync %ctx, ptr %newctx) "frame-pointer"="non-leaf" {
122; CHECK-LABEL: write_frame_context:
123; CHECK: stur x0, [x29, #-8]
124  %ptr = call ptr @llvm.swift.async.context.addr()
125  store ptr %newctx, ptr %ptr
126  ret void
127}
128
129define swifttailcc void @simple_fp_elim(ptr swiftasync %ctx) "frame-pointer"="non-leaf" {
130; CHECK-LABEL: simple_fp_elim:
131; CHECK-NOT: orr x29, x29, #0x100000000000000
132
133  ret void
134}
135
136define swifttailcc void @large_frame(ptr swiftasync %ctx) "frame-pointer"="all" {
137; CHECK-LABEL: large_frame:
138; CHECK: str x28, [sp, #-32]!
139; CHECK: stp x29, x30, [sp, #16]
140; CHECK-NOAUTH-DAG: str x22, [sp, #8]
141; CHECK-DAG: add x29, sp, #16
142; CHECK: sub sp, sp, #1024
143; [...]
144; CHECK: add sp, sp, #1024
145; CHECK: ldp x29, x30, [sp, #16]
146; CHECK: ldr x28, [sp], #32
147; CHECK: ret
148  %var = alloca i8, i32 1024
149  ret void
150}
151
152; Important point is that there is just one 8-byte gap in the CSR region (right
153; now just above d8) to realign the stack.
154define swifttailcc void @two_unpaired_csrs(ptr swiftasync) "frame-pointer"="all" {
155; CHECK-LABEL: two_unpaired_csrs:
156; CHECK: str d8, [sp, #-48]!
157; CHECK: str x19, [sp, #16]
158; CHECK: stp x29, x30, [sp, #32]
159; CHECK-NOAUTH-DAG: str x22, [sp, #24]
160; CHECK-DAG: add x29, sp, #32
161
162; CHECK: .cfi_def_cfa w29, 16
163; CHECK: .cfi_offset w30, -8
164; CHECK: .cfi_offset w29, -16
165; CHECK: .cfi_offset w19, -32
166; CHECK: .cfi_offset b8, -48
167
168  call void asm "","~{x19},~{d8}"()
169  call swifttailcc void @bar(ptr undef)
170  ret void
171}
172declare swifttailcc void @bar(ptr)
173declare ptr @llvm.swift.async.context.addr()
174