xref: /llvm-project/llvm/test/CodeGen/AArch64/swift-async-context-slot-offset-win.ll (revision a90228b911d3c70833a4abe63b81e02a7a8da1f5)
1; RUN: llc -mtriple aarch64-unknown-windows-msvc -filetype asm %s -o - | FileCheck %s
2
3; Check that the slot offset of the async context (x22) doesn't
4; conflict with that of another callee-saved register (x21 here) and
5; saving it won't overwrite the saved value of the callee-saved
6; register.
7;
8; CHECK:        sub     sp, sp, #64
9; CHECK:        str     x19, [sp, #16]
10; CHECK:        str     x21, [sp, #24]
11; CHECK-NOT:    stp     x29, x30, [sp, #32]
12; CHECK:        stp     x29, x30, [sp, #40]
13; CHECK-NOT:    str     x22, [sp, #24]
14; CHECK:        str     x22, [sp, #32]
15
16declare ptr @llvm.swift.async.context.addr()
17declare swiftcc i64 @foo(i64 %0, i64 %1)
18declare swifttailcc void @tail(ptr swiftasync %0, ptr swiftself dereferenceable(8) %1, i64 %2)
19define internal swifttailcc void @test(ptr swiftasync %0, ptr swiftself %1, i64 %2) {
20entry:
21  %3 = load ptr, ptr %0, align 8
22  %4 = call ptr @llvm.swift.async.context.addr()
23  store ptr %3, ptr %4, align 8
24  %5 = call swiftcc i64 @foo(i64 %2, i64 %2)
25  %6 = call swiftcc i64 @foo(i64 %2, i64 %5)
26  %7 = call swiftcc i64 @foo(i64 %5, i64 %2)
27  %8 = call swiftcc i64 @foo(i64 %7, i64 %6)
28  %9 = call swiftcc i64 @foo(i64 %2, i64 %8)
29  %10 = call ptr @llvm.swift.async.context.addr()
30  musttail call swifttailcc void @tail(ptr swiftasync %10, ptr swiftself %1, i64 %2)
31  ret void
32}
33