xref: /llvm-project/llvm/test/CodeGen/AArch64/svtcf-fmul-fdiv-combine.ll (revision 9f8dcb070655b4914d47848dcfbba742f12b25bd)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc -mtriple aarch64-none-linux-gnu -enable-unsafe-fp-math -mattr=+fullfp16 < %s | FileCheck %s
3
4define half @scvtf_f16_2(i32 %state) {
5; CHECK-LABEL: scvtf_f16_2:
6; CHECK:       // %bb.0: // %entry
7; CHECK-NEXT:    scvtf h0, w0, #1
8; CHECK-NEXT:    ret
9entry:
10  %conv = sitofp i32 %state to half
11  %div = fmul half %conv, 5.000000e-01
12  ret half %div
13}
14
15define half @scvtf_f16_4(i32 %state) {
16; CHECK-LABEL: scvtf_f16_4:
17; CHECK:       // %bb.0: // %entry
18; CHECK-NEXT:    scvtf h0, w0, #2
19; CHECK-NEXT:    ret
20entry:
21  %conv = sitofp i32 %state to half
22  %div = fmul half %conv, 2.500000e-01
23  ret half %div
24}
25
26define half @scvtf_f16_8(i32 %state) {
27; CHECK-LABEL: scvtf_f16_8:
28; CHECK:       // %bb.0: // %entry
29; CHECK-NEXT:    scvtf h0, w0, #3
30; CHECK-NEXT:    ret
31entry:
32  %conv = sitofp i32 %state to half
33  %div = fmul half %conv, 1.250000e-01
34  ret half %div
35}
36
37define half @scvtf_f16_16(i32 %state) {
38; CHECK-LABEL: scvtf_f16_16:
39; CHECK:       // %bb.0: // %entry
40; CHECK-NEXT:    scvtf h0, w0, #4
41; CHECK-NEXT:    ret
42entry:
43  %conv = sitofp i32 %state to half
44  %div = fmul half %conv, 6.250000e-02
45  ret half %div
46}
47
48define half @scvtf_f16_32(i32 %state) {
49; CHECK-LABEL: scvtf_f16_32:
50; CHECK:       // %bb.0: // %entry
51; CHECK-NEXT:    scvtf h0, w0, #5
52; CHECK-NEXT:    ret
53entry:
54  %conv = sitofp i32 %state to half
55  %div = fmul half %conv, 3.125000e-02
56  ret half %div
57}
58
59define float @scvtf_f32_2(i32 %state) {
60; CHECK-LABEL: scvtf_f32_2:
61; CHECK:       // %bb.0: // %entry
62; CHECK-NEXT:    scvtf s0, w0, #1
63; CHECK-NEXT:    ret
64entry:
65  %conv = sitofp i32 %state to float
66  %div = fmul float %conv, 5.000000e-01
67  ret float %div
68}
69
70define float @scvtf_f32_4(i32 %state) {
71; CHECK-LABEL: scvtf_f32_4:
72; CHECK:       // %bb.0: // %entry
73; CHECK-NEXT:    scvtf s0, w0, #2
74; CHECK-NEXT:    ret
75entry:
76  %conv = sitofp i32 %state to float
77  %div = fmul float %conv, 2.500000e-01
78  ret float %div
79}
80
81define float @scvtf_f32_8(i32 %state) {
82; CHECK-LABEL: scvtf_f32_8:
83; CHECK:       // %bb.0: // %entry
84; CHECK-NEXT:    scvtf s0, w0, #3
85; CHECK-NEXT:    ret
86entry:
87  %conv = sitofp i32 %state to float
88  %div = fmul float %conv, 1.250000e-01
89  ret float %div
90}
91
92define float @scvtf_f32_16(i32 %state) {
93; CHECK-LABEL: scvtf_f32_16:
94; CHECK:       // %bb.0: // %entry
95; CHECK-NEXT:    scvtf s0, w0, #4
96; CHECK-NEXT:    ret
97entry:
98  %conv = sitofp i32 %state to float
99  %div = fmul float %conv, 6.250000e-02
100  ret float %div
101}
102
103define float @scvtf_f32_32(i32 %state) {
104; CHECK-LABEL: scvtf_f32_32:
105; CHECK:       // %bb.0: // %entry
106; CHECK-NEXT:    scvtf s0, w0, #5
107; CHECK-NEXT:    ret
108entry:
109  %conv = sitofp i32 %state to float
110  %div = fmul float %conv, 3.125000e-02
111  ret float %div
112}
113
114define double @scvtf_f64_2(i64 %state) {
115; CHECK-LABEL: scvtf_f64_2:
116; CHECK:       // %bb.0: // %entry
117; CHECK-NEXT:    scvtf d0, x0, #1
118; CHECK-NEXT:    ret
119entry:
120  %conv = sitofp i64 %state to double
121  %div = fmul double %conv, 5.000000e-01
122  ret double %div
123}
124
125define double @scvtf_f64_4(i64 %state) {
126; CHECK-LABEL: scvtf_f64_4:
127; CHECK:       // %bb.0: // %entry
128; CHECK-NEXT:    scvtf d0, x0, #2
129; CHECK-NEXT:    ret
130entry:
131  %conv = sitofp i64 %state to double
132  %div = fmul double %conv, 2.500000e-01
133  ret double %div
134}
135
136define double @scvtf_f64_8(i64 %state) {
137; CHECK-LABEL: scvtf_f64_8:
138; CHECK:       // %bb.0: // %entry
139; CHECK-NEXT:    scvtf d0, x0, #3
140; CHECK-NEXT:    ret
141entry:
142  %conv = sitofp i64 %state to double
143  %div = fmul double %conv, 1.250000e-01
144  ret double %div
145}
146
147define double @scvtf_f64_16(i64 %state) {
148; CHECK-LABEL: scvtf_f64_16:
149; CHECK:       // %bb.0: // %entry
150; CHECK-NEXT:    scvtf d0, x0, #4
151; CHECK-NEXT:    ret
152entry:
153  %conv = sitofp i64 %state to double
154  %div = fmul double %conv, 6.250000e-02
155  ret double %div
156}
157
158define double @scvtf_f64_32(i64 %state) {
159; CHECK-LABEL: scvtf_f64_32:
160; CHECK:       // %bb.0: // %entry
161; CHECK-NEXT:    scvtf d0, x0, #5
162; CHECK-NEXT:    ret
163entry:
164  %conv = sitofp i64 %state to double
165  %div = fmul double %conv, 3.125000e-02
166  ret double %div
167}
168