xref: /llvm-project/llvm/test/CodeGen/AArch64/sve2p1-intrinsics-cntp.ll (revision 62baf21daa377c4ec1a641b26931063c1117d262) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2p1 < %s | FileCheck %s
3; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme2 -force-streaming < %s | FileCheck %s
4
5define i64 @test_svcntp_c8_vlx2(target("aarch64.svcount") %pn) nounwind {
6; CHECK-LABEL: test_svcntp_c8_vlx2:
7; CHECK:       // %bb.0:
8; CHECK-NEXT:    cntp x0, pn0.b, vlx2
9; CHECK-NEXT:    ret
10  %res = call i64 @llvm.aarch64.sve.cntp.c8(target("aarch64.svcount") %pn, i32 2)
11  ret i64 %res
12}
13
14define i64 @test_svcntp_c8_vlx4(target("aarch64.svcount") %pn) nounwind {
15; CHECK-LABEL: test_svcntp_c8_vlx4:
16; CHECK:       // %bb.0:
17; CHECK-NEXT:    cntp x0, pn0.b, vlx4
18; CHECK-NEXT:    ret
19  %res = call i64 @llvm.aarch64.sve.cntp.c8(target("aarch64.svcount") %pn, i32 4)
20  ret i64 %res
21}
22
23define i64 @test_svcntp_c16_vlx2(target("aarch64.svcount") %pn) nounwind {
24; CHECK-LABEL: test_svcntp_c16_vlx2:
25; CHECK:       // %bb.0:
26; CHECK-NEXT:    cntp x0, pn0.h, vlx2
27; CHECK-NEXT:    ret
28  %res = call i64 @llvm.aarch64.sve.cntp.c16(target("aarch64.svcount") %pn, i32 2)
29  ret i64 %res
30}
31
32define i64 @test_svcntp_c16_vlx4(target("aarch64.svcount") %pn) nounwind {
33; CHECK-LABEL: test_svcntp_c16_vlx4:
34; CHECK:       // %bb.0:
35; CHECK-NEXT:    cntp x0, pn0.h, vlx4
36; CHECK-NEXT:    ret
37  %res = call i64 @llvm.aarch64.sve.cntp.c16(target("aarch64.svcount") %pn, i32 4)
38  ret i64 %res
39}
40
41define i64 @test_svcntp_c32_vlx2(target("aarch64.svcount") %pn) nounwind {
42; CHECK-LABEL: test_svcntp_c32_vlx2:
43; CHECK:       // %bb.0:
44; CHECK-NEXT:    cntp x0, pn0.s, vlx2
45; CHECK-NEXT:    ret
46  %res = call i64 @llvm.aarch64.sve.cntp.c32(target("aarch64.svcount") %pn, i32 2)
47  ret i64 %res
48}
49
50define i64 @test_svcntp_c32_vlx4(target("aarch64.svcount") %pn) nounwind {
51; CHECK-LABEL: test_svcntp_c32_vlx4:
52; CHECK:       // %bb.0:
53; CHECK-NEXT:    cntp x0, pn0.s, vlx4
54; CHECK-NEXT:    ret
55  %res = call i64 @llvm.aarch64.sve.cntp.c32(target("aarch64.svcount") %pn, i32 4)
56  ret i64 %res
57}
58
59define i64 @test_svcntp_c64_vlx2(target("aarch64.svcount") %pn) nounwind {
60; CHECK-LABEL: test_svcntp_c64_vlx2:
61; CHECK:       // %bb.0:
62; CHECK-NEXT:    cntp x0, pn0.d, vlx2
63; CHECK-NEXT:    ret
64  %res = call i64 @llvm.aarch64.sve.cntp.c64(target("aarch64.svcount") %pn, i32 2)
65  ret i64 %res
66}
67
68define i64 @test_svcntp_c64_vlx4(target("aarch64.svcount") %pn) nounwind {
69; CHECK-LABEL: test_svcntp_c64_vlx4:
70; CHECK:       // %bb.0:
71; CHECK-NEXT:    cntp x0, pn0.d, vlx4
72; CHECK-NEXT:    ret
73  %res = call i64 @llvm.aarch64.sve.cntp.c64(target("aarch64.svcount") %pn, i32 4)
74  ret i64 %res
75}
76
77
78declare i64 @llvm.aarch64.sve.cntp.c8(target("aarch64.svcount"), i32)
79declare i64 @llvm.aarch64.sve.cntp.c16(target("aarch64.svcount"), i32)
80declare i64 @llvm.aarch64.sve.cntp.c32(target("aarch64.svcount"), i32)
81declare i64 @llvm.aarch64.sve.cntp.c64(target("aarch64.svcount"), i32)
82