1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 < %s | FileCheck %s 3 4; 5; LDNT1H, LDNT1W, LDNT1D: base + 64-bit index 6; e.g. 7; lsl z0.d, z0.d, #1 8; ldnt1h z0.d, p0/z, [z0.d, x0] 9; 10 11define <vscale x 2 x i64> @gldnt1h_index(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) { 12; CHECK-LABEL: gldnt1h_index: 13; CHECK: // %bb.0: 14; CHECK-NEXT: lsl z0.d, z0.d, #1 15; CHECK-NEXT: ldnt1h { z0.d }, p0/z, [z0.d, x0] 16; CHECK-NEXT: ret 17 %load = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16(<vscale x 2 x i1> %pg, 18 ptr %base, 19 <vscale x 2 x i64> %b) 20 %res = zext <vscale x 2 x i16> %load to <vscale x 2 x i64> 21 ret <vscale x 2 x i64> %res 22} 23 24define <vscale x 2 x i64> @gldnt1w_index(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) { 25; CHECK-LABEL: gldnt1w_index: 26; CHECK: // %bb.0: 27; CHECK-NEXT: lsl z0.d, z0.d, #2 28; CHECK-NEXT: ldnt1w { z0.d }, p0/z, [z0.d, x0] 29; CHECK-NEXT: ret 30 %load = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32(<vscale x 2 x i1> %pg, 31 ptr %base, 32 <vscale x 2 x i64> %b) 33 %res = zext <vscale x 2 x i32> %load to <vscale x 2 x i64> 34 ret <vscale x 2 x i64> %res 35} 36 37define <vscale x 2 x i64> @gldnt1d_index(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) { 38; CHECK-LABEL: gldnt1d_index: 39; CHECK: // %bb.0: 40; CHECK-NEXT: lsl z0.d, z0.d, #3 41; CHECK-NEXT: ldnt1d { z0.d }, p0/z, [z0.d, x0] 42; CHECK-NEXT: ret 43 %load = call <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64(<vscale x 2 x i1> %pg, 44 ptr %base, 45 <vscale x 2 x i64> %b) 46 ret <vscale x 2 x i64> %load 47} 48 49define <vscale x 2 x double> @gldnt1d_index_double(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) { 50; CHECK-LABEL: gldnt1d_index_double: 51; CHECK: // %bb.0: 52; CHECK-NEXT: lsl z0.d, z0.d, #3 53; CHECK-NEXT: ldnt1d { z0.d }, p0/z, [z0.d, x0] 54; CHECK-NEXT: ret 55 %load = call <vscale x 2 x double> @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64(<vscale x 2 x i1> %pg, 56 ptr %base, 57 <vscale x 2 x i64> %b) 58 ret <vscale x 2 x double> %load 59} 60 61; 62; LDNT1SH, LDNT1SW: base + 64-bit index 63; e.g. 64; lsl z0.d, z0.d, #1 65; ldnt1sh z0.d, p0/z, [z0.d, x0] 66; 67 68define <vscale x 2 x i64> @gldnt1sh_index(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) { 69; CHECK-LABEL: gldnt1sh_index: 70; CHECK: // %bb.0: 71; CHECK-NEXT: lsl z0.d, z0.d, #1 72; CHECK-NEXT: ldnt1sh { z0.d }, p0/z, [z0.d, x0] 73; CHECK-NEXT: ret 74 %load = call <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16(<vscale x 2 x i1> %pg, 75 ptr %base, 76 <vscale x 2 x i64> %b) 77 %res = sext <vscale x 2 x i16> %load to <vscale x 2 x i64> 78 ret <vscale x 2 x i64> %res 79} 80 81define <vscale x 2 x i64> @gldnt1sw_index(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) { 82; CHECK-LABEL: gldnt1sw_index: 83; CHECK: // %bb.0: 84; CHECK-NEXT: lsl z0.d, z0.d, #2 85; CHECK-NEXT: ldnt1sw { z0.d }, p0/z, [z0.d, x0] 86; CHECK-NEXT: ret 87 %load = call <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32(<vscale x 2 x i1> %pg, 88 ptr %base, 89 <vscale x 2 x i64> %b) 90 %res = sext <vscale x 2 x i32> %load to <vscale x 2 x i64> 91 ret <vscale x 2 x i64> %res 92} 93 94declare <vscale x 2 x i16> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16(<vscale x 2 x i1>, ptr, <vscale x 2 x i64>) 95declare <vscale x 2 x i32> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32(<vscale x 2 x i1>, ptr, <vscale x 2 x i64>) 96declare <vscale x 2 x i64> @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64(<vscale x 2 x i1>, ptr, <vscale x 2 x i64>) 97declare <vscale x 2 x double> @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64(<vscale x 2 x i1>, ptr, <vscale x 2 x i64>) 98