xref: /llvm-project/llvm/test/CodeGen/AArch64/sve-vselect-imm.ll (revision db158c7c830807caeeb0691739c41f1d522029e9) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s
3
4define <vscale x 16 x i8> @sel_8_positive(<vscale x 16 x i1> %p) {
5; CHECK-LABEL: sel_8_positive:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    mov z0.b, p0/z, #3 // =0x3
8; CHECK-NEXT:    ret
9  %vec = shufflevector <vscale x 16 x i8> insertelement (<vscale x 16 x i8> undef, i8 3, i32 0), <vscale x 16 x i8> zeroinitializer, <vscale x 16 x i32> zeroinitializer
10  %sel = select <vscale x 16 x i1> %p, <vscale x 16 x i8> %vec, <vscale x 16 x i8> zeroinitializer
11  ret <vscale x 16 x i8> %sel
12}
13
14define <vscale x 8 x i16> @sel_16_positive(<vscale x 8 x i1> %p) {
15; CHECK-LABEL: sel_16_positive:
16; CHECK:       // %bb.0:
17; CHECK-NEXT:    mov z0.h, p0/z, #3 // =0x3
18; CHECK-NEXT:    ret
19  %vec = shufflevector <vscale x 8 x i16> insertelement (<vscale x 8 x i16> undef, i16 3, i32 0), <vscale x 8 x i16> zeroinitializer, <vscale x 8 x i32> zeroinitializer
20  %sel = select <vscale x 8 x i1> %p, <vscale x 8 x i16> %vec, <vscale x 8 x i16> zeroinitializer
21  ret <vscale x 8 x i16> %sel
22}
23
24define <vscale x 4 x i32> @sel_32_positive(<vscale x 4 x i1> %p) {
25; CHECK-LABEL: sel_32_positive:
26; CHECK:       // %bb.0:
27; CHECK-NEXT:    mov z0.s, p0/z, #3 // =0x3
28; CHECK-NEXT:    ret
29  %vec = shufflevector <vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 3, i32 0), <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> zeroinitializer
30  %sel = select <vscale x 4 x i1> %p, <vscale x 4 x i32> %vec, <vscale x 4 x i32> zeroinitializer
31  ret <vscale x 4 x i32> %sel
32}
33
34define <vscale x 2 x i64> @sel_64_positive(<vscale x 2 x i1> %p) {
35; CHECK-LABEL: sel_64_positive:
36; CHECK:       // %bb.0:
37; CHECK-NEXT:    mov z0.d, p0/z, #3 // =0x3
38; CHECK-NEXT:    ret
39  %vec = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 3, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer
40  %sel = select <vscale x 2 x i1> %p, <vscale x 2 x i64> %vec, <vscale x 2 x i64> zeroinitializer
41  ret <vscale x 2 x i64> %sel
42}
43
44define <vscale x 16 x i8> @sel_8_negative(<vscale x 16 x i1> %p) {
45; CHECK-LABEL: sel_8_negative:
46; CHECK:       // %bb.0:
47; CHECK-NEXT:    mov z0.b, p0/z, #-128 // =0xffffffffffffff80
48; CHECK-NEXT:    ret
49  %vec = shufflevector <vscale x 16 x i8> insertelement (<vscale x 16 x i8> undef, i8 -128, i32 0), <vscale x 16 x i8> zeroinitializer, <vscale x 16 x i32> zeroinitializer
50  %sel = select <vscale x 16 x i1> %p, <vscale x 16 x i8> %vec, <vscale x 16 x i8> zeroinitializer
51  ret <vscale x 16 x i8> %sel
52}
53
54define <vscale x 8 x i16> @sel_16_negative(<vscale x 8 x i1> %p) {
55; CHECK-LABEL: sel_16_negative:
56; CHECK:       // %bb.0:
57; CHECK-NEXT:    mov z0.h, p0/z, #-128 // =0xffffffffffffff80
58; CHECK-NEXT:    ret
59  %vec = shufflevector <vscale x 8 x i16> insertelement (<vscale x 8 x i16> undef, i16 -128, i32 0), <vscale x 8 x i16> zeroinitializer, <vscale x 8 x i32> zeroinitializer
60  %sel = select <vscale x 8 x i1> %p, <vscale x 8 x i16> %vec, <vscale x 8 x i16> zeroinitializer
61  ret <vscale x 8 x i16> %sel
62}
63
64define <vscale x 4 x i32> @sel_32_negative(<vscale x 4 x i1> %p) {
65; CHECK-LABEL: sel_32_negative:
66; CHECK:       // %bb.0:
67; CHECK-NEXT:    mov z0.s, p0/z, #-128 // =0xffffffffffffff80
68; CHECK-NEXT:    ret
69  %vec = shufflevector <vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 -128, i32 0), <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> zeroinitializer
70  %sel = select <vscale x 4 x i1> %p, <vscale x 4 x i32> %vec, <vscale x 4 x i32> zeroinitializer
71  ret <vscale x 4 x i32> %sel
72}
73
74define <vscale x 2 x i64> @sel_64_negative(<vscale x 2 x i1> %p) {
75; CHECK-LABEL: sel_64_negative:
76; CHECK:       // %bb.0:
77; CHECK-NEXT:    mov z0.d, p0/z, #-128 // =0xffffffffffffff80
78; CHECK-NEXT:    ret
79  %vec = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 -128, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer
80  %sel = select <vscale x 2 x i1> %p, <vscale x 2 x i64> %vec, <vscale x 2 x i64> zeroinitializer
81  ret <vscale x 2 x i64> %sel
82}
83
84define <vscale x 8 x i16> @sel_16_shifted(<vscale x 8 x i1> %p) {
85; CHECK-LABEL: sel_16_shifted:
86; CHECK:       // %bb.0:
87; CHECK-NEXT:    mov z0.h, p0/z, #512 // =0x200
88; CHECK-NEXT:    ret
89  %vec = shufflevector <vscale x 8 x i16> insertelement (<vscale x 8 x i16> undef, i16 512, i32 0), <vscale x 8 x i16> zeroinitializer, <vscale x 8 x i32> zeroinitializer
90  %sel = select <vscale x 8 x i1> %p, <vscale x 8 x i16> %vec, <vscale x 8 x i16> zeroinitializer
91  ret <vscale x 8 x i16> %sel
92}
93
94define <vscale x 4 x i32> @sel_32_shifted(<vscale x 4 x i1> %p) {
95; CHECK-LABEL: sel_32_shifted:
96; CHECK:       // %bb.0:
97; CHECK-NEXT:    mov z0.s, p0/z, #512 // =0x200
98; CHECK-NEXT:    ret
99  %vec = shufflevector <vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 512, i32 0), <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> zeroinitializer
100  %sel = select <vscale x 4 x i1> %p, <vscale x 4 x i32> %vec, <vscale x 4 x i32> zeroinitializer
101  ret <vscale x 4 x i32> %sel
102}
103
104define <vscale x 2 x i64> @sel_64_shifted(<vscale x 2 x i1> %p) {
105; CHECK-LABEL: sel_64_shifted:
106; CHECK:       // %bb.0:
107; CHECK-NEXT:    mov z0.d, p0/z, #512 // =0x200
108; CHECK-NEXT:    ret
109  %vec = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 512, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer
110  %sel = select <vscale x 2 x i1> %p, <vscale x 2 x i64> %vec, <vscale x 2 x i64> zeroinitializer
111  ret <vscale x 2 x i64> %sel
112}
113
114; TODO: We could actually use something like "cpy z0.b, p0/z, #-128". But it's
115; a little tricky to prove correctness: we're using the predicate with the
116; wrong width, so we'd have to prove the bits which would normally be unused
117; are actually zero.
118define <vscale x 8 x i16> @sel_16_illegal_wrong_extension(<vscale x 8 x i1> %p) {
119; CHECK-LABEL: sel_16_illegal_wrong_extension:
120; CHECK:       // %bb.0:
121; CHECK-NEXT:    mov z0.h, #128 // =0x80
122; CHECK-NEXT:    mov z1.h, #0 // =0x0
123; CHECK-NEXT:    sel z0.h, p0, z0.h, z1.h
124; CHECK-NEXT:    ret
125  %vec = shufflevector <vscale x 8 x i16> insertelement (<vscale x 8 x i16> undef, i16 128, i32 0), <vscale x 8 x i16> zeroinitializer, <vscale x 8 x i32> zeroinitializer
126  %sel = select <vscale x 8 x i1> %p, <vscale x 8 x i16> %vec, <vscale x 8 x i16> zeroinitializer
127  ret <vscale x 8 x i16> %sel
128}
129
130define <vscale x 4 x i32> @sel_32_illegal_wrong_extension(<vscale x 4 x i1> %p) {
131; CHECK-LABEL: sel_32_illegal_wrong_extension:
132; CHECK:       // %bb.0:
133; CHECK-NEXT:    mov z0.s, #128 // =0x80
134; CHECK-NEXT:    mov z1.s, #0 // =0x0
135; CHECK-NEXT:    sel z0.s, p0, z0.s, z1.s
136; CHECK-NEXT:    ret
137  %vec = shufflevector <vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 128, i32 0), <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> zeroinitializer
138  %sel = select <vscale x 4 x i1> %p, <vscale x 4 x i32> %vec, <vscale x 4 x i32> zeroinitializer
139  ret <vscale x 4 x i32> %sel
140}
141
142define <vscale x 2 x i64> @sel_64_illegal_wrong_extension(<vscale x 2 x i1> %p) {
143; CHECK-LABEL: sel_64_illegal_wrong_extension:
144; CHECK:       // %bb.0:
145; CHECK-NEXT:    mov z0.d, #128 // =0x80
146; CHECK-NEXT:    mov z1.d, #0 // =0x0
147; CHECK-NEXT:    sel z0.d, p0, z0.d, z1.d
148; CHECK-NEXT:    ret
149  %vec = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 128, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer
150  %sel = select <vscale x 2 x i1> %p, <vscale x 2 x i64> %vec, <vscale x 2 x i64> zeroinitializer
151  ret <vscale x 2 x i64> %sel
152}
153
154define <vscale x 8 x i16> @sel_16_illegal_shifted(<vscale x 8 x i1> %p) {
155; CHECK-LABEL: sel_16_illegal_shifted:
156; CHECK:       // %bb.0:
157; CHECK-NEXT:    mov w8, #513 // =0x201
158; CHECK-NEXT:    mov z1.h, #0 // =0x0
159; CHECK-NEXT:    mov z0.h, w8
160; CHECK-NEXT:    sel z0.h, p0, z0.h, z1.h
161; CHECK-NEXT:    ret
162  %vec = shufflevector <vscale x 8 x i16> insertelement (<vscale x 8 x i16> undef, i16 513, i32 0), <vscale x 8 x i16> zeroinitializer, <vscale x 8 x i32> zeroinitializer
163  %sel = select <vscale x 8 x i1> %p, <vscale x 8 x i16> %vec, <vscale x 8 x i16> zeroinitializer
164  ret <vscale x 8 x i16> %sel
165}
166
167define <vscale x 4 x i32> @sel_32_illegal_shifted(<vscale x 4 x i1> %p) {
168; CHECK-LABEL: sel_32_illegal_shifted:
169; CHECK:       // %bb.0:
170; CHECK-NEXT:    mov w8, #513 // =0x201
171; CHECK-NEXT:    mov z1.s, #0 // =0x0
172; CHECK-NEXT:    mov z0.s, w8
173; CHECK-NEXT:    sel z0.s, p0, z0.s, z1.s
174; CHECK-NEXT:    ret
175  %vec = shufflevector <vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 513, i32 0), <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> zeroinitializer
176  %sel = select <vscale x 4 x i1> %p, <vscale x 4 x i32> %vec, <vscale x 4 x i32> zeroinitializer
177  ret <vscale x 4 x i32> %sel
178}
179
180define <vscale x 2 x i64> @sel_64_illegal_shifted(<vscale x 2 x i1> %p) {
181; CHECK-LABEL: sel_64_illegal_shifted:
182; CHECK:       // %bb.0:
183; CHECK-NEXT:    mov w8, #513 // =0x201
184; CHECK-NEXT:    mov z1.d, #0 // =0x0
185; CHECK-NEXT:    mov z0.d, x8
186; CHECK-NEXT:    sel z0.d, p0, z0.d, z1.d
187; CHECK-NEXT:    ret
188  %vec = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 513, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer
189  %sel = select <vscale x 2 x i1> %p, <vscale x 2 x i64> %vec, <vscale x 2 x i64> zeroinitializer
190  ret <vscale x 2 x i64> %sel
191}
192
193define <vscale x 16 x i8> @sel_merge_8_positive(<vscale x 16 x i1> %p, <vscale x 16 x i8> %in) {
194; CHECK-LABEL: sel_merge_8_positive:
195; CHECK:       // %bb.0:
196; CHECK-NEXT:    mov z0.b, p0/m, #3 // =0x3
197; CHECK-NEXT:    ret
198  %vec = shufflevector <vscale x 16 x i8> insertelement (<vscale x 16 x i8> undef, i8 3, i32 0), <vscale x 16 x i8> zeroinitializer, <vscale x 16 x i32> zeroinitializer
199  %sel = select <vscale x 16 x i1> %p, <vscale x 16 x i8> %vec, <vscale x 16 x i8> %in
200  ret <vscale x 16 x i8> %sel
201}
202
203define <vscale x 8 x i16> @sel_merge_16_positive(<vscale x 8 x i1> %p, <vscale x 8 x i16> %in) {
204; CHECK-LABEL: sel_merge_16_positive:
205; CHECK:       // %bb.0:
206; CHECK-NEXT:    mov z0.h, p0/m, #3 // =0x3
207; CHECK-NEXT:    ret
208  %vec = shufflevector <vscale x 8 x i16> insertelement (<vscale x 8 x i16> undef, i16 3, i32 0), <vscale x 8 x i16> zeroinitializer, <vscale x 8 x i32> zeroinitializer
209  %sel = select <vscale x 8 x i1> %p, <vscale x 8 x i16> %vec, <vscale x 8 x i16> %in
210  ret <vscale x 8 x i16> %sel
211}
212
213define <vscale x 4 x i32> @sel_merge_32_positive(<vscale x 4 x i1> %p, <vscale x 4 x i32> %in) {
214; CHECK-LABEL: sel_merge_32_positive:
215; CHECK:       // %bb.0:
216; CHECK-NEXT:    mov z0.s, p0/m, #3 // =0x3
217; CHECK-NEXT:    ret
218  %vec = shufflevector <vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 3, i32 0), <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> zeroinitializer
219  %sel = select <vscale x 4 x i1> %p, <vscale x 4 x i32> %vec, <vscale x 4 x i32> %in
220  ret <vscale x 4 x i32> %sel
221}
222
223define <vscale x 2 x i64> @sel_merge_64_positive(<vscale x 2 x i1> %p, <vscale x 2 x i64> %in) {
224; CHECK-LABEL: sel_merge_64_positive:
225; CHECK:       // %bb.0:
226; CHECK-NEXT:    mov z0.d, p0/m, #3 // =0x3
227; CHECK-NEXT:    ret
228  %vec = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 3, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer
229  %sel = select <vscale x 2 x i1> %p, <vscale x 2 x i64> %vec, <vscale x 2 x i64> %in
230  ret <vscale x 2 x i64> %sel
231}
232
233define <vscale x 16 x i8> @sel_merge_8_negative(<vscale x 16 x i1> %p, <vscale x 16 x i8> %in) {
234; CHECK-LABEL: sel_merge_8_negative:
235; CHECK:       // %bb.0:
236; CHECK-NEXT:    mov z0.b, p0/m, #-128 // =0xffffffffffffff80
237; CHECK-NEXT:    ret
238  %vec = shufflevector <vscale x 16 x i8> insertelement (<vscale x 16 x i8> undef, i8 -128, i32 0), <vscale x 16 x i8> zeroinitializer, <vscale x 16 x i32> zeroinitializer
239  %sel = select <vscale x 16 x i1> %p, <vscale x 16 x i8> %vec, <vscale x 16 x i8> %in
240  ret <vscale x 16 x i8> %sel
241}
242
243define <vscale x 8 x i16> @sel_merge_16_negative(<vscale x 8 x i1> %p, <vscale x 8 x i16> %in) {
244; CHECK-LABEL: sel_merge_16_negative:
245; CHECK:       // %bb.0:
246; CHECK-NEXT:    mov z0.h, p0/m, #-128 // =0xffffffffffffff80
247; CHECK-NEXT:    ret
248  %vec = shufflevector <vscale x 8 x i16> insertelement (<vscale x 8 x i16> undef, i16 -128, i32 0), <vscale x 8 x i16> zeroinitializer, <vscale x 8 x i32> zeroinitializer
249  %sel = select <vscale x 8 x i1> %p, <vscale x 8 x i16> %vec, <vscale x 8 x i16> %in
250  ret <vscale x 8 x i16> %sel
251}
252
253define <vscale x 4 x i32> @sel_merge_32_negative(<vscale x 4 x i1> %p, <vscale x 4 x i32> %in) {
254; CHECK-LABEL: sel_merge_32_negative:
255; CHECK:       // %bb.0:
256; CHECK-NEXT:    mov z0.s, p0/m, #-128 // =0xffffffffffffff80
257; CHECK-NEXT:    ret
258  %vec = shufflevector <vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 -128, i32 0), <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> zeroinitializer
259  %sel = select <vscale x 4 x i1> %p, <vscale x 4 x i32> %vec, <vscale x 4 x i32> %in
260  ret <vscale x 4 x i32> %sel
261}
262
263define <vscale x 2 x i64> @sel_merge_64_negative(<vscale x 2 x i1> %p, <vscale x 2 x i64> %in) {
264; CHECK-LABEL: sel_merge_64_negative:
265; CHECK:       // %bb.0:
266; CHECK-NEXT:    mov z0.d, p0/m, #-128 // =0xffffffffffffff80
267; CHECK-NEXT:    ret
268  %vec = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 -128, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer
269  %sel = select <vscale x 2 x i1> %p, <vscale x 2 x i64> %vec, <vscale x 2 x i64> %in
270  ret <vscale x 2 x i64> %sel
271}
272
273define <vscale x 16 x i8> @sel_merge_8_zero(<vscale x 16 x i1> %p, <vscale x 16 x i8> %in) {
274; CHECK-LABEL: sel_merge_8_zero:
275; CHECK:       // %bb.0:
276; CHECK-NEXT:    mov z0.b, p0/m, #0 // =0x0
277; CHECK-NEXT:    ret
278  %sel = select <vscale x 16 x i1> %p, <vscale x 16 x i8> zeroinitializer, <vscale x 16 x i8> %in
279  ret <vscale x 16 x i8> %sel
280}
281
282define <vscale x 8 x i16> @sel_merge_16_zero(<vscale x 8 x i1> %p, <vscale x 8 x i16> %in) {
283; CHECK-LABEL: sel_merge_16_zero:
284; CHECK:       // %bb.0:
285; CHECK-NEXT:    mov z0.h, p0/m, #0 // =0x0
286; CHECK-NEXT:    ret
287  %sel = select <vscale x 8 x i1> %p, <vscale x 8 x i16> zeroinitializer, <vscale x 8 x i16> %in
288  ret <vscale x 8 x i16> %sel
289}
290
291define <vscale x 4 x i32> @sel_merge_32_zero(<vscale x 4 x i1> %p, <vscale x 4 x i32> %in) {
292; CHECK-LABEL: sel_merge_32_zero:
293; CHECK:       // %bb.0:
294; CHECK-NEXT:    mov z0.s, p0/m, #0 // =0x0
295; CHECK-NEXT:    ret
296  %sel = select <vscale x 4 x i1> %p, <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> %in
297  ret <vscale x 4 x i32> %sel
298}
299
300define <vscale x 2 x i64> @sel_merge_64_zero(<vscale x 2 x i1> %p, <vscale x 2 x i64> %in) {
301; CHECK-LABEL: sel_merge_64_zero:
302; CHECK:       // %bb.0:
303; CHECK-NEXT:    mov z0.d, p0/m, #0 // =0x0
304; CHECK-NEXT:    ret
305  %sel = select <vscale x 2 x i1> %p, <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i64> %in
306  ret <vscale x 2 x i64> %sel
307}
308
309define <vscale x 8 x half> @sel_merge_nxv8f16_zero(<vscale x 8 x i1> %p, <vscale x 8 x half> %in) {
310; CHECK-LABEL: sel_merge_nxv8f16_zero:
311; CHECK:       // %bb.0:
312; CHECK-NEXT:    mov z0.h, p0/m, #0 // =0x0
313; CHECK-NEXT:    ret
314%sel = select <vscale x 8 x i1> %p, <vscale x 8 x half> zeroinitializer, <vscale x 8 x half> %in
315ret <vscale x 8 x half> %sel
316}
317
318define <vscale x 4 x half> @sel_merge_nx4f16_zero(<vscale x 4 x i1> %p, <vscale x 4 x half> %in) {
319; CHECK-LABEL: sel_merge_nx4f16_zero:
320; CHECK:       // %bb.0:
321; CHECK-NEXT:    mov z0.s, p0/m, #0 // =0x0
322; CHECK-NEXT:    ret
323%sel = select <vscale x 4 x i1> %p, <vscale x 4 x half> zeroinitializer, <vscale x 4 x half> %in
324ret <vscale x 4 x half> %sel
325}
326
327define <vscale x 2 x half> @sel_merge_nx2f16_zero(<vscale x 2 x i1> %p, <vscale x 2 x half> %in) {
328; CHECK-LABEL: sel_merge_nx2f16_zero:
329; CHECK:       // %bb.0:
330; CHECK-NEXT:    mov z0.d, p0/m, #0 // =0x0
331; CHECK-NEXT:    ret
332%sel = select <vscale x 2 x i1> %p, <vscale x 2 x half> zeroinitializer, <vscale x 2 x half> %in
333ret <vscale x 2 x half> %sel
334}
335
336define <vscale x 4 x float> @sel_merge_nx4f32_zero(<vscale x 4 x i1> %p, <vscale x 4 x float> %in) {
337; CHECK-LABEL: sel_merge_nx4f32_zero:
338; CHECK:       // %bb.0:
339; CHECK-NEXT:    mov z0.s, p0/m, #0 // =0x0
340; CHECK-NEXT:    ret
341%sel = select <vscale x 4 x i1> %p, <vscale x 4 x float> zeroinitializer, <vscale x 4 x float> %in
342ret <vscale x 4 x float> %sel
343}
344
345define <vscale x 2 x float> @sel_merge_nx2f32_zero(<vscale x 2 x i1> %p, <vscale x 2 x float> %in) {
346; CHECK-LABEL: sel_merge_nx2f32_zero:
347; CHECK:       // %bb.0:
348; CHECK-NEXT:    mov z0.d, p0/m, #0 // =0x0
349; CHECK-NEXT:    ret
350%sel = select <vscale x 2 x i1> %p, <vscale x 2 x float> zeroinitializer, <vscale x 2 x float> %in
351ret <vscale x 2 x float> %sel
352}
353
354define <vscale x 2 x double> @sel_merge_nx2f64_zero(<vscale x 2 x i1> %p, <vscale x 2 x double> %in) {
355; CHECK-LABEL: sel_merge_nx2f64_zero:
356; CHECK:       // %bb.0:
357; CHECK-NEXT:    mov z0.d, p0/m, #0 // =0x0
358; CHECK-NEXT:    ret
359%sel = select <vscale x 2 x i1> %p, <vscale x 2 x double> zeroinitializer, <vscale x 2 x double> %in
360ret <vscale x 2 x double> %sel
361}
362
363define <vscale x 8 x half> @sel_merge_nxv8f16_negative_zero(<vscale x 8 x i1> %p, <vscale x 8 x half> %in) {
364; CHECK-LABEL: sel_merge_nxv8f16_negative_zero:
365; CHECK:       // %bb.0:
366; CHECK-NEXT:    mov w8, #32768 // =0x8000
367; CHECK-NEXT:    mov z1.h, w8
368; CHECK-NEXT:    mov z0.h, p0/m, z1.h
369; CHECK-NEXT:    ret
370%vec = shufflevector <vscale x 8 x half> insertelement (<vscale x 8 x half> undef, half -0.0, i32 0), <vscale x 8 x half> zeroinitializer, <vscale x 8 x i32> zeroinitializer
371%sel = select <vscale x 8 x i1> %p, <vscale x 8 x half> %vec, <vscale x 8 x half> %in
372ret <vscale x 8 x half> %sel
373}
374
375define <vscale x 4 x half> @sel_merge_nx4f16_negative_zero(<vscale x 4 x i1> %p, <vscale x 4 x half> %in) {
376; CHECK-LABEL: sel_merge_nx4f16_negative_zero:
377; CHECK:       // %bb.0:
378; CHECK-NEXT:    mov w8, #32768 // =0x8000
379; CHECK-NEXT:    mov z1.h, w8
380; CHECK-NEXT:    mov z0.s, p0/m, z1.s
381; CHECK-NEXT:    ret
382%vec = shufflevector <vscale x 4 x half> insertelement (<vscale x 4 x half> undef, half -0.0, i32 0), <vscale x 4 x half> zeroinitializer, <vscale x 4 x i32> zeroinitializer
383%sel = select <vscale x 4 x i1> %p, <vscale x 4 x half> %vec, <vscale x 4 x half> %in
384ret <vscale x 4 x half> %sel
385}
386
387define <vscale x 2 x half> @sel_merge_nx2f16_negative_zero(<vscale x 2 x i1> %p, <vscale x 2 x half> %in) {
388; CHECK-LABEL: sel_merge_nx2f16_negative_zero:
389; CHECK:       // %bb.0:
390; CHECK-NEXT:    mov w8, #32768 // =0x8000
391; CHECK-NEXT:    mov z1.h, w8
392; CHECK-NEXT:    mov z0.d, p0/m, z1.d
393; CHECK-NEXT:    ret
394%vec = shufflevector <vscale x 2 x half> insertelement (<vscale x 2 x half> undef, half -0.0, i32 0), <vscale x 2 x half> zeroinitializer, <vscale x 2 x i32> zeroinitializer
395%sel = select <vscale x 2 x i1> %p, <vscale x 2 x half> %vec, <vscale x 2 x half> %in
396ret <vscale x 2 x half> %sel
397}
398
399define <vscale x 4 x float> @sel_merge_nx4f32_negative_zero(<vscale x 4 x i1> %p, <vscale x 4 x float> %in) {
400; CHECK-LABEL: sel_merge_nx4f32_negative_zero:
401; CHECK:       // %bb.0:
402; CHECK-NEXT:    mov w8, #-2147483648 // =0x80000000
403; CHECK-NEXT:    mov z1.s, w8
404; CHECK-NEXT:    mov z0.s, p0/m, z1.s
405; CHECK-NEXT:    ret
406%vec = shufflevector <vscale x 4 x float> insertelement (<vscale x 4 x float> undef, float -0.0, i32 0), <vscale x 4 x float> zeroinitializer, <vscale x 4 x i32> zeroinitializer
407%sel = select <vscale x 4 x i1> %p, <vscale x 4 x float> %vec, <vscale x 4 x float> %in
408ret <vscale x 4 x float> %sel
409}
410
411define <vscale x 2 x float> @sel_merge_nx2f32_negative_zero(<vscale x 2 x i1> %p, <vscale x 2 x float> %in) {
412; CHECK-LABEL: sel_merge_nx2f32_negative_zero:
413; CHECK:       // %bb.0:
414; CHECK-NEXT:    mov w8, #-2147483648 // =0x80000000
415; CHECK-NEXT:    mov z1.s, w8
416; CHECK-NEXT:    mov z0.d, p0/m, z1.d
417; CHECK-NEXT:    ret
418%vec = shufflevector <vscale x 2 x float> insertelement (<vscale x 2 x float> undef, float -0.0, i32 0), <vscale x 2 x float> zeroinitializer, <vscale x 2 x i32> zeroinitializer
419%sel = select <vscale x 2 x i1> %p, <vscale x 2 x float> %vec, <vscale x 2 x float> %in
420ret <vscale x 2 x float> %sel
421}
422
423define <vscale x 2 x double> @sel_merge_nx2f64_negative_zero(<vscale x 2 x i1> %p, <vscale x 2 x double> %in) {
424; CHECK-LABEL: sel_merge_nx2f64_negative_zero:
425; CHECK:       // %bb.0:
426; CHECK-NEXT:    mov x8, #-9223372036854775808 // =0x8000000000000000
427; CHECK-NEXT:    mov z1.d, x8
428; CHECK-NEXT:    mov z0.d, p0/m, z1.d
429; CHECK-NEXT:    ret
430%vec = shufflevector <vscale x 2 x double> insertelement (<vscale x 2 x double> undef, double -0.0, i32 0), <vscale x 2 x double> zeroinitializer, <vscale x 2 x i32> zeroinitializer
431%sel = select <vscale x 2 x i1> %p, <vscale x 2 x double> %vec, <vscale x 2 x double> %in
432ret <vscale x 2 x double> %sel
433}
434
435define <vscale x 8 x i16> @sel_merge_16_shifted(<vscale x 8 x i1> %p, <vscale x 8 x i16> %in) {
436; CHECK-LABEL: sel_merge_16_shifted:
437; CHECK:       // %bb.0:
438; CHECK-NEXT:    mov z0.h, p0/m, #512 // =0x200
439; CHECK-NEXT:    ret
440  %vec = shufflevector <vscale x 8 x i16> insertelement (<vscale x 8 x i16> undef, i16 512, i32 0), <vscale x 8 x i16> zeroinitializer, <vscale x 8 x i32> zeroinitializer
441  %sel = select <vscale x 8 x i1> %p, <vscale x 8 x i16> %vec, <vscale x 8 x i16> %in
442  ret <vscale x 8 x i16> %sel
443}
444
445define <vscale x 4 x i32> @sel_merge_32_shifted(<vscale x 4 x i1> %p, <vscale x 4 x i32> %in) {
446; CHECK-LABEL: sel_merge_32_shifted:
447; CHECK:       // %bb.0:
448; CHECK-NEXT:    mov z0.s, p0/m, #512 // =0x200
449; CHECK-NEXT:    ret
450  %vec = shufflevector <vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 512, i32 0), <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> zeroinitializer
451  %sel = select <vscale x 4 x i1> %p, <vscale x 4 x i32> %vec, <vscale x 4 x i32> %in
452  ret <vscale x 4 x i32> %sel
453}
454
455define <vscale x 2 x i64> @sel_merge_64_shifted(<vscale x 2 x i1> %p, <vscale x 2 x i64> %in) {
456; CHECK-LABEL: sel_merge_64_shifted:
457; CHECK:       // %bb.0:
458; CHECK-NEXT:    mov z0.d, p0/m, #512 // =0x200
459; CHECK-NEXT:    ret
460  %vec = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 512, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer
461  %sel = select <vscale x 2 x i1> %p, <vscale x 2 x i64> %vec, <vscale x 2 x i64> %in
462  ret <vscale x 2 x i64> %sel
463}
464
465; TODO: We could actually use something like "cpy z0.b, p0/m, #-128". But it's
466; a little tricky to prove correctness: we're using the predicate with the
467; wrong width, so we'd have to prove the bits which would normally be unused
468; are actually zero.
469define <vscale x 8 x i16> @sel_merge_16_illegal_wrong_extension(<vscale x 8 x i1> %p, <vscale x 8 x i16> %in) {
470; CHECK-LABEL: sel_merge_16_illegal_wrong_extension:
471; CHECK:       // %bb.0:
472; CHECK-NEXT:    mov z1.h, #128 // =0x80
473; CHECK-NEXT:    mov z0.h, p0/m, z1.h
474; CHECK-NEXT:    ret
475  %vec = shufflevector <vscale x 8 x i16> insertelement (<vscale x 8 x i16> undef, i16 128, i32 0), <vscale x 8 x i16> zeroinitializer, <vscale x 8 x i32> zeroinitializer
476  %sel = select <vscale x 8 x i1> %p, <vscale x 8 x i16> %vec, <vscale x 8 x i16> %in
477  ret <vscale x 8 x i16> %sel
478}
479
480define <vscale x 4 x i32> @sel_merge_32_illegal_wrong_extension(<vscale x 4 x i1> %p, <vscale x 4 x i32> %in) {
481; CHECK-LABEL: sel_merge_32_illegal_wrong_extension:
482; CHECK:       // %bb.0:
483; CHECK-NEXT:    mov z1.s, #128 // =0x80
484; CHECK-NEXT:    mov z0.s, p0/m, z1.s
485; CHECK-NEXT:    ret
486  %vec = shufflevector <vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 128, i32 0), <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> zeroinitializer
487  %sel = select <vscale x 4 x i1> %p, <vscale x 4 x i32> %vec, <vscale x 4 x i32> %in
488  ret <vscale x 4 x i32> %sel
489}
490
491define <vscale x 2 x i64> @sel_merge_64_illegal_wrong_extension(<vscale x 2 x i1> %p, <vscale x 2 x i64> %in) {
492; CHECK-LABEL: sel_merge_64_illegal_wrong_extension:
493; CHECK:       // %bb.0:
494; CHECK-NEXT:    mov z1.d, #128 // =0x80
495; CHECK-NEXT:    mov z0.d, p0/m, z1.d
496; CHECK-NEXT:    ret
497  %vec = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 128, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer
498  %sel = select <vscale x 2 x i1> %p, <vscale x 2 x i64> %vec, <vscale x 2 x i64> %in
499  ret <vscale x 2 x i64> %sel
500}
501
502define <vscale x 8 x i16> @sel_merge_16_illegal_shifted(<vscale x 8 x i1> %p, <vscale x 8 x i16> %in) {
503; CHECK-LABEL: sel_merge_16_illegal_shifted:
504; CHECK:       // %bb.0:
505; CHECK-NEXT:    mov w8, #513 // =0x201
506; CHECK-NEXT:    mov z1.h, w8
507; CHECK-NEXT:    mov z0.h, p0/m, z1.h
508; CHECK-NEXT:    ret
509  %vec = shufflevector <vscale x 8 x i16> insertelement (<vscale x 8 x i16> undef, i16 513, i32 0), <vscale x 8 x i16> zeroinitializer, <vscale x 8 x i32> zeroinitializer
510  %sel = select <vscale x 8 x i1> %p, <vscale x 8 x i16> %vec, <vscale x 8 x i16> %in
511  ret <vscale x 8 x i16> %sel
512}
513
514define <vscale x 4 x i32> @sel_merge_32_illegal_shifted(<vscale x 4 x i1> %p, <vscale x 4 x i32> %in) {
515; CHECK-LABEL: sel_merge_32_illegal_shifted:
516; CHECK:       // %bb.0:
517; CHECK-NEXT:    mov w8, #513 // =0x201
518; CHECK-NEXT:    mov z1.s, w8
519; CHECK-NEXT:    mov z0.s, p0/m, z1.s
520; CHECK-NEXT:    ret
521  %vec = shufflevector <vscale x 4 x i32> insertelement (<vscale x 4 x i32> undef, i32 513, i32 0), <vscale x 4 x i32> zeroinitializer, <vscale x 4 x i32> zeroinitializer
522  %sel = select <vscale x 4 x i1> %p, <vscale x 4 x i32> %vec, <vscale x 4 x i32> %in
523  ret <vscale x 4 x i32> %sel
524}
525
526define <vscale x 2 x i64> @sel_merge_64_illegal_shifted(<vscale x 2 x i1> %p, <vscale x 2 x i64> %in) {
527; CHECK-LABEL: sel_merge_64_illegal_shifted:
528; CHECK:       // %bb.0:
529; CHECK-NEXT:    mov w8, #513 // =0x201
530; CHECK-NEXT:    mov z1.d, x8
531; CHECK-NEXT:    mov z0.d, p0/m, z1.d
532; CHECK-NEXT:    ret
533  %vec = shufflevector <vscale x 2 x i64> insertelement (<vscale x 2 x i64> undef, i64 513, i32 0), <vscale x 2 x i64> zeroinitializer, <vscale x 2 x i32> zeroinitializer
534  %sel = select <vscale x 2 x i1> %p, <vscale x 2 x i64> %vec, <vscale x 2 x i64> %in
535  ret <vscale x 2 x i64> %sel
536}
537