1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mattr=+sve -force-streaming-compatible < %s | FileCheck %s 3; RUN: llc -mattr=+sme -force-streaming < %s | FileCheck %s 4; RUN: llc -force-streaming-compatible < %s | FileCheck %s --check-prefix=NONEON-NOSVE 5 6 7target triple = "aarch64-unknown-linux-gnu" 8 9define void @zip1_v32i8(ptr %a, ptr %b) { 10; CHECK-LABEL: zip1_v32i8: 11; CHECK: // %bb.0: 12; CHECK-NEXT: ldr q0, [x0, #16] 13; CHECK-NEXT: ldr q0, [x0] 14; CHECK-NEXT: ldr q1, [x1, #16] 15; CHECK-NEXT: ldr q1, [x1] 16; CHECK-NEXT: mov z2.b, z0.b[15] 17; CHECK-NEXT: mov z4.b, z0.b[14] 18; CHECK-NEXT: mov z6.b, z0.b[13] 19; CHECK-NEXT: mov z3.b, z1.b[15] 20; CHECK-NEXT: mov z5.b, z1.b[14] 21; CHECK-NEXT: mov z7.b, z1.b[13] 22; CHECK-NEXT: mov z16.b, z0.b[12] 23; CHECK-NEXT: mov z17.b, z1.b[12] 24; CHECK-NEXT: mov z18.b, z0.b[11] 25; CHECK-NEXT: mov z19.b, z1.b[11] 26; CHECK-NEXT: mov z20.b, z0.b[10] 27; CHECK-NEXT: mov z21.b, z1.b[10] 28; CHECK-NEXT: mov z22.b, z0.b[9] 29; CHECK-NEXT: mov z23.b, z1.b[9] 30; CHECK-NEXT: mov z24.b, z0.b[8] 31; CHECK-NEXT: mov z25.b, z1.b[8] 32; CHECK-NEXT: zip1 z2.b, z2.b, z3.b 33; CHECK-NEXT: zip1 z3.b, z4.b, z5.b 34; CHECK-NEXT: zip1 z4.b, z6.b, z7.b 35; CHECK-NEXT: zip1 z5.b, z16.b, z17.b 36; CHECK-NEXT: zip1 z6.b, z18.b, z19.b 37; CHECK-NEXT: zip1 z7.b, z20.b, z21.b 38; CHECK-NEXT: zip1 z16.b, z22.b, z23.b 39; CHECK-NEXT: zip1 z0.b, z0.b, z1.b 40; CHECK-NEXT: zip1 z17.b, z24.b, z25.b 41; CHECK-NEXT: zip1 z2.h, z3.h, z2.h 42; CHECK-NEXT: zip1 z3.h, z5.h, z4.h 43; CHECK-NEXT: zip1 z4.h, z7.h, z6.h 44; CHECK-NEXT: str q0, [x0] 45; CHECK-NEXT: zip1 z5.h, z17.h, z16.h 46; CHECK-NEXT: zip1 z2.s, z3.s, z2.s 47; CHECK-NEXT: zip1 z3.s, z5.s, z4.s 48; CHECK-NEXT: zip1 z1.d, z3.d, z2.d 49; CHECK-NEXT: str q1, [x0, #16] 50; CHECK-NEXT: ret 51; 52; NONEON-NOSVE-LABEL: zip1_v32i8: 53; NONEON-NOSVE: // %bb.0: 54; NONEON-NOSVE-NEXT: sub sp, sp, #64 55; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 64 56; NONEON-NOSVE-NEXT: ldr q0, [x0, #16] 57; NONEON-NOSVE-NEXT: ldr q0, [x0] 58; NONEON-NOSVE-NEXT: ldr q1, [x1, #16] 59; NONEON-NOSVE-NEXT: ldr q1, [x1] 60; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #16] 61; NONEON-NOSVE-NEXT: ldrb w8, [sp, #23] 62; NONEON-NOSVE-NEXT: strb w8, [sp, #14] 63; NONEON-NOSVE-NEXT: ldrb w8, [sp, #22] 64; NONEON-NOSVE-NEXT: strb w8, [sp, #12] 65; NONEON-NOSVE-NEXT: ldrb w8, [sp, #21] 66; NONEON-NOSVE-NEXT: strb w8, [sp, #10] 67; NONEON-NOSVE-NEXT: ldrb w8, [sp, #20] 68; NONEON-NOSVE-NEXT: strb w8, [sp, #8] 69; NONEON-NOSVE-NEXT: ldrb w8, [sp, #19] 70; NONEON-NOSVE-NEXT: strb w8, [sp, #6] 71; NONEON-NOSVE-NEXT: ldrb w8, [sp, #18] 72; NONEON-NOSVE-NEXT: strb w8, [sp, #4] 73; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17] 74; NONEON-NOSVE-NEXT: strb w8, [sp, #2] 75; NONEON-NOSVE-NEXT: ldrb w8, [sp, #16] 76; NONEON-NOSVE-NEXT: strb w8, [sp] 77; NONEON-NOSVE-NEXT: ldrb w8, [sp, #39] 78; NONEON-NOSVE-NEXT: strb w8, [sp, #15] 79; NONEON-NOSVE-NEXT: ldrb w8, [sp, #38] 80; NONEON-NOSVE-NEXT: strb w8, [sp, #13] 81; NONEON-NOSVE-NEXT: ldrb w8, [sp, #37] 82; NONEON-NOSVE-NEXT: strb w8, [sp, #11] 83; NONEON-NOSVE-NEXT: ldrb w8, [sp, #36] 84; NONEON-NOSVE-NEXT: strb w8, [sp, #9] 85; NONEON-NOSVE-NEXT: ldrb w8, [sp, #35] 86; NONEON-NOSVE-NEXT: strb w8, [sp, #7] 87; NONEON-NOSVE-NEXT: ldrb w8, [sp, #34] 88; NONEON-NOSVE-NEXT: strb w8, [sp, #5] 89; NONEON-NOSVE-NEXT: ldrb w8, [sp, #33] 90; NONEON-NOSVE-NEXT: strb w8, [sp, #3] 91; NONEON-NOSVE-NEXT: ldrb w8, [sp, #32] 92; NONEON-NOSVE-NEXT: strb w8, [sp, #1] 93; NONEON-NOSVE-NEXT: ldrb w8, [sp, #31] 94; NONEON-NOSVE-NEXT: ldr q1, [sp] 95; NONEON-NOSVE-NEXT: strb w8, [sp, #62] 96; NONEON-NOSVE-NEXT: ldrb w8, [sp, #30] 97; NONEON-NOSVE-NEXT: strb w8, [sp, #60] 98; NONEON-NOSVE-NEXT: ldrb w8, [sp, #29] 99; NONEON-NOSVE-NEXT: strb w8, [sp, #58] 100; NONEON-NOSVE-NEXT: ldrb w8, [sp, #28] 101; NONEON-NOSVE-NEXT: strb w8, [sp, #56] 102; NONEON-NOSVE-NEXT: ldrb w8, [sp, #27] 103; NONEON-NOSVE-NEXT: strb w8, [sp, #54] 104; NONEON-NOSVE-NEXT: ldrb w8, [sp, #26] 105; NONEON-NOSVE-NEXT: strb w8, [sp, #52] 106; NONEON-NOSVE-NEXT: ldrb w8, [sp, #25] 107; NONEON-NOSVE-NEXT: strb w8, [sp, #50] 108; NONEON-NOSVE-NEXT: ldrb w8, [sp, #24] 109; NONEON-NOSVE-NEXT: strb w8, [sp, #48] 110; NONEON-NOSVE-NEXT: ldrb w8, [sp, #47] 111; NONEON-NOSVE-NEXT: strb w8, [sp, #63] 112; NONEON-NOSVE-NEXT: ldrb w8, [sp, #46] 113; NONEON-NOSVE-NEXT: strb w8, [sp, #61] 114; NONEON-NOSVE-NEXT: ldrb w8, [sp, #45] 115; NONEON-NOSVE-NEXT: strb w8, [sp, #59] 116; NONEON-NOSVE-NEXT: ldrb w8, [sp, #44] 117; NONEON-NOSVE-NEXT: strb w8, [sp, #57] 118; NONEON-NOSVE-NEXT: ldrb w8, [sp, #43] 119; NONEON-NOSVE-NEXT: strb w8, [sp, #55] 120; NONEON-NOSVE-NEXT: ldrb w8, [sp, #42] 121; NONEON-NOSVE-NEXT: strb w8, [sp, #53] 122; NONEON-NOSVE-NEXT: ldrb w8, [sp, #41] 123; NONEON-NOSVE-NEXT: strb w8, [sp, #51] 124; NONEON-NOSVE-NEXT: ldrb w8, [sp, #40] 125; NONEON-NOSVE-NEXT: strb w8, [sp, #49] 126; NONEON-NOSVE-NEXT: ldr q0, [sp, #48] 127; NONEON-NOSVE-NEXT: str q0, [x0, #16] 128; NONEON-NOSVE-NEXT: str q1, [x0] 129; NONEON-NOSVE-NEXT: add sp, sp, #64 130; NONEON-NOSVE-NEXT: ret 131 %tmp1 = load volatile <32 x i8>, ptr %a 132 %tmp2 = load volatile <32 x i8>, ptr %b 133 %tmp3 = shufflevector <32 x i8> %tmp1, <32 x i8> %tmp2, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47> 134 store volatile <32 x i8> %tmp3, ptr %a 135 ret void 136} 137 138define void @zip_v32i16(ptr %a, ptr %b) { 139; CHECK-LABEL: zip_v32i16: 140; CHECK: // %bb.0: 141; CHECK-NEXT: stp d15, d14, [sp, #-64]! // 16-byte Folded Spill 142; CHECK-NEXT: stp d13, d12, [sp, #16] // 16-byte Folded Spill 143; CHECK-NEXT: stp d11, d10, [sp, #32] // 16-byte Folded Spill 144; CHECK-NEXT: stp d9, d8, [sp, #48] // 16-byte Folded Spill 145; CHECK-NEXT: .cfi_def_cfa_offset 64 146; CHECK-NEXT: .cfi_offset b8, -8 147; CHECK-NEXT: .cfi_offset b9, -16 148; CHECK-NEXT: .cfi_offset b10, -24 149; CHECK-NEXT: .cfi_offset b11, -32 150; CHECK-NEXT: .cfi_offset b12, -40 151; CHECK-NEXT: .cfi_offset b13, -48 152; CHECK-NEXT: .cfi_offset b14, -56 153; CHECK-NEXT: .cfi_offset b15, -64 154; CHECK-NEXT: ldp q0, q1, [x0] 155; CHECK-NEXT: ldp q2, q3, [x1] 156; CHECK-NEXT: mov z5.h, z1.h[7] 157; CHECK-NEXT: mov z7.h, z1.h[6] 158; CHECK-NEXT: mov z17.h, z1.h[5] 159; CHECK-NEXT: mov z4.h, z3.h[7] 160; CHECK-NEXT: mov z6.h, z3.h[6] 161; CHECK-NEXT: mov z16.h, z3.h[5] 162; CHECK-NEXT: mov z20.h, z2.h[7] 163; CHECK-NEXT: mov z21.h, z0.h[7] 164; CHECK-NEXT: mov z18.h, z3.h[4] 165; CHECK-NEXT: mov z19.h, z1.h[4] 166; CHECK-NEXT: mov z22.h, z2.h[6] 167; CHECK-NEXT: mov z23.h, z0.h[6] 168; CHECK-NEXT: zip1 z24.h, z5.h, z4.h 169; CHECK-NEXT: zip1 z25.h, z7.h, z6.h 170; CHECK-NEXT: zip1 z17.h, z17.h, z16.h 171; CHECK-NEXT: ldp q4, q6, [x0, #32] 172; CHECK-NEXT: zip1 z16.h, z21.h, z20.h 173; CHECK-NEXT: ldp q5, q7, [x1, #32] 174; CHECK-NEXT: zip1 z18.h, z19.h, z18.h 175; CHECK-NEXT: zip1 z19.s, z25.s, z24.s 176; CHECK-NEXT: zip1 z22.h, z23.h, z22.h 177; CHECK-NEXT: mov z23.h, z2.h[5] 178; CHECK-NEXT: mov z21.h, z6.h[7] 179; CHECK-NEXT: mov z24.h, z0.h[5] 180; CHECK-NEXT: mov z25.h, z2.h[4] 181; CHECK-NEXT: mov z20.h, z7.h[7] 182; CHECK-NEXT: mov z26.h, z0.h[4] 183; CHECK-NEXT: mov z27.h, z6.h[6] 184; CHECK-NEXT: mov z28.h, z7.h[5] 185; CHECK-NEXT: mov z29.h, z6.h[5] 186; CHECK-NEXT: mov z30.h, z7.h[4] 187; CHECK-NEXT: mov z31.h, z6.h[4] 188; CHECK-NEXT: mov z8.h, z5.h[7] 189; CHECK-NEXT: mov z9.h, z4.h[7] 190; CHECK-NEXT: zip1 z20.h, z21.h, z20.h 191; CHECK-NEXT: mov z21.h, z7.h[6] 192; CHECK-NEXT: mov z10.h, z5.h[6] 193; CHECK-NEXT: mov z11.h, z4.h[6] 194; CHECK-NEXT: mov z12.h, z5.h[5] 195; CHECK-NEXT: mov z13.h, z4.h[5] 196; CHECK-NEXT: mov z14.h, z5.h[4] 197; CHECK-NEXT: mov z15.h, z4.h[4] 198; CHECK-NEXT: zip1 z23.h, z24.h, z23.h 199; CHECK-NEXT: zip1 z21.h, z27.h, z21.h 200; CHECK-NEXT: zip1 z27.h, z29.h, z28.h 201; CHECK-NEXT: zip1 z28.h, z31.h, z30.h 202; CHECK-NEXT: zip1 z24.h, z26.h, z25.h 203; CHECK-NEXT: zip1 z25.h, z9.h, z8.h 204; CHECK-NEXT: zip1 z26.h, z11.h, z10.h 205; CHECK-NEXT: ldp d9, d8, [sp, #48] // 16-byte Folded Reload 206; CHECK-NEXT: zip1 z29.h, z13.h, z12.h 207; CHECK-NEXT: ldp d11, d10, [sp, #32] // 16-byte Folded Reload 208; CHECK-NEXT: zip1 z30.h, z15.h, z14.h 209; CHECK-NEXT: ldp d13, d12, [sp, #16] // 16-byte Folded Reload 210; CHECK-NEXT: zip1 z17.s, z18.s, z17.s 211; CHECK-NEXT: zip1 z18.s, z21.s, z20.s 212; CHECK-NEXT: zip1 z20.s, z28.s, z27.s 213; CHECK-NEXT: zip1 z16.s, z22.s, z16.s 214; CHECK-NEXT: zip1 z21.s, z24.s, z23.s 215; CHECK-NEXT: zip1 z1.h, z1.h, z3.h 216; CHECK-NEXT: zip1 z3.s, z26.s, z25.s 217; CHECK-NEXT: zip1 z22.s, z30.s, z29.s 218; CHECK-NEXT: zip1 z6.h, z6.h, z7.h 219; CHECK-NEXT: zip1 z7.d, z17.d, z19.d 220; CHECK-NEXT: zip1 z17.d, z20.d, z18.d 221; CHECK-NEXT: zip1 z0.h, z0.h, z2.h 222; CHECK-NEXT: zip1 z2.h, z4.h, z5.h 223; CHECK-NEXT: zip1 z4.d, z21.d, z16.d 224; CHECK-NEXT: zip1 z3.d, z22.d, z3.d 225; CHECK-NEXT: add z1.h, z1.h, z6.h 226; CHECK-NEXT: add z5.h, z7.h, z17.h 227; CHECK-NEXT: add z0.h, z0.h, z2.h 228; CHECK-NEXT: add z2.h, z4.h, z3.h 229; CHECK-NEXT: stp q1, q5, [x0, #32] 230; CHECK-NEXT: stp q0, q2, [x0] 231; CHECK-NEXT: ldp d15, d14, [sp], #64 // 16-byte Folded Reload 232; CHECK-NEXT: ret 233; 234; NONEON-NOSVE-LABEL: zip_v32i16: 235; NONEON-NOSVE: // %bb.0: 236; NONEON-NOSVE-NEXT: sub sp, sp, #192 237; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 192 238; NONEON-NOSVE-NEXT: ldp q1, q0, [x1, #32] 239; NONEON-NOSVE-NEXT: ldp q3, q2, [x0] 240; NONEON-NOSVE-NEXT: ldp q5, q4, [x1] 241; NONEON-NOSVE-NEXT: ldp q7, q6, [x0, #32] 242; NONEON-NOSVE-NEXT: stp q3, q5, [sp] 243; NONEON-NOSVE-NEXT: ldrh w9, [sp, #30] 244; NONEON-NOSVE-NEXT: stp q6, q2, [sp, #32] 245; NONEON-NOSVE-NEXT: stp q7, q0, [sp, #64] 246; NONEON-NOSVE-NEXT: stp q4, q1, [sp, #96] 247; NONEON-NOSVE-NEXT: ldrh w8, [sp, #126] 248; NONEON-NOSVE-NEXT: add w8, w9, w8 249; NONEON-NOSVE-NEXT: ldrh w9, [sp, #14] 250; NONEON-NOSVE-NEXT: strh w8, [sp, #190] 251; NONEON-NOSVE-NEXT: ldrh w8, [sp, #78] 252; NONEON-NOSVE-NEXT: add w8, w9, w8 253; NONEON-NOSVE-NEXT: ldrh w9, [sp, #28] 254; NONEON-NOSVE-NEXT: strh w8, [sp, #188] 255; NONEON-NOSVE-NEXT: ldrh w8, [sp, #124] 256; NONEON-NOSVE-NEXT: add w8, w9, w8 257; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12] 258; NONEON-NOSVE-NEXT: strh w8, [sp, #186] 259; NONEON-NOSVE-NEXT: ldrh w8, [sp, #76] 260; NONEON-NOSVE-NEXT: add w8, w9, w8 261; NONEON-NOSVE-NEXT: ldrh w9, [sp, #26] 262; NONEON-NOSVE-NEXT: strh w8, [sp, #184] 263; NONEON-NOSVE-NEXT: ldrh w8, [sp, #122] 264; NONEON-NOSVE-NEXT: add w8, w9, w8 265; NONEON-NOSVE-NEXT: ldrh w9, [sp, #10] 266; NONEON-NOSVE-NEXT: strh w8, [sp, #182] 267; NONEON-NOSVE-NEXT: ldrh w8, [sp, #74] 268; NONEON-NOSVE-NEXT: add w8, w9, w8 269; NONEON-NOSVE-NEXT: ldrh w9, [sp, #24] 270; NONEON-NOSVE-NEXT: strh w8, [sp, #180] 271; NONEON-NOSVE-NEXT: ldrh w8, [sp, #120] 272; NONEON-NOSVE-NEXT: add w8, w9, w8 273; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8] 274; NONEON-NOSVE-NEXT: strh w8, [sp, #178] 275; NONEON-NOSVE-NEXT: ldrh w8, [sp, #72] 276; NONEON-NOSVE-NEXT: add w8, w9, w8 277; NONEON-NOSVE-NEXT: ldrh w9, [sp, #22] 278; NONEON-NOSVE-NEXT: strh w8, [sp, #176] 279; NONEON-NOSVE-NEXT: ldrh w8, [sp, #118] 280; NONEON-NOSVE-NEXT: add w8, w9, w8 281; NONEON-NOSVE-NEXT: ldrh w9, [sp, #6] 282; NONEON-NOSVE-NEXT: strh w8, [sp, #174] 283; NONEON-NOSVE-NEXT: ldrh w8, [sp, #70] 284; NONEON-NOSVE-NEXT: add w8, w9, w8 285; NONEON-NOSVE-NEXT: ldrh w9, [sp, #20] 286; NONEON-NOSVE-NEXT: strh w8, [sp, #172] 287; NONEON-NOSVE-NEXT: ldrh w8, [sp, #116] 288; NONEON-NOSVE-NEXT: add w8, w9, w8 289; NONEON-NOSVE-NEXT: ldrh w9, [sp, #4] 290; NONEON-NOSVE-NEXT: strh w8, [sp, #170] 291; NONEON-NOSVE-NEXT: ldrh w8, [sp, #68] 292; NONEON-NOSVE-NEXT: add w8, w9, w8 293; NONEON-NOSVE-NEXT: ldrh w9, [sp, #18] 294; NONEON-NOSVE-NEXT: strh w8, [sp, #168] 295; NONEON-NOSVE-NEXT: ldrh w8, [sp, #114] 296; NONEON-NOSVE-NEXT: add w8, w9, w8 297; NONEON-NOSVE-NEXT: ldrh w9, [sp, #2] 298; NONEON-NOSVE-NEXT: strh w8, [sp, #166] 299; NONEON-NOSVE-NEXT: ldrh w8, [sp, #66] 300; NONEON-NOSVE-NEXT: add w8, w9, w8 301; NONEON-NOSVE-NEXT: ldrh w9, [sp, #16] 302; NONEON-NOSVE-NEXT: strh w8, [sp, #164] 303; NONEON-NOSVE-NEXT: ldrh w8, [sp, #112] 304; NONEON-NOSVE-NEXT: add w8, w9, w8 305; NONEON-NOSVE-NEXT: ldrh w9, [sp] 306; NONEON-NOSVE-NEXT: strh w8, [sp, #162] 307; NONEON-NOSVE-NEXT: ldrh w8, [sp, #64] 308; NONEON-NOSVE-NEXT: add w8, w9, w8 309; NONEON-NOSVE-NEXT: ldrh w9, [sp, #110] 310; NONEON-NOSVE-NEXT: strh w8, [sp, #160] 311; NONEON-NOSVE-NEXT: ldrh w8, [sp, #94] 312; NONEON-NOSVE-NEXT: ldp q3, q2, [sp, #160] 313; NONEON-NOSVE-NEXT: add w8, w9, w8 314; NONEON-NOSVE-NEXT: ldrh w9, [sp, #62] 315; NONEON-NOSVE-NEXT: strh w8, [sp, #158] 316; NONEON-NOSVE-NEXT: ldrh w8, [sp, #46] 317; NONEON-NOSVE-NEXT: add w8, w9, w8 318; NONEON-NOSVE-NEXT: ldrh w9, [sp, #108] 319; NONEON-NOSVE-NEXT: strh w8, [sp, #156] 320; NONEON-NOSVE-NEXT: ldrh w8, [sp, #92] 321; NONEON-NOSVE-NEXT: add w8, w9, w8 322; NONEON-NOSVE-NEXT: ldrh w9, [sp, #60] 323; NONEON-NOSVE-NEXT: strh w8, [sp, #154] 324; NONEON-NOSVE-NEXT: ldrh w8, [sp, #44] 325; NONEON-NOSVE-NEXT: add w8, w9, w8 326; NONEON-NOSVE-NEXT: ldrh w9, [sp, #106] 327; NONEON-NOSVE-NEXT: strh w8, [sp, #152] 328; NONEON-NOSVE-NEXT: ldrh w8, [sp, #90] 329; NONEON-NOSVE-NEXT: add w8, w9, w8 330; NONEON-NOSVE-NEXT: ldrh w9, [sp, #58] 331; NONEON-NOSVE-NEXT: strh w8, [sp, #150] 332; NONEON-NOSVE-NEXT: ldrh w8, [sp, #42] 333; NONEON-NOSVE-NEXT: add w8, w9, w8 334; NONEON-NOSVE-NEXT: ldrh w9, [sp, #104] 335; NONEON-NOSVE-NEXT: strh w8, [sp, #148] 336; NONEON-NOSVE-NEXT: ldrh w8, [sp, #88] 337; NONEON-NOSVE-NEXT: add w8, w9, w8 338; NONEON-NOSVE-NEXT: ldrh w9, [sp, #56] 339; NONEON-NOSVE-NEXT: strh w8, [sp, #146] 340; NONEON-NOSVE-NEXT: ldrh w8, [sp, #40] 341; NONEON-NOSVE-NEXT: add w8, w9, w8 342; NONEON-NOSVE-NEXT: ldrh w9, [sp, #102] 343; NONEON-NOSVE-NEXT: strh w8, [sp, #144] 344; NONEON-NOSVE-NEXT: ldrh w8, [sp, #86] 345; NONEON-NOSVE-NEXT: add w8, w9, w8 346; NONEON-NOSVE-NEXT: ldrh w9, [sp, #54] 347; NONEON-NOSVE-NEXT: strh w8, [sp, #142] 348; NONEON-NOSVE-NEXT: ldrh w8, [sp, #38] 349; NONEON-NOSVE-NEXT: add w8, w9, w8 350; NONEON-NOSVE-NEXT: ldrh w9, [sp, #100] 351; NONEON-NOSVE-NEXT: strh w8, [sp, #140] 352; NONEON-NOSVE-NEXT: ldrh w8, [sp, #84] 353; NONEON-NOSVE-NEXT: add w8, w9, w8 354; NONEON-NOSVE-NEXT: ldrh w9, [sp, #52] 355; NONEON-NOSVE-NEXT: strh w8, [sp, #138] 356; NONEON-NOSVE-NEXT: ldrh w8, [sp, #36] 357; NONEON-NOSVE-NEXT: add w8, w9, w8 358; NONEON-NOSVE-NEXT: ldrh w9, [sp, #98] 359; NONEON-NOSVE-NEXT: strh w8, [sp, #136] 360; NONEON-NOSVE-NEXT: ldrh w8, [sp, #82] 361; NONEON-NOSVE-NEXT: add w8, w9, w8 362; NONEON-NOSVE-NEXT: ldrh w9, [sp, #50] 363; NONEON-NOSVE-NEXT: strh w8, [sp, #134] 364; NONEON-NOSVE-NEXT: ldrh w8, [sp, #34] 365; NONEON-NOSVE-NEXT: add w8, w9, w8 366; NONEON-NOSVE-NEXT: ldrh w9, [sp, #96] 367; NONEON-NOSVE-NEXT: strh w8, [sp, #132] 368; NONEON-NOSVE-NEXT: ldrh w8, [sp, #80] 369; NONEON-NOSVE-NEXT: add w8, w9, w8 370; NONEON-NOSVE-NEXT: ldrh w9, [sp, #48] 371; NONEON-NOSVE-NEXT: strh w8, [sp, #130] 372; NONEON-NOSVE-NEXT: ldrh w8, [sp, #32] 373; NONEON-NOSVE-NEXT: add w8, w9, w8 374; NONEON-NOSVE-NEXT: strh w8, [sp, #128] 375; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #128] 376; NONEON-NOSVE-NEXT: stp q3, q2, [x0] 377; NONEON-NOSVE-NEXT: stp q0, q1, [x0, #32] 378; NONEON-NOSVE-NEXT: add sp, sp, #192 379; NONEON-NOSVE-NEXT: ret 380 %tmp1 = load <32 x i16>, ptr %a 381 %tmp2 = load <32 x i16>, ptr %b 382 %tmp3 = shufflevector <32 x i16> %tmp1, <32 x i16> %tmp2, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 8, i32 40, i32 9, i32 41, i32 10, i32 42, i32 11, i32 43, i32 12, i32 44, i32 13, i32 45, i32 14, i32 46, i32 15, i32 47> 383 %tmp4 = shufflevector <32 x i16> %tmp1, <32 x i16> %tmp2, <32 x i32> <i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63> 384 %tmp5 = add <32 x i16> %tmp3, %tmp4 385 store <32 x i16> %tmp5, ptr %a 386 ret void 387} 388 389define void @zip1_v16i16(ptr %a, ptr %b) { 390; CHECK-LABEL: zip1_v16i16: 391; CHECK: // %bb.0: 392; CHECK-NEXT: ldr q0, [x0, #16] 393; CHECK-NEXT: ldr q0, [x0] 394; CHECK-NEXT: ldr q1, [x1, #16] 395; CHECK-NEXT: ldr q1, [x1] 396; CHECK-NEXT: mov z2.h, z0.h[7] 397; CHECK-NEXT: mov z4.h, z0.h[6] 398; CHECK-NEXT: mov z6.h, z0.h[5] 399; CHECK-NEXT: mov z3.h, z1.h[7] 400; CHECK-NEXT: mov z5.h, z1.h[6] 401; CHECK-NEXT: mov z7.h, z1.h[5] 402; CHECK-NEXT: mov z16.h, z0.h[4] 403; CHECK-NEXT: mov z17.h, z1.h[4] 404; CHECK-NEXT: zip1 z0.h, z0.h, z1.h 405; CHECK-NEXT: zip1 z2.h, z2.h, z3.h 406; CHECK-NEXT: zip1 z3.h, z4.h, z5.h 407; CHECK-NEXT: zip1 z4.h, z6.h, z7.h 408; CHECK-NEXT: zip1 z5.h, z16.h, z17.h 409; CHECK-NEXT: str q0, [x0] 410; CHECK-NEXT: zip1 z2.s, z3.s, z2.s 411; CHECK-NEXT: zip1 z3.s, z5.s, z4.s 412; CHECK-NEXT: zip1 z1.d, z3.d, z2.d 413; CHECK-NEXT: str q1, [x0, #16] 414; CHECK-NEXT: ret 415; 416; NONEON-NOSVE-LABEL: zip1_v16i16: 417; NONEON-NOSVE: // %bb.0: 418; NONEON-NOSVE-NEXT: sub sp, sp, #64 419; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 64 420; NONEON-NOSVE-NEXT: ldr q0, [x0, #16] 421; NONEON-NOSVE-NEXT: ldr q0, [x0] 422; NONEON-NOSVE-NEXT: ldr q1, [x1, #16] 423; NONEON-NOSVE-NEXT: ldr q1, [x1] 424; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #16] 425; NONEON-NOSVE-NEXT: ldrh w8, [sp, #22] 426; NONEON-NOSVE-NEXT: strh w8, [sp, #12] 427; NONEON-NOSVE-NEXT: ldrh w8, [sp, #20] 428; NONEON-NOSVE-NEXT: strh w8, [sp, #8] 429; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18] 430; NONEON-NOSVE-NEXT: strh w8, [sp, #4] 431; NONEON-NOSVE-NEXT: ldrh w8, [sp, #16] 432; NONEON-NOSVE-NEXT: strh w8, [sp] 433; NONEON-NOSVE-NEXT: ldrh w8, [sp, #38] 434; NONEON-NOSVE-NEXT: strh w8, [sp, #14] 435; NONEON-NOSVE-NEXT: ldrh w8, [sp, #36] 436; NONEON-NOSVE-NEXT: strh w8, [sp, #10] 437; NONEON-NOSVE-NEXT: ldrh w8, [sp, #34] 438; NONEON-NOSVE-NEXT: strh w8, [sp, #6] 439; NONEON-NOSVE-NEXT: ldrh w8, [sp, #32] 440; NONEON-NOSVE-NEXT: strh w8, [sp, #2] 441; NONEON-NOSVE-NEXT: ldrh w8, [sp, #30] 442; NONEON-NOSVE-NEXT: ldr q1, [sp] 443; NONEON-NOSVE-NEXT: strh w8, [sp, #60] 444; NONEON-NOSVE-NEXT: ldrh w8, [sp, #28] 445; NONEON-NOSVE-NEXT: strh w8, [sp, #56] 446; NONEON-NOSVE-NEXT: ldrh w8, [sp, #26] 447; NONEON-NOSVE-NEXT: strh w8, [sp, #52] 448; NONEON-NOSVE-NEXT: ldrh w8, [sp, #24] 449; NONEON-NOSVE-NEXT: strh w8, [sp, #48] 450; NONEON-NOSVE-NEXT: ldrh w8, [sp, #46] 451; NONEON-NOSVE-NEXT: strh w8, [sp, #62] 452; NONEON-NOSVE-NEXT: ldrh w8, [sp, #44] 453; NONEON-NOSVE-NEXT: strh w8, [sp, #58] 454; NONEON-NOSVE-NEXT: ldrh w8, [sp, #42] 455; NONEON-NOSVE-NEXT: strh w8, [sp, #54] 456; NONEON-NOSVE-NEXT: ldrh w8, [sp, #40] 457; NONEON-NOSVE-NEXT: strh w8, [sp, #50] 458; NONEON-NOSVE-NEXT: ldr q0, [sp, #48] 459; NONEON-NOSVE-NEXT: str q0, [x0, #16] 460; NONEON-NOSVE-NEXT: str q1, [x0] 461; NONEON-NOSVE-NEXT: add sp, sp, #64 462; NONEON-NOSVE-NEXT: ret 463 %tmp1 = load volatile <16 x i16>, ptr %a 464 %tmp2 = load volatile <16 x i16>, ptr %b 465 %tmp3 = shufflevector <16 x i16> %tmp1, <16 x i16> %tmp2, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 466 store volatile <16 x i16> %tmp3, ptr %a 467 ret void 468} 469 470define void @zip1_v8i32(ptr %a, ptr %b) { 471; CHECK-LABEL: zip1_v8i32: 472; CHECK: // %bb.0: 473; CHECK-NEXT: ldr q0, [x0, #16] 474; CHECK-NEXT: ldr q0, [x0] 475; CHECK-NEXT: ldr q1, [x1, #16] 476; CHECK-NEXT: ldr q1, [x1] 477; CHECK-NEXT: mov z2.s, z0.s[3] 478; CHECK-NEXT: mov z4.s, z0.s[2] 479; CHECK-NEXT: mov z3.s, z1.s[3] 480; CHECK-NEXT: mov z5.s, z1.s[2] 481; CHECK-NEXT: zip1 z0.s, z0.s, z1.s 482; CHECK-NEXT: zip1 z2.s, z2.s, z3.s 483; CHECK-NEXT: zip1 z3.s, z4.s, z5.s 484; CHECK-NEXT: str q0, [x0] 485; CHECK-NEXT: zip1 z1.d, z3.d, z2.d 486; CHECK-NEXT: str q1, [x0, #16] 487; CHECK-NEXT: ret 488; 489; NONEON-NOSVE-LABEL: zip1_v8i32: 490; NONEON-NOSVE: // %bb.0: 491; NONEON-NOSVE-NEXT: sub sp, sp, #64 492; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 64 493; NONEON-NOSVE-NEXT: ldr q0, [x0, #16] 494; NONEON-NOSVE-NEXT: ldr q0, [x0] 495; NONEON-NOSVE-NEXT: ldr q1, [x1, #16] 496; NONEON-NOSVE-NEXT: ldr q1, [x1] 497; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #16] 498; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #16] 499; NONEON-NOSVE-NEXT: ldp w8, w11, [sp, #32] 500; NONEON-NOSVE-NEXT: stp w9, w11, [sp, #8] 501; NONEON-NOSVE-NEXT: stp w10, w8, [sp] 502; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #24] 503; NONEON-NOSVE-NEXT: ldp w8, w11, [sp, #40] 504; NONEON-NOSVE-NEXT: ldr q1, [sp] 505; NONEON-NOSVE-NEXT: stp w9, w11, [sp, #56] 506; NONEON-NOSVE-NEXT: stp w10, w8, [sp, #48] 507; NONEON-NOSVE-NEXT: ldr q0, [sp, #48] 508; NONEON-NOSVE-NEXT: str q0, [x0, #16] 509; NONEON-NOSVE-NEXT: str q1, [x0] 510; NONEON-NOSVE-NEXT: add sp, sp, #64 511; NONEON-NOSVE-NEXT: ret 512 %tmp1 = load volatile <8 x i32>, ptr %a 513 %tmp2 = load volatile <8 x i32>, ptr %b 514 %tmp3 = shufflevector <8 x i32> %tmp1, <8 x i32> %tmp2, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 515 store volatile <8 x i32> %tmp3, ptr %a 516 ret void 517} 518 519define void @zip_v4f64(ptr %a, ptr %b) { 520; CHECK-LABEL: zip_v4f64: 521; CHECK: // %bb.0: 522; CHECK-NEXT: ldp q1, q0, [x0] 523; CHECK-NEXT: ptrue p0.d, vl2 524; CHECK-NEXT: ldp q3, q2, [x1] 525; CHECK-NEXT: zip1 z4.d, z1.d, z3.d 526; CHECK-NEXT: zip1 z5.d, z0.d, z2.d 527; CHECK-NEXT: trn2 z1.d, z1.d, z3.d 528; CHECK-NEXT: trn2 z0.d, z0.d, z2.d 529; CHECK-NEXT: movprfx z2, z4 530; CHECK-NEXT: fadd z2.d, p0/m, z2.d, z5.d 531; CHECK-NEXT: fadd z0.d, p0/m, z0.d, z1.d 532; CHECK-NEXT: stp q2, q0, [x0] 533; CHECK-NEXT: ret 534; 535; NONEON-NOSVE-LABEL: zip_v4f64: 536; NONEON-NOSVE: // %bb.0: 537; NONEON-NOSVE-NEXT: sub sp, sp, #96 538; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96 539; NONEON-NOSVE-NEXT: ldp q1, q0, [x1] 540; NONEON-NOSVE-NEXT: ldp q2, q3, [x0] 541; NONEON-NOSVE-NEXT: stp q2, q1, [sp] 542; NONEON-NOSVE-NEXT: stp q3, q0, [sp, #32] 543; NONEON-NOSVE-NEXT: ldr d1, [sp, #24] 544; NONEON-NOSVE-NEXT: ldr d0, [sp, #56] 545; NONEON-NOSVE-NEXT: fadd d2, d1, d0 546; NONEON-NOSVE-NEXT: ldp d3, d1, [sp, #8] 547; NONEON-NOSVE-NEXT: ldr d0, [sp, #40] 548; NONEON-NOSVE-NEXT: fadd d0, d3, d0 549; NONEON-NOSVE-NEXT: stp d0, d2, [sp, #64] 550; NONEON-NOSVE-NEXT: ldr d0, [sp, #48] 551; NONEON-NOSVE-NEXT: fadd d2, d1, d0 552; NONEON-NOSVE-NEXT: ldr d0, [sp, #32] 553; NONEON-NOSVE-NEXT: ldr d1, [sp] 554; NONEON-NOSVE-NEXT: fadd d0, d1, d0 555; NONEON-NOSVE-NEXT: stp d0, d2, [sp, #80] 556; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #64] 557; NONEON-NOSVE-NEXT: stp q0, q1, [x0] 558; NONEON-NOSVE-NEXT: add sp, sp, #96 559; NONEON-NOSVE-NEXT: ret 560 %tmp1 = load <4 x double>, ptr %a 561 %tmp2 = load <4 x double>, ptr %b 562 %tmp3 = shufflevector <4 x double> %tmp1, <4 x double> %tmp2, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 563 %tmp4 = shufflevector <4 x double> %tmp1, <4 x double> %tmp2, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 564 %tmp5 = fadd <4 x double> %tmp3, %tmp4 565 store <4 x double> %tmp5, ptr %a 566 ret void 567} 568 569define void @zip_v4i32(ptr %a, ptr %b) { 570; CHECK-LABEL: zip_v4i32: 571; CHECK: // %bb.0: 572; CHECK-NEXT: ldr q0, [x1] 573; CHECK-NEXT: ldr q1, [x0] 574; CHECK-NEXT: mov z2.s, z0.s[3] 575; CHECK-NEXT: mov z3.s, z1.s[3] 576; CHECK-NEXT: mov z4.s, z0.s[2] 577; CHECK-NEXT: mov z5.s, z1.s[2] 578; CHECK-NEXT: zip1 z0.s, z1.s, z0.s 579; CHECK-NEXT: zip1 z2.s, z3.s, z2.s 580; CHECK-NEXT: zip1 z3.s, z5.s, z4.s 581; CHECK-NEXT: zip1 z1.d, z3.d, z2.d 582; CHECK-NEXT: add z0.s, z0.s, z1.s 583; CHECK-NEXT: str q0, [x0] 584; CHECK-NEXT: ret 585; 586; NONEON-NOSVE-LABEL: zip_v4i32: 587; NONEON-NOSVE: // %bb.0: 588; NONEON-NOSVE-NEXT: ldr q0, [x1] 589; NONEON-NOSVE-NEXT: ldr q1, [x0] 590; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-48]! 591; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48 592; NONEON-NOSVE-NEXT: ldr w8, [sp, #28] 593; NONEON-NOSVE-NEXT: ldr w9, [sp, #20] 594; NONEON-NOSVE-NEXT: add w8, w9, w8 595; NONEON-NOSVE-NEXT: ldr w9, [sp, #4] 596; NONEON-NOSVE-NEXT: str w8, [sp, #44] 597; NONEON-NOSVE-NEXT: ldr w8, [sp, #12] 598; NONEON-NOSVE-NEXT: add w8, w9, w8 599; NONEON-NOSVE-NEXT: ldr w9, [sp, #16] 600; NONEON-NOSVE-NEXT: str w8, [sp, #40] 601; NONEON-NOSVE-NEXT: ldr w8, [sp, #24] 602; NONEON-NOSVE-NEXT: add w8, w9, w8 603; NONEON-NOSVE-NEXT: ldr w9, [sp] 604; NONEON-NOSVE-NEXT: str w8, [sp, #36] 605; NONEON-NOSVE-NEXT: ldr w8, [sp, #8] 606; NONEON-NOSVE-NEXT: add w8, w9, w8 607; NONEON-NOSVE-NEXT: str w8, [sp, #32] 608; NONEON-NOSVE-NEXT: ldr q0, [sp, #32] 609; NONEON-NOSVE-NEXT: str q0, [x0] 610; NONEON-NOSVE-NEXT: add sp, sp, #48 611; NONEON-NOSVE-NEXT: ret 612 %tmp1 = load <4 x i32>, ptr %a 613 %tmp2 = load <4 x i32>, ptr %b 614 %tmp3 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 615 %tmp4 = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 616 %tmp5 = add <4 x i32> %tmp3, %tmp4 617 store <4 x i32> %tmp5, ptr %a 618 ret void 619} 620 621define void @zip1_v8i32_undef(ptr %a) { 622; CHECK-LABEL: zip1_v8i32_undef: 623; CHECK: // %bb.0: 624; CHECK-NEXT: adrp x8, .LCPI6_0 625; CHECK-NEXT: ldr q0, [x0, #16] 626; CHECK-NEXT: ldr q0, [x0] 627; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI6_0] 628; CHECK-NEXT: tbl z1.s, { z0.s }, z1.s 629; CHECK-NEXT: zip1 z0.s, z0.s, z0.s 630; CHECK-NEXT: str q1, [x0, #16] 631; CHECK-NEXT: str q0, [x0] 632; CHECK-NEXT: ret 633; 634; NONEON-NOSVE-LABEL: zip1_v8i32_undef: 635; NONEON-NOSVE: // %bb.0: 636; NONEON-NOSVE-NEXT: sub sp, sp, #48 637; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48 638; NONEON-NOSVE-NEXT: ldr q0, [x0, #16] 639; NONEON-NOSVE-NEXT: ldr q0, [x0] 640; NONEON-NOSVE-NEXT: str q0, [sp, #16] 641; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #16] 642; NONEON-NOSVE-NEXT: stp w8, w8, [sp] 643; NONEON-NOSVE-NEXT: ldp w8, w10, [sp, #24] 644; NONEON-NOSVE-NEXT: stp w9, w9, [sp, #8] 645; NONEON-NOSVE-NEXT: ldr q1, [sp] 646; NONEON-NOSVE-NEXT: stp w10, w10, [sp, #40] 647; NONEON-NOSVE-NEXT: stp w8, w8, [sp, #32] 648; NONEON-NOSVE-NEXT: ldr q0, [sp, #32] 649; NONEON-NOSVE-NEXT: str q0, [x0, #16] 650; NONEON-NOSVE-NEXT: str q1, [x0] 651; NONEON-NOSVE-NEXT: add sp, sp, #48 652; NONEON-NOSVE-NEXT: ret 653 %tmp1 = load volatile <8 x i32>, ptr %a 654 %tmp2 = shufflevector <8 x i32> %tmp1, <8 x i32> undef, <8 x i32> <i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3> 655 store volatile <8 x i32> %tmp2, ptr %a 656 ret void 657} 658 659define void @trn_v32i8(ptr %a, ptr %b) { 660; CHECK-LABEL: trn_v32i8: 661; CHECK: // %bb.0: 662; CHECK-NEXT: ldp q0, q2, [x0] 663; CHECK-NEXT: ldp q1, q3, [x1] 664; CHECK-NEXT: trn1 z4.b, z0.b, z1.b 665; CHECK-NEXT: trn2 z0.b, z0.b, z1.b 666; CHECK-NEXT: trn1 z1.b, z2.b, z3.b 667; CHECK-NEXT: trn2 z2.b, z2.b, z3.b 668; CHECK-NEXT: add z0.b, z4.b, z0.b 669; CHECK-NEXT: add z1.b, z1.b, z2.b 670; CHECK-NEXT: stp q0, q1, [x0] 671; CHECK-NEXT: ret 672; 673; NONEON-NOSVE-LABEL: trn_v32i8: 674; NONEON-NOSVE: // %bb.0: 675; NONEON-NOSVE-NEXT: sub sp, sp, #96 676; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96 677; NONEON-NOSVE-NEXT: ldp q3, q0, [x1] 678; NONEON-NOSVE-NEXT: ldp q2, q1, [x0] 679; NONEON-NOSVE-NEXT: stp q2, q3, [sp] 680; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32] 681; NONEON-NOSVE-NEXT: ldrb w8, [sp, #63] 682; NONEON-NOSVE-NEXT: ldrb w9, [sp, #62] 683; NONEON-NOSVE-NEXT: add w8, w9, w8 684; NONEON-NOSVE-NEXT: ldrb w9, [sp, #46] 685; NONEON-NOSVE-NEXT: strb w8, [sp, #95] 686; NONEON-NOSVE-NEXT: ldrb w8, [sp, #47] 687; NONEON-NOSVE-NEXT: add w8, w9, w8 688; NONEON-NOSVE-NEXT: ldrb w9, [sp, #60] 689; NONEON-NOSVE-NEXT: strb w8, [sp, #94] 690; NONEON-NOSVE-NEXT: ldrb w8, [sp, #61] 691; NONEON-NOSVE-NEXT: add w8, w9, w8 692; NONEON-NOSVE-NEXT: ldrb w9, [sp, #44] 693; NONEON-NOSVE-NEXT: strb w8, [sp, #93] 694; NONEON-NOSVE-NEXT: ldrb w8, [sp, #45] 695; NONEON-NOSVE-NEXT: add w8, w9, w8 696; NONEON-NOSVE-NEXT: ldrb w9, [sp, #58] 697; NONEON-NOSVE-NEXT: strb w8, [sp, #92] 698; NONEON-NOSVE-NEXT: ldrb w8, [sp, #59] 699; NONEON-NOSVE-NEXT: add w8, w9, w8 700; NONEON-NOSVE-NEXT: ldrb w9, [sp, #42] 701; NONEON-NOSVE-NEXT: strb w8, [sp, #91] 702; NONEON-NOSVE-NEXT: ldrb w8, [sp, #43] 703; NONEON-NOSVE-NEXT: add w8, w9, w8 704; NONEON-NOSVE-NEXT: ldrb w9, [sp, #56] 705; NONEON-NOSVE-NEXT: strb w8, [sp, #90] 706; NONEON-NOSVE-NEXT: ldrb w8, [sp, #57] 707; NONEON-NOSVE-NEXT: add w8, w9, w8 708; NONEON-NOSVE-NEXT: ldrb w9, [sp, #40] 709; NONEON-NOSVE-NEXT: strb w8, [sp, #89] 710; NONEON-NOSVE-NEXT: ldrb w8, [sp, #41] 711; NONEON-NOSVE-NEXT: add w8, w9, w8 712; NONEON-NOSVE-NEXT: ldrb w9, [sp, #54] 713; NONEON-NOSVE-NEXT: strb w8, [sp, #88] 714; NONEON-NOSVE-NEXT: ldrb w8, [sp, #55] 715; NONEON-NOSVE-NEXT: add w8, w9, w8 716; NONEON-NOSVE-NEXT: ldrb w9, [sp, #38] 717; NONEON-NOSVE-NEXT: strb w8, [sp, #87] 718; NONEON-NOSVE-NEXT: ldrb w8, [sp, #39] 719; NONEON-NOSVE-NEXT: add w8, w9, w8 720; NONEON-NOSVE-NEXT: ldrb w9, [sp, #52] 721; NONEON-NOSVE-NEXT: strb w8, [sp, #86] 722; NONEON-NOSVE-NEXT: ldrb w8, [sp, #53] 723; NONEON-NOSVE-NEXT: add w8, w9, w8 724; NONEON-NOSVE-NEXT: ldrb w9, [sp, #36] 725; NONEON-NOSVE-NEXT: strb w8, [sp, #85] 726; NONEON-NOSVE-NEXT: ldrb w8, [sp, #37] 727; NONEON-NOSVE-NEXT: add w8, w9, w8 728; NONEON-NOSVE-NEXT: ldrb w9, [sp, #50] 729; NONEON-NOSVE-NEXT: strb w8, [sp, #84] 730; NONEON-NOSVE-NEXT: ldrb w8, [sp, #51] 731; NONEON-NOSVE-NEXT: add w8, w9, w8 732; NONEON-NOSVE-NEXT: ldrb w9, [sp, #34] 733; NONEON-NOSVE-NEXT: strb w8, [sp, #83] 734; NONEON-NOSVE-NEXT: ldrb w8, [sp, #35] 735; NONEON-NOSVE-NEXT: add w8, w9, w8 736; NONEON-NOSVE-NEXT: ldrb w9, [sp, #48] 737; NONEON-NOSVE-NEXT: strb w8, [sp, #82] 738; NONEON-NOSVE-NEXT: ldrb w8, [sp, #49] 739; NONEON-NOSVE-NEXT: add w8, w9, w8 740; NONEON-NOSVE-NEXT: ldrb w9, [sp, #32] 741; NONEON-NOSVE-NEXT: strb w8, [sp, #81] 742; NONEON-NOSVE-NEXT: ldrb w8, [sp, #33] 743; NONEON-NOSVE-NEXT: add w8, w9, w8 744; NONEON-NOSVE-NEXT: ldrb w9, [sp, #30] 745; NONEON-NOSVE-NEXT: strb w8, [sp, #80] 746; NONEON-NOSVE-NEXT: ldrb w8, [sp, #31] 747; NONEON-NOSVE-NEXT: add w8, w9, w8 748; NONEON-NOSVE-NEXT: ldrb w9, [sp, #14] 749; NONEON-NOSVE-NEXT: strb w8, [sp, #79] 750; NONEON-NOSVE-NEXT: ldrb w8, [sp, #15] 751; NONEON-NOSVE-NEXT: add w8, w9, w8 752; NONEON-NOSVE-NEXT: ldrb w9, [sp, #28] 753; NONEON-NOSVE-NEXT: strb w8, [sp, #78] 754; NONEON-NOSVE-NEXT: ldrb w8, [sp, #29] 755; NONEON-NOSVE-NEXT: add w8, w9, w8 756; NONEON-NOSVE-NEXT: ldrb w9, [sp, #12] 757; NONEON-NOSVE-NEXT: strb w8, [sp, #77] 758; NONEON-NOSVE-NEXT: ldrb w8, [sp, #13] 759; NONEON-NOSVE-NEXT: add w8, w9, w8 760; NONEON-NOSVE-NEXT: ldrb w9, [sp, #26] 761; NONEON-NOSVE-NEXT: strb w8, [sp, #76] 762; NONEON-NOSVE-NEXT: ldrb w8, [sp, #27] 763; NONEON-NOSVE-NEXT: add w8, w9, w8 764; NONEON-NOSVE-NEXT: ldrb w9, [sp, #10] 765; NONEON-NOSVE-NEXT: strb w8, [sp, #75] 766; NONEON-NOSVE-NEXT: ldrb w8, [sp, #11] 767; NONEON-NOSVE-NEXT: add w8, w9, w8 768; NONEON-NOSVE-NEXT: ldrb w9, [sp, #24] 769; NONEON-NOSVE-NEXT: strb w8, [sp, #74] 770; NONEON-NOSVE-NEXT: ldrb w8, [sp, #25] 771; NONEON-NOSVE-NEXT: add w8, w9, w8 772; NONEON-NOSVE-NEXT: ldrb w9, [sp, #6] 773; NONEON-NOSVE-NEXT: strb w8, [sp, #73] 774; NONEON-NOSVE-NEXT: ldrb w8, [sp, #7] 775; NONEON-NOSVE-NEXT: add w8, w9, w8 776; NONEON-NOSVE-NEXT: ldrb w9, [sp, #20] 777; NONEON-NOSVE-NEXT: strb w8, [sp, #70] 778; NONEON-NOSVE-NEXT: ldrb w8, [sp, #21] 779; NONEON-NOSVE-NEXT: add w8, w9, w8 780; NONEON-NOSVE-NEXT: ldrb w9, [sp, #18] 781; NONEON-NOSVE-NEXT: strb w8, [sp, #69] 782; NONEON-NOSVE-NEXT: ldrb w8, [sp, #19] 783; NONEON-NOSVE-NEXT: add w8, w9, w8 784; NONEON-NOSVE-NEXT: ldrb w9, [sp, #2] 785; NONEON-NOSVE-NEXT: strb w8, [sp, #67] 786; NONEON-NOSVE-NEXT: ldrb w8, [sp, #3] 787; NONEON-NOSVE-NEXT: add w8, w9, w8 788; NONEON-NOSVE-NEXT: ldrb w9, [sp, #16] 789; NONEON-NOSVE-NEXT: strb w8, [sp, #66] 790; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17] 791; NONEON-NOSVE-NEXT: add w8, w9, w8 792; NONEON-NOSVE-NEXT: ldrb w9, [sp] 793; NONEON-NOSVE-NEXT: strb w8, [sp, #65] 794; NONEON-NOSVE-NEXT: ldrb w8, [sp, #1] 795; NONEON-NOSVE-NEXT: add w8, w9, w8 796; NONEON-NOSVE-NEXT: strb w8, [sp, #64] 797; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64] 798; NONEON-NOSVE-NEXT: stp q0, q1, [x0] 799; NONEON-NOSVE-NEXT: add sp, sp, #96 800; NONEON-NOSVE-NEXT: ret 801 %tmp1 = load <32 x i8>, ptr %a 802 %tmp2 = load <32 x i8>, ptr %b 803 %tmp3 = shufflevector <32 x i8> %tmp1, <32 x i8> %tmp2, <32 x i32> <i32 0, i32 32, i32 2, i32 34, i32 4, i32 36, i32 6, i32 38, i32 8, i32 40, i32 10, i32 42, i32 12, i32 44, i32 14, i32 46, i32 16, i32 48, i32 18, i32 50, i32 20, i32 52, i32 22, i32 54, i32 24, i32 56, i32 26, i32 58, i32 28, i32 60, i32 30, i32 62> 804 %tmp4 = shufflevector <32 x i8> %tmp1, <32 x i8> %tmp2, <32 x i32> <i32 1, i32 33, i32 3, i32 35, i32 undef, i32 37, i32 7, i32 undef, i32 undef, i32 41, i32 11, i32 43, i32 13, i32 45, i32 15, i32 47, i32 17, i32 49, i32 19, i32 51, i32 21, i32 53, i32 23, i32 55, i32 25, i32 57, i32 27, i32 59, i32 29, i32 61, i32 31, i32 63> 805 %tmp5 = add <32 x i8> %tmp3, %tmp4 806 store <32 x i8> %tmp5, ptr %a 807 ret void 808} 809 810define void @trn_v8i16(ptr %a, ptr %b) { 811; CHECK-LABEL: trn_v8i16: 812; CHECK: // %bb.0: 813; CHECK-NEXT: adrp x8, .LCPI8_0 814; CHECK-NEXT: adrp x9, .LCPI8_1 815; CHECK-NEXT: ldr q0, [x0] 816; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI8_0] 817; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI8_1] 818; CHECK-NEXT: tbl z1.h, { z0.h }, z1.h 819; CHECK-NEXT: tbl z0.h, { z0.h }, z2.h 820; CHECK-NEXT: add z0.h, z1.h, z0.h 821; CHECK-NEXT: str q0, [x0] 822; CHECK-NEXT: ret 823; 824; NONEON-NOSVE-LABEL: trn_v8i16: 825; NONEON-NOSVE: // %bb.0: 826; NONEON-NOSVE-NEXT: ldr q0, [x0] 827; NONEON-NOSVE-NEXT: str q0, [sp, #-32]! 828; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32 829; NONEON-NOSVE-NEXT: ldrh w8, [sp, #14] 830; NONEON-NOSVE-NEXT: ldrh w9, [sp, #2] 831; NONEON-NOSVE-NEXT: ldrh w11, [sp, #10] 832; NONEON-NOSVE-NEXT: ldrh w12, [sp, #4] 833; NONEON-NOSVE-NEXT: add w10, w9, w8 834; NONEON-NOSVE-NEXT: strh w10, [sp, #28] 835; NONEON-NOSVE-NEXT: ldrh w10, [sp, #8] 836; NONEON-NOSVE-NEXT: add w10, w11, w10 837; NONEON-NOSVE-NEXT: strh w10, [sp, #26] 838; NONEON-NOSVE-NEXT: ldrh w10, [sp, #12] 839; NONEON-NOSVE-NEXT: add w11, w10, w11 840; NONEON-NOSVE-NEXT: add w8, w8, w10 841; NONEON-NOSVE-NEXT: strh w11, [sp, #22] 842; NONEON-NOSVE-NEXT: ldrh w11, [sp, #6] 843; NONEON-NOSVE-NEXT: strh w8, [sp, #18] 844; NONEON-NOSVE-NEXT: ldrh w8, [sp] 845; NONEON-NOSVE-NEXT: add w11, w12, w11 846; NONEON-NOSVE-NEXT: add w8, w8, w9 847; NONEON-NOSVE-NEXT: strh w11, [sp, #20] 848; NONEON-NOSVE-NEXT: strh w8, [sp, #16] 849; NONEON-NOSVE-NEXT: ldr q0, [sp, #16] 850; NONEON-NOSVE-NEXT: str q0, [x0] 851; NONEON-NOSVE-NEXT: add sp, sp, #32 852; NONEON-NOSVE-NEXT: ret 853 %tmp1 = load <8 x i16>, ptr %a 854 %tmp2 = load <8 x i16>, ptr %b 855 %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 0, i32 7, i32 2, i32 6, i32 4, i32 5, i32 1, i32 3> 856 %tmp4 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 1, i32 6, i32 3, i32 5, i32 undef, i32 4, i32 7, i32 undef> 857 %tmp5 = add <8 x i16> %tmp3, %tmp4 858 store <8 x i16> %tmp5, ptr %a 859 ret void 860} 861 862define void @trn_v16i16(ptr %a, ptr %b) { 863; CHECK-LABEL: trn_v16i16: 864; CHECK: // %bb.0: 865; CHECK-NEXT: ldp q0, q2, [x0] 866; CHECK-NEXT: ldp q1, q3, [x1] 867; CHECK-NEXT: trn1 z4.h, z0.h, z1.h 868; CHECK-NEXT: trn2 z0.h, z0.h, z1.h 869; CHECK-NEXT: trn1 z1.h, z2.h, z3.h 870; CHECK-NEXT: trn2 z2.h, z2.h, z3.h 871; CHECK-NEXT: add z0.h, z4.h, z0.h 872; CHECK-NEXT: add z1.h, z1.h, z2.h 873; CHECK-NEXT: stp q0, q1, [x0] 874; CHECK-NEXT: ret 875; 876; NONEON-NOSVE-LABEL: trn_v16i16: 877; NONEON-NOSVE: // %bb.0: 878; NONEON-NOSVE-NEXT: sub sp, sp, #96 879; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96 880; NONEON-NOSVE-NEXT: ldp q3, q0, [x1] 881; NONEON-NOSVE-NEXT: ldp q2, q1, [x0] 882; NONEON-NOSVE-NEXT: stp q2, q3, [sp] 883; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32] 884; NONEON-NOSVE-NEXT: ldrh w8, [sp, #62] 885; NONEON-NOSVE-NEXT: ldrh w9, [sp, #60] 886; NONEON-NOSVE-NEXT: add w8, w9, w8 887; NONEON-NOSVE-NEXT: ldrh w9, [sp, #44] 888; NONEON-NOSVE-NEXT: strh w8, [sp, #94] 889; NONEON-NOSVE-NEXT: ldrh w8, [sp, #46] 890; NONEON-NOSVE-NEXT: add w8, w9, w8 891; NONEON-NOSVE-NEXT: ldrh w9, [sp, #56] 892; NONEON-NOSVE-NEXT: strh w8, [sp, #92] 893; NONEON-NOSVE-NEXT: ldrh w8, [sp, #58] 894; NONEON-NOSVE-NEXT: add w8, w9, w8 895; NONEON-NOSVE-NEXT: ldrh w9, [sp, #40] 896; NONEON-NOSVE-NEXT: strh w8, [sp, #90] 897; NONEON-NOSVE-NEXT: ldrh w8, [sp, #42] 898; NONEON-NOSVE-NEXT: add w8, w9, w8 899; NONEON-NOSVE-NEXT: ldrh w9, [sp, #52] 900; NONEON-NOSVE-NEXT: strh w8, [sp, #88] 901; NONEON-NOSVE-NEXT: ldrh w8, [sp, #54] 902; NONEON-NOSVE-NEXT: add w8, w9, w8 903; NONEON-NOSVE-NEXT: ldrh w9, [sp, #36] 904; NONEON-NOSVE-NEXT: strh w8, [sp, #86] 905; NONEON-NOSVE-NEXT: ldrh w8, [sp, #38] 906; NONEON-NOSVE-NEXT: add w8, w9, w8 907; NONEON-NOSVE-NEXT: ldrh w9, [sp, #48] 908; NONEON-NOSVE-NEXT: strh w8, [sp, #84] 909; NONEON-NOSVE-NEXT: ldrh w8, [sp, #50] 910; NONEON-NOSVE-NEXT: add w8, w9, w8 911; NONEON-NOSVE-NEXT: ldrh w9, [sp, #32] 912; NONEON-NOSVE-NEXT: strh w8, [sp, #82] 913; NONEON-NOSVE-NEXT: ldrh w8, [sp, #34] 914; NONEON-NOSVE-NEXT: add w8, w9, w8 915; NONEON-NOSVE-NEXT: ldrh w9, [sp, #28] 916; NONEON-NOSVE-NEXT: strh w8, [sp, #80] 917; NONEON-NOSVE-NEXT: ldrh w8, [sp, #30] 918; NONEON-NOSVE-NEXT: add w8, w9, w8 919; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12] 920; NONEON-NOSVE-NEXT: strh w8, [sp, #78] 921; NONEON-NOSVE-NEXT: ldrh w8, [sp, #14] 922; NONEON-NOSVE-NEXT: add w8, w9, w8 923; NONEON-NOSVE-NEXT: ldrh w9, [sp, #24] 924; NONEON-NOSVE-NEXT: strh w8, [sp, #76] 925; NONEON-NOSVE-NEXT: ldrh w8, [sp, #26] 926; NONEON-NOSVE-NEXT: add w8, w9, w8 927; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8] 928; NONEON-NOSVE-NEXT: strh w8, [sp, #74] 929; NONEON-NOSVE-NEXT: ldrh w8, [sp, #10] 930; NONEON-NOSVE-NEXT: add w8, w9, w8 931; NONEON-NOSVE-NEXT: ldrh w9, [sp, #20] 932; NONEON-NOSVE-NEXT: strh w8, [sp, #72] 933; NONEON-NOSVE-NEXT: ldrh w8, [sp, #22] 934; NONEON-NOSVE-NEXT: add w8, w9, w8 935; NONEON-NOSVE-NEXT: ldrh w9, [sp, #4] 936; NONEON-NOSVE-NEXT: strh w8, [sp, #70] 937; NONEON-NOSVE-NEXT: ldrh w8, [sp, #6] 938; NONEON-NOSVE-NEXT: add w8, w9, w8 939; NONEON-NOSVE-NEXT: ldrh w9, [sp, #16] 940; NONEON-NOSVE-NEXT: strh w8, [sp, #68] 941; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18] 942; NONEON-NOSVE-NEXT: add w8, w9, w8 943; NONEON-NOSVE-NEXT: ldrh w9, [sp] 944; NONEON-NOSVE-NEXT: strh w8, [sp, #66] 945; NONEON-NOSVE-NEXT: ldrh w8, [sp, #2] 946; NONEON-NOSVE-NEXT: add w8, w9, w8 947; NONEON-NOSVE-NEXT: strh w8, [sp, #64] 948; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64] 949; NONEON-NOSVE-NEXT: stp q0, q1, [x0] 950; NONEON-NOSVE-NEXT: add sp, sp, #96 951; NONEON-NOSVE-NEXT: ret 952 %tmp1 = load <16 x i16>, ptr %a 953 %tmp2 = load <16 x i16>, ptr %b 954 %tmp3 = shufflevector <16 x i16> %tmp1, <16 x i16> %tmp2, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 955 %tmp4 = shufflevector <16 x i16> %tmp1, <16 x i16> %tmp2, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 956 %tmp5 = add <16 x i16> %tmp3, %tmp4 957 store <16 x i16> %tmp5, ptr %a 958 ret void 959} 960 961define void @trn_v8i32(ptr %a, ptr %b) { 962; CHECK-LABEL: trn_v8i32: 963; CHECK: // %bb.0: 964; CHECK-NEXT: ldp q0, q2, [x0] 965; CHECK-NEXT: ldp q1, q3, [x1] 966; CHECK-NEXT: zip1 z4.s, z0.s, z1.s 967; CHECK-NEXT: trn2 z0.s, z0.s, z1.s 968; CHECK-NEXT: trn1 z1.s, z2.s, z3.s 969; CHECK-NEXT: trn2 z2.s, z2.s, z3.s 970; CHECK-NEXT: add z0.s, z4.s, z0.s 971; CHECK-NEXT: add z1.s, z1.s, z2.s 972; CHECK-NEXT: stp q0, q1, [x0] 973; CHECK-NEXT: ret 974; 975; NONEON-NOSVE-LABEL: trn_v8i32: 976; NONEON-NOSVE: // %bb.0: 977; NONEON-NOSVE-NEXT: sub sp, sp, #80 978; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 80 979; NONEON-NOSVE-NEXT: ldp q2, q1, [x0] 980; NONEON-NOSVE-NEXT: ldr q0, [x1, #16] 981; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32] 982; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #48] 983; NONEON-NOSVE-NEXT: str q2, [sp, #16] 984; NONEON-NOSVE-NEXT: add w8, w9, w8 985; NONEON-NOSVE-NEXT: str w8, [sp, #68] 986; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #32] 987; NONEON-NOSVE-NEXT: add w8, w9, w8 988; NONEON-NOSVE-NEXT: str w8, [sp, #64] 989; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #16] 990; NONEON-NOSVE-NEXT: ldr q1, [sp, #64] 991; NONEON-NOSVE-NEXT: add w8, w9, w8 992; NONEON-NOSVE-NEXT: str w8, [sp] 993; NONEON-NOSVE-NEXT: ldr q0, [sp] 994; NONEON-NOSVE-NEXT: stp q0, q1, [x0] 995; NONEON-NOSVE-NEXT: add sp, sp, #80 996; NONEON-NOSVE-NEXT: ret 997 %tmp1 = load <8 x i32>, ptr %a 998 %tmp2 = load <8 x i32>, ptr %b 999 %tmp3 = shufflevector <8 x i32> %tmp1, <8 x i32> %tmp2, <8 x i32> <i32 0, i32 8, i32 undef, i32 undef, i32 4, i32 12, i32 6, i32 14> 1000 %tmp4 = shufflevector <8 x i32> %tmp1, <8 x i32> %tmp2, <8 x i32> <i32 1, i32 undef, i32 3, i32 11, i32 5, i32 13, i32 undef, i32 undef> 1001 %tmp5 = add <8 x i32> %tmp3, %tmp4 1002 store <8 x i32> %tmp5, ptr %a 1003 ret void 1004} 1005 1006define void @trn_v4f64(ptr %a, ptr %b) { 1007; CHECK-LABEL: trn_v4f64: 1008; CHECK: // %bb.0: 1009; CHECK-NEXT: ldp q0, q2, [x0] 1010; CHECK-NEXT: ptrue p0.d, vl2 1011; CHECK-NEXT: ldp q1, q3, [x1] 1012; CHECK-NEXT: zip1 z4.d, z0.d, z1.d 1013; CHECK-NEXT: trn2 z0.d, z0.d, z1.d 1014; CHECK-NEXT: zip1 z1.d, z2.d, z3.d 1015; CHECK-NEXT: trn2 z2.d, z2.d, z3.d 1016; CHECK-NEXT: fadd z0.d, p0/m, z0.d, z4.d 1017; CHECK-NEXT: fadd z1.d, p0/m, z1.d, z2.d 1018; CHECK-NEXT: stp q0, q1, [x0] 1019; CHECK-NEXT: ret 1020; 1021; NONEON-NOSVE-LABEL: trn_v4f64: 1022; NONEON-NOSVE: // %bb.0: 1023; NONEON-NOSVE-NEXT: sub sp, sp, #96 1024; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96 1025; NONEON-NOSVE-NEXT: ldp q3, q0, [x1] 1026; NONEON-NOSVE-NEXT: ldp q2, q1, [x0] 1027; NONEON-NOSVE-NEXT: stp q2, q3, [sp] 1028; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #32] 1029; NONEON-NOSVE-NEXT: ldp d1, d0, [sp, #48] 1030; NONEON-NOSVE-NEXT: fadd d2, d1, d0 1031; NONEON-NOSVE-NEXT: ldp d1, d0, [sp, #32] 1032; NONEON-NOSVE-NEXT: fadd d0, d1, d0 1033; NONEON-NOSVE-NEXT: stp d0, d2, [sp, #80] 1034; NONEON-NOSVE-NEXT: ldp d1, d0, [sp, #16] 1035; NONEON-NOSVE-NEXT: fadd d2, d1, d0 1036; NONEON-NOSVE-NEXT: ldp d1, d0, [sp] 1037; NONEON-NOSVE-NEXT: fadd d0, d1, d0 1038; NONEON-NOSVE-NEXT: stp d0, d2, [sp, #64] 1039; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64] 1040; NONEON-NOSVE-NEXT: stp q0, q1, [x0] 1041; NONEON-NOSVE-NEXT: add sp, sp, #96 1042; NONEON-NOSVE-NEXT: ret 1043 %tmp1 = load <4 x double>, ptr %a 1044 %tmp2 = load <4 x double>, ptr %b 1045 %tmp3 = shufflevector <4 x double> %tmp1, <4 x double> %tmp2, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1046 %tmp4 = shufflevector <4 x double> %tmp1, <4 x double> %tmp2, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1047 %tmp5 = fadd <4 x double> %tmp3, %tmp4 1048 store <4 x double> %tmp5, ptr %a 1049 ret void 1050} 1051 1052define void @trn_v4f32(ptr %a, ptr %b) { 1053; CHECK-LABEL: trn_v4f32: 1054; CHECK: // %bb.0: 1055; CHECK-NEXT: ldr q0, [x0] 1056; CHECK-NEXT: ldr q1, [x1] 1057; CHECK-NEXT: ptrue p0.s, vl4 1058; CHECK-NEXT: trn1 z2.s, z0.s, z1.s 1059; CHECK-NEXT: trn2 z0.s, z0.s, z1.s 1060; CHECK-NEXT: fadd z0.s, p0/m, z0.s, z2.s 1061; CHECK-NEXT: str q0, [x0] 1062; CHECK-NEXT: ret 1063; 1064; NONEON-NOSVE-LABEL: trn_v4f32: 1065; NONEON-NOSVE: // %bb.0: 1066; NONEON-NOSVE-NEXT: ldr q0, [x1] 1067; NONEON-NOSVE-NEXT: ldr q1, [x0] 1068; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-48]! 1069; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48 1070; NONEON-NOSVE-NEXT: ldp s1, s0, [sp, #24] 1071; NONEON-NOSVE-NEXT: fadd s2, s1, s0 1072; NONEON-NOSVE-NEXT: ldp s1, s0, [sp, #8] 1073; NONEON-NOSVE-NEXT: fadd s0, s1, s0 1074; NONEON-NOSVE-NEXT: stp s0, s2, [sp, #40] 1075; NONEON-NOSVE-NEXT: ldp s1, s0, [sp, #16] 1076; NONEON-NOSVE-NEXT: fadd s2, s1, s0 1077; NONEON-NOSVE-NEXT: ldp s1, s0, [sp] 1078; NONEON-NOSVE-NEXT: fadd s0, s1, s0 1079; NONEON-NOSVE-NEXT: stp s0, s2, [sp, #32] 1080; NONEON-NOSVE-NEXT: ldr q0, [sp, #32] 1081; NONEON-NOSVE-NEXT: str q0, [x0] 1082; NONEON-NOSVE-NEXT: add sp, sp, #48 1083; NONEON-NOSVE-NEXT: ret 1084 %tmp1 = load <4 x float>, ptr %a 1085 %tmp2 = load <4 x float>, ptr %b 1086 %tmp3 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1087 %tmp4 = shufflevector <4 x float> %tmp1, <4 x float> %tmp2, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1088 %tmp5 = fadd <4 x float> %tmp3, %tmp4 1089 store <4 x float> %tmp5, ptr %a 1090 ret void 1091} 1092 1093define void @trn_v8i32_undef(ptr %a) { 1094; CHECK-LABEL: trn_v8i32_undef: 1095; CHECK: // %bb.0: 1096; CHECK-NEXT: ldp q0, q1, [x0] 1097; CHECK-NEXT: trn1 z2.s, z0.s, z0.s 1098; CHECK-NEXT: trn2 z0.s, z0.s, z0.s 1099; CHECK-NEXT: trn1 z3.s, z1.s, z1.s 1100; CHECK-NEXT: trn2 z1.s, z1.s, z1.s 1101; CHECK-NEXT: add z0.s, z2.s, z0.s 1102; CHECK-NEXT: add z1.s, z3.s, z1.s 1103; CHECK-NEXT: stp q0, q1, [x0] 1104; CHECK-NEXT: ret 1105; 1106; NONEON-NOSVE-LABEL: trn_v8i32_undef: 1107; NONEON-NOSVE: // %bb.0: 1108; NONEON-NOSVE-NEXT: ldp q1, q0, [x0] 1109; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-64]! 1110; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 64 1111; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #24] 1112; NONEON-NOSVE-NEXT: add w8, w9, w8 1113; NONEON-NOSVE-NEXT: stp w8, w8, [sp, #56] 1114; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #16] 1115; NONEON-NOSVE-NEXT: add w8, w9, w8 1116; NONEON-NOSVE-NEXT: stp w8, w8, [sp, #48] 1117; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8] 1118; NONEON-NOSVE-NEXT: add w8, w9, w8 1119; NONEON-NOSVE-NEXT: stp w8, w8, [sp, #40] 1120; NONEON-NOSVE-NEXT: ldp w9, w8, [sp] 1121; NONEON-NOSVE-NEXT: add w8, w9, w8 1122; NONEON-NOSVE-NEXT: stp w8, w8, [sp, #32] 1123; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #32] 1124; NONEON-NOSVE-NEXT: stp q0, q1, [x0] 1125; NONEON-NOSVE-NEXT: add sp, sp, #64 1126; NONEON-NOSVE-NEXT: ret 1127 %tmp1 = load <8 x i32>, ptr %a 1128 %tmp3 = shufflevector <8 x i32> %tmp1, <8 x i32> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6> 1129 %tmp4 = shufflevector <8 x i32> %tmp1, <8 x i32> undef, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7> 1130 %tmp5 = add <8 x i32> %tmp3, %tmp4 1131 store <8 x i32> %tmp5, ptr %a 1132 ret void 1133} 1134 1135define void @zip2_v32i8(ptr %a, ptr %b) #0{ 1136; CHECK-LABEL: zip2_v32i8: 1137; CHECK: // %bb.0: 1138; CHECK-NEXT: ldr q0, [x0] 1139; CHECK-NEXT: ldr q0, [x0, #16] 1140; CHECK-NEXT: ldr q1, [x1] 1141; CHECK-NEXT: ldr q1, [x1, #16] 1142; CHECK-NEXT: mov z2.b, z0.b[15] 1143; CHECK-NEXT: mov z4.b, z0.b[14] 1144; CHECK-NEXT: mov z6.b, z0.b[13] 1145; CHECK-NEXT: mov z3.b, z1.b[15] 1146; CHECK-NEXT: mov z5.b, z1.b[14] 1147; CHECK-NEXT: mov z7.b, z1.b[13] 1148; CHECK-NEXT: mov z16.b, z0.b[12] 1149; CHECK-NEXT: mov z17.b, z1.b[12] 1150; CHECK-NEXT: mov z18.b, z0.b[11] 1151; CHECK-NEXT: mov z19.b, z1.b[11] 1152; CHECK-NEXT: mov z20.b, z0.b[10] 1153; CHECK-NEXT: mov z21.b, z1.b[10] 1154; CHECK-NEXT: mov z22.b, z0.b[9] 1155; CHECK-NEXT: mov z23.b, z1.b[9] 1156; CHECK-NEXT: mov z24.b, z0.b[8] 1157; CHECK-NEXT: mov z25.b, z1.b[8] 1158; CHECK-NEXT: zip1 z2.b, z2.b, z3.b 1159; CHECK-NEXT: zip1 z3.b, z4.b, z5.b 1160; CHECK-NEXT: zip1 z4.b, z6.b, z7.b 1161; CHECK-NEXT: zip1 z5.b, z16.b, z17.b 1162; CHECK-NEXT: zip1 z6.b, z18.b, z19.b 1163; CHECK-NEXT: zip1 z7.b, z20.b, z21.b 1164; CHECK-NEXT: zip1 z16.b, z22.b, z23.b 1165; CHECK-NEXT: zip1 z0.b, z0.b, z1.b 1166; CHECK-NEXT: zip1 z17.b, z24.b, z25.b 1167; CHECK-NEXT: zip1 z2.h, z3.h, z2.h 1168; CHECK-NEXT: zip1 z3.h, z5.h, z4.h 1169; CHECK-NEXT: zip1 z4.h, z7.h, z6.h 1170; CHECK-NEXT: str q0, [x0] 1171; CHECK-NEXT: zip1 z5.h, z17.h, z16.h 1172; CHECK-NEXT: zip1 z2.s, z3.s, z2.s 1173; CHECK-NEXT: zip1 z3.s, z5.s, z4.s 1174; CHECK-NEXT: zip1 z1.d, z3.d, z2.d 1175; CHECK-NEXT: str q1, [x0, #16] 1176; CHECK-NEXT: ret 1177; 1178; NONEON-NOSVE-LABEL: zip2_v32i8: 1179; NONEON-NOSVE: // %bb.0: 1180; NONEON-NOSVE-NEXT: sub sp, sp, #64 1181; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 64 1182; NONEON-NOSVE-NEXT: ldr q0, [x0] 1183; NONEON-NOSVE-NEXT: ldr q0, [x0, #16] 1184; NONEON-NOSVE-NEXT: ldr q1, [x1] 1185; NONEON-NOSVE-NEXT: ldr q1, [x1, #16] 1186; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #16] 1187; NONEON-NOSVE-NEXT: ldrb w8, [sp, #23] 1188; NONEON-NOSVE-NEXT: strb w8, [sp, #14] 1189; NONEON-NOSVE-NEXT: ldrb w8, [sp, #22] 1190; NONEON-NOSVE-NEXT: strb w8, [sp, #12] 1191; NONEON-NOSVE-NEXT: ldrb w8, [sp, #21] 1192; NONEON-NOSVE-NEXT: strb w8, [sp, #10] 1193; NONEON-NOSVE-NEXT: ldrb w8, [sp, #20] 1194; NONEON-NOSVE-NEXT: strb w8, [sp, #8] 1195; NONEON-NOSVE-NEXT: ldrb w8, [sp, #19] 1196; NONEON-NOSVE-NEXT: strb w8, [sp, #6] 1197; NONEON-NOSVE-NEXT: ldrb w8, [sp, #18] 1198; NONEON-NOSVE-NEXT: strb w8, [sp, #4] 1199; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17] 1200; NONEON-NOSVE-NEXT: strb w8, [sp, #2] 1201; NONEON-NOSVE-NEXT: ldrb w8, [sp, #16] 1202; NONEON-NOSVE-NEXT: strb w8, [sp] 1203; NONEON-NOSVE-NEXT: ldrb w8, [sp, #39] 1204; NONEON-NOSVE-NEXT: strb w8, [sp, #15] 1205; NONEON-NOSVE-NEXT: ldrb w8, [sp, #38] 1206; NONEON-NOSVE-NEXT: strb w8, [sp, #13] 1207; NONEON-NOSVE-NEXT: ldrb w8, [sp, #37] 1208; NONEON-NOSVE-NEXT: strb w8, [sp, #11] 1209; NONEON-NOSVE-NEXT: ldrb w8, [sp, #36] 1210; NONEON-NOSVE-NEXT: strb w8, [sp, #9] 1211; NONEON-NOSVE-NEXT: ldrb w8, [sp, #35] 1212; NONEON-NOSVE-NEXT: strb w8, [sp, #7] 1213; NONEON-NOSVE-NEXT: ldrb w8, [sp, #34] 1214; NONEON-NOSVE-NEXT: strb w8, [sp, #5] 1215; NONEON-NOSVE-NEXT: ldrb w8, [sp, #33] 1216; NONEON-NOSVE-NEXT: strb w8, [sp, #3] 1217; NONEON-NOSVE-NEXT: ldrb w8, [sp, #32] 1218; NONEON-NOSVE-NEXT: strb w8, [sp, #1] 1219; NONEON-NOSVE-NEXT: ldrb w8, [sp, #31] 1220; NONEON-NOSVE-NEXT: ldr q1, [sp] 1221; NONEON-NOSVE-NEXT: strb w8, [sp, #62] 1222; NONEON-NOSVE-NEXT: ldrb w8, [sp, #30] 1223; NONEON-NOSVE-NEXT: strb w8, [sp, #60] 1224; NONEON-NOSVE-NEXT: ldrb w8, [sp, #29] 1225; NONEON-NOSVE-NEXT: strb w8, [sp, #58] 1226; NONEON-NOSVE-NEXT: ldrb w8, [sp, #28] 1227; NONEON-NOSVE-NEXT: strb w8, [sp, #56] 1228; NONEON-NOSVE-NEXT: ldrb w8, [sp, #27] 1229; NONEON-NOSVE-NEXT: strb w8, [sp, #54] 1230; NONEON-NOSVE-NEXT: ldrb w8, [sp, #26] 1231; NONEON-NOSVE-NEXT: strb w8, [sp, #52] 1232; NONEON-NOSVE-NEXT: ldrb w8, [sp, #25] 1233; NONEON-NOSVE-NEXT: strb w8, [sp, #50] 1234; NONEON-NOSVE-NEXT: ldrb w8, [sp, #24] 1235; NONEON-NOSVE-NEXT: strb w8, [sp, #48] 1236; NONEON-NOSVE-NEXT: ldrb w8, [sp, #47] 1237; NONEON-NOSVE-NEXT: strb w8, [sp, #63] 1238; NONEON-NOSVE-NEXT: ldrb w8, [sp, #46] 1239; NONEON-NOSVE-NEXT: strb w8, [sp, #61] 1240; NONEON-NOSVE-NEXT: ldrb w8, [sp, #45] 1241; NONEON-NOSVE-NEXT: strb w8, [sp, #59] 1242; NONEON-NOSVE-NEXT: ldrb w8, [sp, #44] 1243; NONEON-NOSVE-NEXT: strb w8, [sp, #57] 1244; NONEON-NOSVE-NEXT: ldrb w8, [sp, #43] 1245; NONEON-NOSVE-NEXT: strb w8, [sp, #55] 1246; NONEON-NOSVE-NEXT: ldrb w8, [sp, #42] 1247; NONEON-NOSVE-NEXT: strb w8, [sp, #53] 1248; NONEON-NOSVE-NEXT: ldrb w8, [sp, #41] 1249; NONEON-NOSVE-NEXT: strb w8, [sp, #51] 1250; NONEON-NOSVE-NEXT: ldrb w8, [sp, #40] 1251; NONEON-NOSVE-NEXT: strb w8, [sp, #49] 1252; NONEON-NOSVE-NEXT: ldr q0, [sp, #48] 1253; NONEON-NOSVE-NEXT: str q0, [x0, #16] 1254; NONEON-NOSVE-NEXT: str q1, [x0] 1255; NONEON-NOSVE-NEXT: add sp, sp, #64 1256; NONEON-NOSVE-NEXT: ret 1257 %tmp1 = load volatile <32 x i8>, ptr %a 1258 %tmp2 = load volatile <32 x i8>, ptr %b 1259 %tmp3 = shufflevector <32 x i8> %tmp1, <32 x i8> %tmp2, <32 x i32> <i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55, i32 24, i32 56, i32 25, i32 57, i32 26, i32 58, i32 27, i32 59, i32 28, i32 60, i32 29, i32 61, i32 30, i32 62, i32 31, i32 63> 1260 store volatile <32 x i8> %tmp3, ptr %a 1261 ret void 1262} 1263 1264define void @zip2_v16i16(ptr %a, ptr %b) #0{ 1265; CHECK-LABEL: zip2_v16i16: 1266; CHECK: // %bb.0: 1267; CHECK-NEXT: ldr q0, [x0] 1268; CHECK-NEXT: ldr q0, [x0, #16] 1269; CHECK-NEXT: ldr q1, [x1] 1270; CHECK-NEXT: ldr q1, [x1, #16] 1271; CHECK-NEXT: mov z2.h, z0.h[7] 1272; CHECK-NEXT: mov z4.h, z0.h[6] 1273; CHECK-NEXT: mov z6.h, z0.h[5] 1274; CHECK-NEXT: mov z3.h, z1.h[7] 1275; CHECK-NEXT: mov z5.h, z1.h[6] 1276; CHECK-NEXT: mov z7.h, z1.h[5] 1277; CHECK-NEXT: mov z16.h, z0.h[4] 1278; CHECK-NEXT: mov z17.h, z1.h[4] 1279; CHECK-NEXT: zip1 z0.h, z0.h, z1.h 1280; CHECK-NEXT: zip1 z2.h, z2.h, z3.h 1281; CHECK-NEXT: zip1 z3.h, z4.h, z5.h 1282; CHECK-NEXT: zip1 z4.h, z6.h, z7.h 1283; CHECK-NEXT: zip1 z5.h, z16.h, z17.h 1284; CHECK-NEXT: str q0, [x0] 1285; CHECK-NEXT: zip1 z2.s, z3.s, z2.s 1286; CHECK-NEXT: zip1 z3.s, z5.s, z4.s 1287; CHECK-NEXT: zip1 z1.d, z3.d, z2.d 1288; CHECK-NEXT: str q1, [x0, #16] 1289; CHECK-NEXT: ret 1290; 1291; NONEON-NOSVE-LABEL: zip2_v16i16: 1292; NONEON-NOSVE: // %bb.0: 1293; NONEON-NOSVE-NEXT: sub sp, sp, #64 1294; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 64 1295; NONEON-NOSVE-NEXT: ldr q0, [x0] 1296; NONEON-NOSVE-NEXT: ldr q0, [x0, #16] 1297; NONEON-NOSVE-NEXT: ldr q1, [x1] 1298; NONEON-NOSVE-NEXT: ldr q1, [x1, #16] 1299; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #16] 1300; NONEON-NOSVE-NEXT: ldrh w8, [sp, #22] 1301; NONEON-NOSVE-NEXT: strh w8, [sp, #12] 1302; NONEON-NOSVE-NEXT: ldrh w8, [sp, #20] 1303; NONEON-NOSVE-NEXT: strh w8, [sp, #8] 1304; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18] 1305; NONEON-NOSVE-NEXT: strh w8, [sp, #4] 1306; NONEON-NOSVE-NEXT: ldrh w8, [sp, #16] 1307; NONEON-NOSVE-NEXT: strh w8, [sp] 1308; NONEON-NOSVE-NEXT: ldrh w8, [sp, #38] 1309; NONEON-NOSVE-NEXT: strh w8, [sp, #14] 1310; NONEON-NOSVE-NEXT: ldrh w8, [sp, #36] 1311; NONEON-NOSVE-NEXT: strh w8, [sp, #10] 1312; NONEON-NOSVE-NEXT: ldrh w8, [sp, #34] 1313; NONEON-NOSVE-NEXT: strh w8, [sp, #6] 1314; NONEON-NOSVE-NEXT: ldrh w8, [sp, #32] 1315; NONEON-NOSVE-NEXT: strh w8, [sp, #2] 1316; NONEON-NOSVE-NEXT: ldrh w8, [sp, #30] 1317; NONEON-NOSVE-NEXT: ldr q1, [sp] 1318; NONEON-NOSVE-NEXT: strh w8, [sp, #60] 1319; NONEON-NOSVE-NEXT: ldrh w8, [sp, #28] 1320; NONEON-NOSVE-NEXT: strh w8, [sp, #56] 1321; NONEON-NOSVE-NEXT: ldrh w8, [sp, #26] 1322; NONEON-NOSVE-NEXT: strh w8, [sp, #52] 1323; NONEON-NOSVE-NEXT: ldrh w8, [sp, #24] 1324; NONEON-NOSVE-NEXT: strh w8, [sp, #48] 1325; NONEON-NOSVE-NEXT: ldrh w8, [sp, #46] 1326; NONEON-NOSVE-NEXT: strh w8, [sp, #62] 1327; NONEON-NOSVE-NEXT: ldrh w8, [sp, #44] 1328; NONEON-NOSVE-NEXT: strh w8, [sp, #58] 1329; NONEON-NOSVE-NEXT: ldrh w8, [sp, #42] 1330; NONEON-NOSVE-NEXT: strh w8, [sp, #54] 1331; NONEON-NOSVE-NEXT: ldrh w8, [sp, #40] 1332; NONEON-NOSVE-NEXT: strh w8, [sp, #50] 1333; NONEON-NOSVE-NEXT: ldr q0, [sp, #48] 1334; NONEON-NOSVE-NEXT: str q0, [x0, #16] 1335; NONEON-NOSVE-NEXT: str q1, [x0] 1336; NONEON-NOSVE-NEXT: add sp, sp, #64 1337; NONEON-NOSVE-NEXT: ret 1338 %tmp1 = load volatile <16 x i16>, ptr %a 1339 %tmp2 = load volatile <16 x i16>, ptr %b 1340 %tmp3 = shufflevector <16 x i16> %tmp1, <16 x i16> %tmp2, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 1341 store volatile <16 x i16> %tmp3, ptr %a 1342 ret void 1343} 1344 1345define void @zip2_v8i32(ptr %a, ptr %b) #0{ 1346; CHECK-LABEL: zip2_v8i32: 1347; CHECK: // %bb.0: 1348; CHECK-NEXT: ldr q0, [x0] 1349; CHECK-NEXT: ldr q0, [x0, #16] 1350; CHECK-NEXT: ldr q1, [x1] 1351; CHECK-NEXT: ldr q1, [x1, #16] 1352; CHECK-NEXT: mov z2.s, z0.s[3] 1353; CHECK-NEXT: mov z4.s, z0.s[2] 1354; CHECK-NEXT: mov z3.s, z1.s[3] 1355; CHECK-NEXT: mov z5.s, z1.s[2] 1356; CHECK-NEXT: zip1 z0.s, z0.s, z1.s 1357; CHECK-NEXT: zip1 z2.s, z2.s, z3.s 1358; CHECK-NEXT: zip1 z3.s, z4.s, z5.s 1359; CHECK-NEXT: str q0, [x0] 1360; CHECK-NEXT: zip1 z1.d, z3.d, z2.d 1361; CHECK-NEXT: str q1, [x0, #16] 1362; CHECK-NEXT: ret 1363; 1364; NONEON-NOSVE-LABEL: zip2_v8i32: 1365; NONEON-NOSVE: // %bb.0: 1366; NONEON-NOSVE-NEXT: sub sp, sp, #64 1367; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 64 1368; NONEON-NOSVE-NEXT: ldr q0, [x0] 1369; NONEON-NOSVE-NEXT: ldr q0, [x0, #16] 1370; NONEON-NOSVE-NEXT: ldr q1, [x1] 1371; NONEON-NOSVE-NEXT: ldr q1, [x1, #16] 1372; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #16] 1373; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #16] 1374; NONEON-NOSVE-NEXT: ldp w8, w11, [sp, #32] 1375; NONEON-NOSVE-NEXT: stp w9, w11, [sp, #8] 1376; NONEON-NOSVE-NEXT: stp w10, w8, [sp] 1377; NONEON-NOSVE-NEXT: ldp w10, w9, [sp, #24] 1378; NONEON-NOSVE-NEXT: ldp w8, w11, [sp, #40] 1379; NONEON-NOSVE-NEXT: ldr q1, [sp] 1380; NONEON-NOSVE-NEXT: stp w9, w11, [sp, #56] 1381; NONEON-NOSVE-NEXT: stp w10, w8, [sp, #48] 1382; NONEON-NOSVE-NEXT: ldr q0, [sp, #48] 1383; NONEON-NOSVE-NEXT: str q0, [x0, #16] 1384; NONEON-NOSVE-NEXT: str q1, [x0] 1385; NONEON-NOSVE-NEXT: add sp, sp, #64 1386; NONEON-NOSVE-NEXT: ret 1387 %tmp1 = load volatile <8 x i32>, ptr %a 1388 %tmp2 = load volatile <8 x i32>, ptr %b 1389 %tmp3 = shufflevector <8 x i32> %tmp1, <8 x i32> %tmp2, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1390 store volatile <8 x i32> %tmp3, ptr %a 1391 ret void 1392} 1393 1394define void @zip2_v8i32_undef(ptr %a) #0{ 1395; CHECK-LABEL: zip2_v8i32_undef: 1396; CHECK: // %bb.0: 1397; CHECK-NEXT: adrp x8, .LCPI17_0 1398; CHECK-NEXT: ldr q0, [x0] 1399; CHECK-NEXT: ldr q0, [x0, #16] 1400; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI17_0] 1401; CHECK-NEXT: tbl z1.s, { z0.s }, z1.s 1402; CHECK-NEXT: zip1 z0.s, z0.s, z0.s 1403; CHECK-NEXT: str q1, [x0, #16] 1404; CHECK-NEXT: str q0, [x0] 1405; CHECK-NEXT: ret 1406; 1407; NONEON-NOSVE-LABEL: zip2_v8i32_undef: 1408; NONEON-NOSVE: // %bb.0: 1409; NONEON-NOSVE-NEXT: sub sp, sp, #48 1410; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48 1411; NONEON-NOSVE-NEXT: ldr q0, [x0] 1412; NONEON-NOSVE-NEXT: ldr q0, [x0, #16] 1413; NONEON-NOSVE-NEXT: str q0, [sp, #16] 1414; NONEON-NOSVE-NEXT: ldp w8, w9, [sp, #16] 1415; NONEON-NOSVE-NEXT: stp w8, w8, [sp] 1416; NONEON-NOSVE-NEXT: ldp w8, w10, [sp, #24] 1417; NONEON-NOSVE-NEXT: stp w9, w9, [sp, #8] 1418; NONEON-NOSVE-NEXT: ldr q1, [sp] 1419; NONEON-NOSVE-NEXT: stp w10, w10, [sp, #40] 1420; NONEON-NOSVE-NEXT: stp w8, w8, [sp, #32] 1421; NONEON-NOSVE-NEXT: ldr q0, [sp, #32] 1422; NONEON-NOSVE-NEXT: str q0, [x0, #16] 1423; NONEON-NOSVE-NEXT: str q1, [x0] 1424; NONEON-NOSVE-NEXT: add sp, sp, #48 1425; NONEON-NOSVE-NEXT: ret 1426 %tmp1 = load volatile <8 x i32>, ptr %a 1427 %tmp2 = shufflevector <8 x i32> %tmp1, <8 x i32> undef, <8 x i32> <i32 4, i32 4, i32 5, i32 5, i32 6, i32 6, i32 7, i32 7> 1428 store volatile <8 x i32> %tmp2, ptr %a 1429 ret void 1430} 1431 1432define void @uzp_v32i8(ptr %a, ptr %b) #0{ 1433; CHECK-LABEL: uzp_v32i8: 1434; CHECK: // %bb.0: 1435; CHECK-NEXT: stp d13, d12, [sp, #-48]! // 16-byte Folded Spill 1436; CHECK-NEXT: stp d11, d10, [sp, #16] // 16-byte Folded Spill 1437; CHECK-NEXT: stp d9, d8, [sp, #32] // 16-byte Folded Spill 1438; CHECK-NEXT: .cfi_def_cfa_offset 48 1439; CHECK-NEXT: .cfi_offset b8, -8 1440; CHECK-NEXT: .cfi_offset b9, -16 1441; CHECK-NEXT: .cfi_offset b10, -24 1442; CHECK-NEXT: .cfi_offset b11, -32 1443; CHECK-NEXT: .cfi_offset b12, -40 1444; CHECK-NEXT: .cfi_offset b13, -48 1445; CHECK-NEXT: ldp q0, q1, [x0] 1446; CHECK-NEXT: mov z2.b, z1.b[14] 1447; CHECK-NEXT: mov z3.b, z1.b[12] 1448; CHECK-NEXT: mov z4.b, z1.b[10] 1449; CHECK-NEXT: mov z5.b, z1.b[8] 1450; CHECK-NEXT: mov z6.b, z1.b[6] 1451; CHECK-NEXT: mov z7.b, z1.b[4] 1452; CHECK-NEXT: mov z16.b, z1.b[2] 1453; CHECK-NEXT: mov z18.b, z0.b[14] 1454; CHECK-NEXT: mov z19.b, z0.b[12] 1455; CHECK-NEXT: zip1 z3.b, z3.b, z2.b 1456; CHECK-NEXT: ldp q2, q17, [x1] 1457; CHECK-NEXT: mov z20.b, z0.b[10] 1458; CHECK-NEXT: zip1 z4.b, z5.b, z4.b 1459; CHECK-NEXT: zip1 z5.b, z7.b, z6.b 1460; CHECK-NEXT: zip1 z6.b, z1.b, z16.b 1461; CHECK-NEXT: mov z7.b, z0.b[8] 1462; CHECK-NEXT: mov z16.b, z0.b[6] 1463; CHECK-NEXT: mov z21.b, z0.b[4] 1464; CHECK-NEXT: mov z22.b, z0.b[2] 1465; CHECK-NEXT: mov z23.b, z17.b[14] 1466; CHECK-NEXT: mov z24.b, z17.b[12] 1467; CHECK-NEXT: mov z25.b, z17.b[10] 1468; CHECK-NEXT: mov z26.b, z17.b[8] 1469; CHECK-NEXT: mov z27.b, z17.b[6] 1470; CHECK-NEXT: mov z28.b, z17.b[4] 1471; CHECK-NEXT: mov z29.b, z17.b[2] 1472; CHECK-NEXT: zip1 z18.b, z19.b, z18.b 1473; CHECK-NEXT: zip1 z7.b, z7.b, z20.b 1474; CHECK-NEXT: zip1 z16.b, z21.b, z16.b 1475; CHECK-NEXT: zip1 z19.b, z0.b, z22.b 1476; CHECK-NEXT: zip1 z20.b, z24.b, z23.b 1477; CHECK-NEXT: zip1 z21.b, z26.b, z25.b 1478; CHECK-NEXT: zip1 z22.b, z28.b, z27.b 1479; CHECK-NEXT: mov z24.b, z2.b[14] 1480; CHECK-NEXT: mov z25.b, z2.b[12] 1481; CHECK-NEXT: mov z26.b, z2.b[10] 1482; CHECK-NEXT: mov z27.b, z2.b[8] 1483; CHECK-NEXT: zip1 z23.b, z17.b, z29.b 1484; CHECK-NEXT: zip1 z3.h, z4.h, z3.h 1485; CHECK-NEXT: zip1 z4.h, z6.h, z5.h 1486; CHECK-NEXT: zip1 z5.h, z7.h, z18.h 1487; CHECK-NEXT: zip1 z6.h, z19.h, z16.h 1488; CHECK-NEXT: zip1 z7.h, z21.h, z20.h 1489; CHECK-NEXT: zip1 z18.b, z25.b, z24.b 1490; CHECK-NEXT: zip1 z19.b, z27.b, z26.b 1491; CHECK-NEXT: mov z20.b, z2.b[6] 1492; CHECK-NEXT: mov z21.b, z2.b[4] 1493; CHECK-NEXT: mov z29.b, z17.b[3] 1494; CHECK-NEXT: mov z30.b, z17.b[1] 1495; CHECK-NEXT: mov z31.b, z2.b[15] 1496; CHECK-NEXT: mov z8.b, z2.b[13] 1497; CHECK-NEXT: zip1 z16.h, z23.h, z22.h 1498; CHECK-NEXT: mov z22.b, z2.b[2] 1499; CHECK-NEXT: mov z23.b, z17.b[15] 1500; CHECK-NEXT: mov z24.b, z17.b[13] 1501; CHECK-NEXT: mov z25.b, z17.b[11] 1502; CHECK-NEXT: mov z26.b, z17.b[9] 1503; CHECK-NEXT: mov z27.b, z17.b[7] 1504; CHECK-NEXT: mov z28.b, z17.b[5] 1505; CHECK-NEXT: zip1 z17.h, z19.h, z18.h 1506; CHECK-NEXT: zip1 z21.b, z21.b, z20.b 1507; CHECK-NEXT: zip1 z19.b, z30.b, z29.b 1508; CHECK-NEXT: zip1 z20.b, z8.b, z31.b 1509; CHECK-NEXT: mov z29.b, z1.b[15] 1510; CHECK-NEXT: mov z30.b, z1.b[13] 1511; CHECK-NEXT: mov z31.b, z1.b[11] 1512; CHECK-NEXT: mov z8.b, z1.b[9] 1513; CHECK-NEXT: zip1 z22.b, z2.b, z22.b 1514; CHECK-NEXT: zip1 z23.b, z24.b, z23.b 1515; CHECK-NEXT: zip1 z24.b, z26.b, z25.b 1516; CHECK-NEXT: zip1 z18.b, z28.b, z27.b 1517; CHECK-NEXT: mov z25.b, z2.b[11] 1518; CHECK-NEXT: mov z26.b, z2.b[9] 1519; CHECK-NEXT: mov z27.b, z2.b[7] 1520; CHECK-NEXT: mov z28.b, z2.b[5] 1521; CHECK-NEXT: mov z9.b, z1.b[7] 1522; CHECK-NEXT: mov z10.b, z1.b[5] 1523; CHECK-NEXT: mov z1.b, z1.b[3] 1524; CHECK-NEXT: mov z11.b, z0.b[11] 1525; CHECK-NEXT: mov z12.b, z0.b[9] 1526; CHECK-NEXT: zip1 z29.b, z30.b, z29.b 1527; CHECK-NEXT: mov z30.b, z0.b[3] 1528; CHECK-NEXT: mov z13.b, z0.b[1] 1529; CHECK-NEXT: zip1 z31.b, z8.b, z31.b 1530; CHECK-NEXT: mov z8.b, z2.b[3] 1531; CHECK-NEXT: mov z2.b, z2.b[1] 1532; CHECK-NEXT: zip1 z9.b, z10.b, z9.b 1533; CHECK-NEXT: zip1 z10.b, z12.b, z11.b 1534; CHECK-NEXT: zip1 z1.b, z0.b, z1.b 1535; CHECK-NEXT: zip1 z30.b, z13.b, z30.b 1536; CHECK-NEXT: mov z11.b, z0.b[13] 1537; CHECK-NEXT: mov z0.b, z0.b[5] 1538; CHECK-NEXT: zip1 z25.b, z26.b, z25.b 1539; CHECK-NEXT: zip1 z26.b, z28.b, z27.b 1540; CHECK-NEXT: zip1 z2.b, z2.b, z8.b 1541; CHECK-NEXT: zip1 z21.h, z22.h, z21.h 1542; CHECK-NEXT: zip1 z22.h, z24.h, z23.h 1543; CHECK-NEXT: zip1 z23.h, z31.h, z29.h 1544; CHECK-NEXT: zip1 z1.h, z1.h, z9.h 1545; CHECK-NEXT: ldp d9, d8, [sp, #32] // 16-byte Folded Reload 1546; CHECK-NEXT: zip1 z24.h, z10.h, z11.h 1547; CHECK-NEXT: ldp d11, d10, [sp, #16] // 16-byte Folded Reload 1548; CHECK-NEXT: zip1 z0.h, z30.h, z0.h 1549; CHECK-NEXT: zip1 z18.h, z19.h, z18.h 1550; CHECK-NEXT: zip1 z19.h, z25.h, z20.h 1551; CHECK-NEXT: zip1 z2.h, z2.h, z26.h 1552; CHECK-NEXT: zip1 z3.s, z4.s, z3.s 1553; CHECK-NEXT: zip1 z4.s, z6.s, z5.s 1554; CHECK-NEXT: zip1 z5.s, z16.s, z7.s 1555; CHECK-NEXT: zip1 z1.s, z1.s, z23.s 1556; CHECK-NEXT: zip1 z6.s, z21.s, z17.s 1557; CHECK-NEXT: zip1 z0.s, z0.s, z24.s 1558; CHECK-NEXT: zip1 z7.s, z18.s, z22.s 1559; CHECK-NEXT: zip1 z2.s, z2.s, z19.s 1560; CHECK-NEXT: zip1 z3.d, z4.d, z3.d 1561; CHECK-NEXT: zip1 z0.d, z0.d, z1.d 1562; CHECK-NEXT: zip1 z1.d, z6.d, z5.d 1563; CHECK-NEXT: zip1 z2.d, z2.d, z7.d 1564; CHECK-NEXT: add z0.b, z3.b, z0.b 1565; CHECK-NEXT: add z1.b, z1.b, z2.b 1566; CHECK-NEXT: stp q0, q1, [x0] 1567; CHECK-NEXT: ldp d13, d12, [sp], #48 // 16-byte Folded Reload 1568; CHECK-NEXT: ret 1569; 1570; NONEON-NOSVE-LABEL: uzp_v32i8: 1571; NONEON-NOSVE: // %bb.0: 1572; NONEON-NOSVE-NEXT: sub sp, sp, #96 1573; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96 1574; NONEON-NOSVE-NEXT: ldp q1, q0, [x1] 1575; NONEON-NOSVE-NEXT: ldp q2, q3, [x0] 1576; NONEON-NOSVE-NEXT: stp q2, q1, [sp] 1577; NONEON-NOSVE-NEXT: stp q3, q0, [sp, #32] 1578; NONEON-NOSVE-NEXT: ldrb w8, [sp, #63] 1579; NONEON-NOSVE-NEXT: ldrb w9, [sp, #62] 1580; NONEON-NOSVE-NEXT: add w8, w9, w8 1581; NONEON-NOSVE-NEXT: ldrb w9, [sp, #60] 1582; NONEON-NOSVE-NEXT: strb w8, [sp, #95] 1583; NONEON-NOSVE-NEXT: ldrb w8, [sp, #61] 1584; NONEON-NOSVE-NEXT: add w8, w9, w8 1585; NONEON-NOSVE-NEXT: ldrb w9, [sp, #58] 1586; NONEON-NOSVE-NEXT: strb w8, [sp, #94] 1587; NONEON-NOSVE-NEXT: ldrb w8, [sp, #59] 1588; NONEON-NOSVE-NEXT: add w8, w9, w8 1589; NONEON-NOSVE-NEXT: ldrb w9, [sp, #56] 1590; NONEON-NOSVE-NEXT: strb w8, [sp, #93] 1591; NONEON-NOSVE-NEXT: ldrb w8, [sp, #57] 1592; NONEON-NOSVE-NEXT: add w8, w9, w8 1593; NONEON-NOSVE-NEXT: ldrb w9, [sp, #54] 1594; NONEON-NOSVE-NEXT: strb w8, [sp, #92] 1595; NONEON-NOSVE-NEXT: ldrb w8, [sp, #55] 1596; NONEON-NOSVE-NEXT: add w8, w9, w8 1597; NONEON-NOSVE-NEXT: ldrb w9, [sp, #52] 1598; NONEON-NOSVE-NEXT: strb w8, [sp, #91] 1599; NONEON-NOSVE-NEXT: ldrb w8, [sp, #53] 1600; NONEON-NOSVE-NEXT: add w8, w9, w8 1601; NONEON-NOSVE-NEXT: ldrb w9, [sp, #50] 1602; NONEON-NOSVE-NEXT: strb w8, [sp, #90] 1603; NONEON-NOSVE-NEXT: ldrb w8, [sp, #51] 1604; NONEON-NOSVE-NEXT: add w8, w9, w8 1605; NONEON-NOSVE-NEXT: ldrb w9, [sp, #48] 1606; NONEON-NOSVE-NEXT: strb w8, [sp, #89] 1607; NONEON-NOSVE-NEXT: ldrb w8, [sp, #49] 1608; NONEON-NOSVE-NEXT: add w8, w9, w8 1609; NONEON-NOSVE-NEXT: ldrb w9, [sp, #30] 1610; NONEON-NOSVE-NEXT: strb w8, [sp, #88] 1611; NONEON-NOSVE-NEXT: ldrb w8, [sp, #31] 1612; NONEON-NOSVE-NEXT: add w8, w9, w8 1613; NONEON-NOSVE-NEXT: ldrb w9, [sp, #28] 1614; NONEON-NOSVE-NEXT: strb w8, [sp, #87] 1615; NONEON-NOSVE-NEXT: ldrb w8, [sp, #29] 1616; NONEON-NOSVE-NEXT: add w8, w9, w8 1617; NONEON-NOSVE-NEXT: ldrb w9, [sp, #26] 1618; NONEON-NOSVE-NEXT: strb w8, [sp, #86] 1619; NONEON-NOSVE-NEXT: ldrb w8, [sp, #27] 1620; NONEON-NOSVE-NEXT: add w8, w9, w8 1621; NONEON-NOSVE-NEXT: ldrb w9, [sp, #24] 1622; NONEON-NOSVE-NEXT: strb w8, [sp, #85] 1623; NONEON-NOSVE-NEXT: ldrb w8, [sp, #25] 1624; NONEON-NOSVE-NEXT: add w8, w9, w8 1625; NONEON-NOSVE-NEXT: ldrb w9, [sp, #22] 1626; NONEON-NOSVE-NEXT: strb w8, [sp, #84] 1627; NONEON-NOSVE-NEXT: ldrb w8, [sp, #23] 1628; NONEON-NOSVE-NEXT: add w8, w9, w8 1629; NONEON-NOSVE-NEXT: ldrb w9, [sp, #20] 1630; NONEON-NOSVE-NEXT: strb w8, [sp, #83] 1631; NONEON-NOSVE-NEXT: ldrb w8, [sp, #21] 1632; NONEON-NOSVE-NEXT: add w8, w9, w8 1633; NONEON-NOSVE-NEXT: ldrb w9, [sp, #18] 1634; NONEON-NOSVE-NEXT: strb w8, [sp, #82] 1635; NONEON-NOSVE-NEXT: ldrb w8, [sp, #19] 1636; NONEON-NOSVE-NEXT: add w8, w9, w8 1637; NONEON-NOSVE-NEXT: ldrb w9, [sp, #16] 1638; NONEON-NOSVE-NEXT: strb w8, [sp, #81] 1639; NONEON-NOSVE-NEXT: ldrb w8, [sp, #17] 1640; NONEON-NOSVE-NEXT: add w8, w9, w8 1641; NONEON-NOSVE-NEXT: ldrb w9, [sp, #46] 1642; NONEON-NOSVE-NEXT: strb w8, [sp, #80] 1643; NONEON-NOSVE-NEXT: ldrb w8, [sp, #47] 1644; NONEON-NOSVE-NEXT: add w8, w9, w8 1645; NONEON-NOSVE-NEXT: ldrb w9, [sp, #44] 1646; NONEON-NOSVE-NEXT: strb w8, [sp, #79] 1647; NONEON-NOSVE-NEXT: ldrb w8, [sp, #45] 1648; NONEON-NOSVE-NEXT: add w8, w9, w8 1649; NONEON-NOSVE-NEXT: ldrb w9, [sp, #42] 1650; NONEON-NOSVE-NEXT: strb w8, [sp, #78] 1651; NONEON-NOSVE-NEXT: ldrb w8, [sp, #43] 1652; NONEON-NOSVE-NEXT: add w8, w9, w8 1653; NONEON-NOSVE-NEXT: ldrb w9, [sp, #40] 1654; NONEON-NOSVE-NEXT: strb w8, [sp, #77] 1655; NONEON-NOSVE-NEXT: ldrb w8, [sp, #41] 1656; NONEON-NOSVE-NEXT: add w8, w9, w8 1657; NONEON-NOSVE-NEXT: ldrb w9, [sp, #38] 1658; NONEON-NOSVE-NEXT: strb w8, [sp, #76] 1659; NONEON-NOSVE-NEXT: ldrb w8, [sp, #39] 1660; NONEON-NOSVE-NEXT: add w8, w9, w8 1661; NONEON-NOSVE-NEXT: ldrb w9, [sp, #36] 1662; NONEON-NOSVE-NEXT: strb w8, [sp, #75] 1663; NONEON-NOSVE-NEXT: ldrb w8, [sp, #37] 1664; NONEON-NOSVE-NEXT: add w8, w9, w8 1665; NONEON-NOSVE-NEXT: ldrb w9, [sp, #34] 1666; NONEON-NOSVE-NEXT: strb w8, [sp, #74] 1667; NONEON-NOSVE-NEXT: ldrb w8, [sp, #35] 1668; NONEON-NOSVE-NEXT: add w8, w9, w8 1669; NONEON-NOSVE-NEXT: ldrb w9, [sp, #12] 1670; NONEON-NOSVE-NEXT: strb w8, [sp, #73] 1671; NONEON-NOSVE-NEXT: ldrb w8, [sp, #13] 1672; NONEON-NOSVE-NEXT: add w8, w9, w8 1673; NONEON-NOSVE-NEXT: ldrb w9, [sp, #10] 1674; NONEON-NOSVE-NEXT: strb w8, [sp, #70] 1675; NONEON-NOSVE-NEXT: ldrb w8, [sp, #11] 1676; NONEON-NOSVE-NEXT: add w8, w9, w8 1677; NONEON-NOSVE-NEXT: ldrb w9, [sp, #8] 1678; NONEON-NOSVE-NEXT: strb w8, [sp, #69] 1679; NONEON-NOSVE-NEXT: ldrb w8, [sp, #9] 1680; NONEON-NOSVE-NEXT: add w8, w9, w8 1681; NONEON-NOSVE-NEXT: ldrb w9, [sp, #4] 1682; NONEON-NOSVE-NEXT: strb w8, [sp, #68] 1683; NONEON-NOSVE-NEXT: ldrb w8, [sp, #5] 1684; NONEON-NOSVE-NEXT: add w8, w9, w8 1685; NONEON-NOSVE-NEXT: ldrb w9, [sp, #2] 1686; NONEON-NOSVE-NEXT: strb w8, [sp, #66] 1687; NONEON-NOSVE-NEXT: ldrb w8, [sp, #3] 1688; NONEON-NOSVE-NEXT: add w8, w9, w8 1689; NONEON-NOSVE-NEXT: ldrb w9, [sp] 1690; NONEON-NOSVE-NEXT: strb w8, [sp, #65] 1691; NONEON-NOSVE-NEXT: ldrb w8, [sp, #1] 1692; NONEON-NOSVE-NEXT: add w8, w9, w8 1693; NONEON-NOSVE-NEXT: strb w8, [sp, #64] 1694; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64] 1695; NONEON-NOSVE-NEXT: stp q0, q1, [x0] 1696; NONEON-NOSVE-NEXT: add sp, sp, #96 1697; NONEON-NOSVE-NEXT: ret 1698 %tmp1 = load <32 x i8>, ptr %a 1699 %tmp2 = load <32 x i8>, ptr %b 1700 %tmp3 = shufflevector <32 x i8> %tmp1, <32 x i8> %tmp2, <32 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30, i32 32, i32 34, i32 36, i32 38, i32 40, i32 42, i32 44, i32 46, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 62> 1701 %tmp4 = shufflevector <32 x i8> %tmp1, <32 x i8> %tmp2, <32 x i32> <i32 1, i32 3, i32 5, i32 undef, i32 9, i32 11, i32 13, i32 undef, i32 undef, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31, i32 33, i32 35, i32 37, i32 39, i32 41, i32 43, i32 45, i32 47, i32 49, i32 51, i32 53, i32 55, i32 57, i32 59, i32 61, i32 63> 1702 %tmp5 = add <32 x i8> %tmp3, %tmp4 1703 store <32 x i8> %tmp5, ptr %a 1704 ret void 1705} 1706 1707define void @uzp_v4i16(ptr %a, ptr %b) #0{ 1708; CHECK-LABEL: uzp_v4i16: 1709; CHECK: // %bb.0: 1710; CHECK-NEXT: adrp x8, .LCPI19_0 1711; CHECK-NEXT: adrp x9, .LCPI19_1 1712; CHECK-NEXT: ldr d0, [x0] 1713; CHECK-NEXT: ldr q1, [x8, :lo12:.LCPI19_0] 1714; CHECK-NEXT: ldr q2, [x9, :lo12:.LCPI19_1] 1715; CHECK-NEXT: tbl z1.h, { z0.h }, z1.h 1716; CHECK-NEXT: tbl z0.h, { z0.h }, z2.h 1717; CHECK-NEXT: add z0.h, z1.h, z0.h 1718; CHECK-NEXT: str d0, [x0] 1719; CHECK-NEXT: ret 1720; 1721; NONEON-NOSVE-LABEL: uzp_v4i16: 1722; NONEON-NOSVE: // %bb.0: 1723; NONEON-NOSVE-NEXT: ldr d0, [x0] 1724; NONEON-NOSVE-NEXT: str d0, [sp, #-16]! 1725; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 16 1726; NONEON-NOSVE-NEXT: ldrh w8, [sp, #4] 1727; NONEON-NOSVE-NEXT: ldrh w9, [sp, #6] 1728; NONEON-NOSVE-NEXT: add w8, w8, w8 1729; NONEON-NOSVE-NEXT: strh w8, [sp, #12] 1730; NONEON-NOSVE-NEXT: ldrh w8, [sp] 1731; NONEON-NOSVE-NEXT: add w9, w9, w8 1732; NONEON-NOSVE-NEXT: strh w9, [sp, #10] 1733; NONEON-NOSVE-NEXT: ldrh w9, [sp, #2] 1734; NONEON-NOSVE-NEXT: add w8, w8, w9 1735; NONEON-NOSVE-NEXT: strh w8, [sp, #8] 1736; NONEON-NOSVE-NEXT: ldr d0, [sp, #8] 1737; NONEON-NOSVE-NEXT: str d0, [x0] 1738; NONEON-NOSVE-NEXT: add sp, sp, #16 1739; NONEON-NOSVE-NEXT: ret 1740 %tmp1 = load <4 x i16>, ptr %a 1741 %tmp2 = load <4 x i16>, ptr %b 1742 %tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 0, i32 3, i32 2, i32 1> 1743 %tmp4 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <4 x i32> <i32 1, i32 0, i32 2, i32 undef> 1744 %tmp5 = add <4 x i16> %tmp3, %tmp4 1745 store <4 x i16> %tmp5, ptr %a 1746 ret void 1747} 1748 1749define void @uzp_v16i16(ptr %a, ptr %b) #0{ 1750; CHECK-LABEL: uzp_v16i16: 1751; CHECK: // %bb.0: 1752; CHECK-NEXT: str d8, [sp, #-16]! // 8-byte Folded Spill 1753; CHECK-NEXT: .cfi_def_cfa_offset 16 1754; CHECK-NEXT: .cfi_offset b8, -16 1755; CHECK-NEXT: ldp q1, q6, [x0] 1756; CHECK-NEXT: ldp q0, q2, [x1] 1757; CHECK-NEXT: mov z3.h, z6.h[6] 1758; CHECK-NEXT: mov z4.h, z6.h[4] 1759; CHECK-NEXT: mov z5.h, z6.h[2] 1760; CHECK-NEXT: mov z7.h, z1.h[6] 1761; CHECK-NEXT: mov z16.h, z1.h[4] 1762; CHECK-NEXT: mov z17.h, z1.h[2] 1763; CHECK-NEXT: mov z18.h, z2.h[6] 1764; CHECK-NEXT: mov z19.h, z2.h[4] 1765; CHECK-NEXT: mov z20.h, z2.h[2] 1766; CHECK-NEXT: mov z21.h, z0.h[6] 1767; CHECK-NEXT: mov z22.h, z0.h[4] 1768; CHECK-NEXT: zip1 z3.h, z4.h, z3.h 1769; CHECK-NEXT: zip1 z4.h, z6.h, z5.h 1770; CHECK-NEXT: zip1 z5.h, z16.h, z7.h 1771; CHECK-NEXT: zip1 z7.h, z1.h, z17.h 1772; CHECK-NEXT: zip1 z16.h, z19.h, z18.h 1773; CHECK-NEXT: zip1 z18.h, z2.h, z20.h 1774; CHECK-NEXT: mov z19.h, z0.h[2] 1775; CHECK-NEXT: zip1 z17.h, z22.h, z21.h 1776; CHECK-NEXT: mov z20.h, z6.h[7] 1777; CHECK-NEXT: mov z21.h, z6.h[5] 1778; CHECK-NEXT: mov z22.h, z6.h[3] 1779; CHECK-NEXT: mov z6.h, z6.h[1] 1780; CHECK-NEXT: mov z23.h, z1.h[7] 1781; CHECK-NEXT: mov z24.h, z1.h[5] 1782; CHECK-NEXT: mov z25.h, z1.h[3] 1783; CHECK-NEXT: mov z1.h, z1.h[1] 1784; CHECK-NEXT: mov z26.h, z2.h[7] 1785; CHECK-NEXT: mov z27.h, z2.h[5] 1786; CHECK-NEXT: mov z28.h, z2.h[3] 1787; CHECK-NEXT: mov z2.h, z2.h[1] 1788; CHECK-NEXT: mov z29.h, z0.h[7] 1789; CHECK-NEXT: mov z30.h, z0.h[5] 1790; CHECK-NEXT: mov z31.h, z0.h[3] 1791; CHECK-NEXT: mov z8.h, z0.h[1] 1792; CHECK-NEXT: zip1 z0.h, z0.h, z19.h 1793; CHECK-NEXT: zip1 z19.h, z21.h, z20.h 1794; CHECK-NEXT: zip1 z6.h, z6.h, z22.h 1795; CHECK-NEXT: zip1 z20.h, z24.h, z23.h 1796; CHECK-NEXT: zip1 z1.h, z1.h, z25.h 1797; CHECK-NEXT: zip1 z21.h, z27.h, z26.h 1798; CHECK-NEXT: zip1 z2.h, z2.h, z28.h 1799; CHECK-NEXT: zip1 z22.h, z30.h, z29.h 1800; CHECK-NEXT: zip1 z23.h, z8.h, z31.h 1801; CHECK-NEXT: zip1 z3.s, z4.s, z3.s 1802; CHECK-NEXT: zip1 z4.s, z7.s, z5.s 1803; CHECK-NEXT: zip1 z5.s, z18.s, z16.s 1804; CHECK-NEXT: zip1 z6.s, z6.s, z19.s 1805; CHECK-NEXT: zip1 z1.s, z1.s, z20.s 1806; CHECK-NEXT: zip1 z0.s, z0.s, z17.s 1807; CHECK-NEXT: zip1 z2.s, z2.s, z21.s 1808; CHECK-NEXT: zip1 z7.s, z23.s, z22.s 1809; CHECK-NEXT: zip1 z3.d, z4.d, z3.d 1810; CHECK-NEXT: zip1 z1.d, z1.d, z6.d 1811; CHECK-NEXT: zip1 z0.d, z0.d, z5.d 1812; CHECK-NEXT: zip1 z2.d, z7.d, z2.d 1813; CHECK-NEXT: add z1.h, z3.h, z1.h 1814; CHECK-NEXT: add z0.h, z0.h, z2.h 1815; CHECK-NEXT: stp q1, q0, [x0] 1816; CHECK-NEXT: ldr d8, [sp], #16 // 8-byte Folded Reload 1817; CHECK-NEXT: ret 1818; 1819; NONEON-NOSVE-LABEL: uzp_v16i16: 1820; NONEON-NOSVE: // %bb.0: 1821; NONEON-NOSVE-NEXT: sub sp, sp, #96 1822; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96 1823; NONEON-NOSVE-NEXT: ldp q1, q0, [x1] 1824; NONEON-NOSVE-NEXT: ldp q2, q3, [x0] 1825; NONEON-NOSVE-NEXT: stp q2, q1, [sp] 1826; NONEON-NOSVE-NEXT: stp q3, q0, [sp, #32] 1827; NONEON-NOSVE-NEXT: ldrh w8, [sp, #62] 1828; NONEON-NOSVE-NEXT: ldrh w9, [sp, #60] 1829; NONEON-NOSVE-NEXT: add w8, w9, w8 1830; NONEON-NOSVE-NEXT: ldrh w9, [sp, #56] 1831; NONEON-NOSVE-NEXT: strh w8, [sp, #94] 1832; NONEON-NOSVE-NEXT: ldrh w8, [sp, #58] 1833; NONEON-NOSVE-NEXT: add w8, w9, w8 1834; NONEON-NOSVE-NEXT: ldrh w9, [sp, #52] 1835; NONEON-NOSVE-NEXT: strh w8, [sp, #92] 1836; NONEON-NOSVE-NEXT: ldrh w8, [sp, #54] 1837; NONEON-NOSVE-NEXT: add w8, w9, w8 1838; NONEON-NOSVE-NEXT: ldrh w9, [sp, #48] 1839; NONEON-NOSVE-NEXT: strh w8, [sp, #90] 1840; NONEON-NOSVE-NEXT: ldrh w8, [sp, #50] 1841; NONEON-NOSVE-NEXT: add w8, w9, w8 1842; NONEON-NOSVE-NEXT: ldrh w9, [sp, #28] 1843; NONEON-NOSVE-NEXT: strh w8, [sp, #88] 1844; NONEON-NOSVE-NEXT: ldrh w8, [sp, #30] 1845; NONEON-NOSVE-NEXT: add w8, w9, w8 1846; NONEON-NOSVE-NEXT: ldrh w9, [sp, #24] 1847; NONEON-NOSVE-NEXT: strh w8, [sp, #86] 1848; NONEON-NOSVE-NEXT: ldrh w8, [sp, #26] 1849; NONEON-NOSVE-NEXT: add w8, w9, w8 1850; NONEON-NOSVE-NEXT: ldrh w9, [sp, #20] 1851; NONEON-NOSVE-NEXT: strh w8, [sp, #84] 1852; NONEON-NOSVE-NEXT: ldrh w8, [sp, #22] 1853; NONEON-NOSVE-NEXT: add w8, w9, w8 1854; NONEON-NOSVE-NEXT: ldrh w9, [sp, #16] 1855; NONEON-NOSVE-NEXT: strh w8, [sp, #82] 1856; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18] 1857; NONEON-NOSVE-NEXT: add w8, w9, w8 1858; NONEON-NOSVE-NEXT: ldrh w9, [sp, #44] 1859; NONEON-NOSVE-NEXT: strh w8, [sp, #80] 1860; NONEON-NOSVE-NEXT: ldrh w8, [sp, #46] 1861; NONEON-NOSVE-NEXT: add w8, w9, w8 1862; NONEON-NOSVE-NEXT: ldrh w9, [sp, #40] 1863; NONEON-NOSVE-NEXT: strh w8, [sp, #78] 1864; NONEON-NOSVE-NEXT: ldrh w8, [sp, #42] 1865; NONEON-NOSVE-NEXT: add w8, w9, w8 1866; NONEON-NOSVE-NEXT: ldrh w9, [sp, #36] 1867; NONEON-NOSVE-NEXT: strh w8, [sp, #76] 1868; NONEON-NOSVE-NEXT: ldrh w8, [sp, #38] 1869; NONEON-NOSVE-NEXT: add w8, w9, w8 1870; NONEON-NOSVE-NEXT: ldrh w9, [sp, #32] 1871; NONEON-NOSVE-NEXT: strh w8, [sp, #74] 1872; NONEON-NOSVE-NEXT: ldrh w8, [sp, #34] 1873; NONEON-NOSVE-NEXT: add w8, w9, w8 1874; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12] 1875; NONEON-NOSVE-NEXT: strh w8, [sp, #72] 1876; NONEON-NOSVE-NEXT: ldrh w8, [sp, #14] 1877; NONEON-NOSVE-NEXT: add w8, w9, w8 1878; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8] 1879; NONEON-NOSVE-NEXT: strh w8, [sp, #70] 1880; NONEON-NOSVE-NEXT: ldrh w8, [sp, #10] 1881; NONEON-NOSVE-NEXT: add w8, w9, w8 1882; NONEON-NOSVE-NEXT: ldrh w9, [sp, #4] 1883; NONEON-NOSVE-NEXT: strh w8, [sp, #68] 1884; NONEON-NOSVE-NEXT: ldrh w8, [sp, #6] 1885; NONEON-NOSVE-NEXT: add w8, w9, w8 1886; NONEON-NOSVE-NEXT: ldrh w9, [sp] 1887; NONEON-NOSVE-NEXT: strh w8, [sp, #66] 1888; NONEON-NOSVE-NEXT: ldrh w8, [sp, #2] 1889; NONEON-NOSVE-NEXT: add w8, w9, w8 1890; NONEON-NOSVE-NEXT: strh w8, [sp, #64] 1891; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64] 1892; NONEON-NOSVE-NEXT: stp q0, q1, [x0] 1893; NONEON-NOSVE-NEXT: add sp, sp, #96 1894; NONEON-NOSVE-NEXT: ret 1895 %tmp1 = load <16 x i16>, ptr %a 1896 %tmp2 = load <16 x i16>, ptr %b 1897 %tmp3 = shufflevector <16 x i16> %tmp1, <16 x i16> %tmp2, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 1898 %tmp4 = shufflevector <16 x i16> %tmp1, <16 x i16> %tmp2, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 1899 %tmp5 = add <16 x i16> %tmp3, %tmp4 1900 store <16 x i16> %tmp5, ptr %a 1901 ret void 1902} 1903 1904define void @uzp_v8f32(ptr %a, ptr %b) #0{ 1905; CHECK-LABEL: uzp_v8f32: 1906; CHECK: // %bb.0: 1907; CHECK-NEXT: ldp q6, q0, [x0] 1908; CHECK-NEXT: adrp x8, .LCPI21_0 1909; CHECK-NEXT: ldp q1, q2, [x1] 1910; CHECK-NEXT: ptrue p0.s, vl4 1911; CHECK-NEXT: mov z3.s, z0.s[2] 1912; CHECK-NEXT: mov z4.s, z0.s[3] 1913; CHECK-NEXT: mov z5.s, z0.s[1] 1914; CHECK-NEXT: mov z7.s, z2.s[2] 1915; CHECK-NEXT: mov z16.s, z1.s[2] 1916; CHECK-NEXT: zip1 z0.s, z0.s, z3.s 1917; CHECK-NEXT: zip1 z3.s, z5.s, z4.s 1918; CHECK-NEXT: mov z4.s, z6.s[1] 1919; CHECK-NEXT: zip1 z2.s, z2.s, z7.s 1920; CHECK-NEXT: ldr q5, [x8, :lo12:.LCPI21_0] 1921; CHECK-NEXT: zip1 z7.s, z0.s, z16.s 1922; CHECK-NEXT: tbl z1.s, { z1.s }, z5.s 1923; CHECK-NEXT: zip1 z0.d, z6.d, z0.d 1924; CHECK-NEXT: zip1 z3.d, z4.d, z3.d 1925; CHECK-NEXT: zip1 z2.d, z7.d, z2.d 1926; CHECK-NEXT: fadd z0.s, p0/m, z0.s, z3.s 1927; CHECK-NEXT: fadd z1.s, p0/m, z1.s, z2.s 1928; CHECK-NEXT: stp q0, q1, [x0] 1929; CHECK-NEXT: ret 1930; 1931; NONEON-NOSVE-LABEL: uzp_v8f32: 1932; NONEON-NOSVE: // %bb.0: 1933; NONEON-NOSVE-NEXT: sub sp, sp, #80 1934; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 80 1935; NONEON-NOSVE-NEXT: ldp q2, q1, [x0] 1936; NONEON-NOSVE-NEXT: mov x8, #9205357640488583168 // =0x7fc000007fc00000 1937; NONEON-NOSVE-NEXT: ldr q0, [x1] 1938; NONEON-NOSVE-NEXT: str x8, [sp, #56] 1939; NONEON-NOSVE-NEXT: mov w8, #2143289344 // =0x7fc00000 1940; NONEON-NOSVE-NEXT: str w8, [sp, #48] 1941; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #16] 1942; NONEON-NOSVE-NEXT: ldp s1, s0, [sp, #24] 1943; NONEON-NOSVE-NEXT: str q2, [sp] 1944; NONEON-NOSVE-NEXT: str w8, [sp, #68] 1945; NONEON-NOSVE-NEXT: fadd s0, s1, s0 1946; NONEON-NOSVE-NEXT: str s0, [sp, #52] 1947; NONEON-NOSVE-NEXT: ldp s1, s0, [sp, #40] 1948; NONEON-NOSVE-NEXT: fadd s2, s1, s0 1949; NONEON-NOSVE-NEXT: ldp s1, s0, [sp, #32] 1950; NONEON-NOSVE-NEXT: fadd s0, s1, s0 1951; NONEON-NOSVE-NEXT: stp s0, s2, [sp, #72] 1952; NONEON-NOSVE-NEXT: ldp s1, s0, [sp] 1953; NONEON-NOSVE-NEXT: fadd s0, s1, s0 1954; NONEON-NOSVE-NEXT: str s0, [sp, #64] 1955; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #48] 1956; NONEON-NOSVE-NEXT: stp q0, q1, [x0] 1957; NONEON-NOSVE-NEXT: add sp, sp, #80 1958; NONEON-NOSVE-NEXT: ret 1959 %tmp1 = load <8 x float>, ptr %a 1960 %tmp2 = load <8 x float>, ptr %b 1961 %tmp3 = shufflevector <8 x float> %tmp1, <8 x float> %tmp2, <8 x i32> <i32 0, i32 undef, i32 4, i32 6, i32 undef, i32 10, i32 12, i32 14> 1962 %tmp4 = shufflevector <8 x float> %tmp1, <8 x float> %tmp2, <8 x i32> <i32 1, i32 undef, i32 5, i32 7, i32 9, i32 11, i32 undef, i32 undef> 1963 %tmp5 = fadd <8 x float> %tmp3, %tmp4 1964 store <8 x float> %tmp5, ptr %a 1965 ret void 1966} 1967 1968define void @uzp_v4i64(ptr %a, ptr %b) #0{ 1969; CHECK-LABEL: uzp_v4i64: 1970; CHECK: // %bb.0: 1971; CHECK-NEXT: ldp q1, q0, [x0] 1972; CHECK-NEXT: ldp q3, q2, [x1] 1973; CHECK-NEXT: zip1 z4.d, z1.d, z0.d 1974; CHECK-NEXT: trn2 z0.d, z1.d, z0.d 1975; CHECK-NEXT: zip1 z1.d, z3.d, z2.d 1976; CHECK-NEXT: trn2 z2.d, z3.d, z2.d 1977; CHECK-NEXT: add z0.d, z4.d, z0.d 1978; CHECK-NEXT: add z1.d, z1.d, z2.d 1979; CHECK-NEXT: stp q0, q1, [x0] 1980; CHECK-NEXT: ret 1981; 1982; NONEON-NOSVE-LABEL: uzp_v4i64: 1983; NONEON-NOSVE: // %bb.0: 1984; NONEON-NOSVE-NEXT: sub sp, sp, #96 1985; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96 1986; NONEON-NOSVE-NEXT: ldp q1, q0, [x1] 1987; NONEON-NOSVE-NEXT: ldp q2, q3, [x0] 1988; NONEON-NOSVE-NEXT: stp q2, q1, [sp] 1989; NONEON-NOSVE-NEXT: stp q3, q0, [sp, #32] 1990; NONEON-NOSVE-NEXT: ldp x9, x8, [sp, #48] 1991; NONEON-NOSVE-NEXT: add x8, x9, x8 1992; NONEON-NOSVE-NEXT: str x8, [sp, #88] 1993; NONEON-NOSVE-NEXT: ldp x9, x8, [sp, #16] 1994; NONEON-NOSVE-NEXT: add x8, x9, x8 1995; NONEON-NOSVE-NEXT: str x8, [sp, #80] 1996; NONEON-NOSVE-NEXT: ldp x9, x8, [sp, #32] 1997; NONEON-NOSVE-NEXT: add x8, x9, x8 1998; NONEON-NOSVE-NEXT: str x8, [sp, #72] 1999; NONEON-NOSVE-NEXT: ldp x9, x8, [sp] 2000; NONEON-NOSVE-NEXT: add x8, x9, x8 2001; NONEON-NOSVE-NEXT: str x8, [sp, #64] 2002; NONEON-NOSVE-NEXT: ldp q0, q1, [sp, #64] 2003; NONEON-NOSVE-NEXT: stp q0, q1, [x0] 2004; NONEON-NOSVE-NEXT: add sp, sp, #96 2005; NONEON-NOSVE-NEXT: ret 2006 %tmp1 = load <4 x i64>, ptr %a 2007 %tmp2 = load <4 x i64>, ptr %b 2008 %tmp3 = shufflevector <4 x i64> %tmp1, <4 x i64> %tmp2, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 2009 %tmp4 = shufflevector <4 x i64> %tmp1, <4 x i64> %tmp2, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 2010 %tmp5 = add <4 x i64> %tmp3, %tmp4 2011 store <4 x i64> %tmp5, ptr %a 2012 ret void 2013} 2014 2015define void @uzp_v8i16(ptr %a, ptr %b) #0{ 2016; CHECK-LABEL: uzp_v8i16: 2017; CHECK: // %bb.0: 2018; CHECK-NEXT: ldr q0, [x1] 2019; CHECK-NEXT: ldr q1, [x0] 2020; CHECK-NEXT: mov z2.h, z0.h[6] 2021; CHECK-NEXT: mov z3.h, z0.h[4] 2022; CHECK-NEXT: mov z4.h, z0.h[2] 2023; CHECK-NEXT: mov z5.h, z1.h[6] 2024; CHECK-NEXT: mov z6.h, z1.h[4] 2025; CHECK-NEXT: mov z7.h, z1.h[2] 2026; CHECK-NEXT: mov z16.h, z0.h[7] 2027; CHECK-NEXT: mov z17.h, z0.h[5] 2028; CHECK-NEXT: mov z18.h, z0.h[3] 2029; CHECK-NEXT: mov z19.h, z0.h[1] 2030; CHECK-NEXT: mov z20.h, z1.h[7] 2031; CHECK-NEXT: mov z21.h, z1.h[5] 2032; CHECK-NEXT: mov z22.h, z1.h[3] 2033; CHECK-NEXT: mov z23.h, z1.h[1] 2034; CHECK-NEXT: zip1 z2.h, z3.h, z2.h 2035; CHECK-NEXT: zip1 z0.h, z0.h, z4.h 2036; CHECK-NEXT: zip1 z3.h, z6.h, z5.h 2037; CHECK-NEXT: zip1 z1.h, z1.h, z7.h 2038; CHECK-NEXT: zip1 z4.h, z17.h, z16.h 2039; CHECK-NEXT: zip1 z5.h, z19.h, z18.h 2040; CHECK-NEXT: zip1 z6.h, z21.h, z20.h 2041; CHECK-NEXT: zip1 z7.h, z23.h, z22.h 2042; CHECK-NEXT: zip1 z0.s, z0.s, z2.s 2043; CHECK-NEXT: zip1 z1.s, z1.s, z3.s 2044; CHECK-NEXT: zip1 z2.s, z5.s, z4.s 2045; CHECK-NEXT: zip1 z3.s, z7.s, z6.s 2046; CHECK-NEXT: zip1 z0.d, z1.d, z0.d 2047; CHECK-NEXT: zip1 z1.d, z3.d, z2.d 2048; CHECK-NEXT: add z0.h, z0.h, z1.h 2049; CHECK-NEXT: str q0, [x0] 2050; CHECK-NEXT: ret 2051; 2052; NONEON-NOSVE-LABEL: uzp_v8i16: 2053; NONEON-NOSVE: // %bb.0: 2054; NONEON-NOSVE-NEXT: ldr q0, [x1] 2055; NONEON-NOSVE-NEXT: ldr q1, [x0] 2056; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-48]! 2057; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48 2058; NONEON-NOSVE-NEXT: ldrh w8, [sp, #30] 2059; NONEON-NOSVE-NEXT: ldrh w9, [sp, #28] 2060; NONEON-NOSVE-NEXT: add w8, w9, w8 2061; NONEON-NOSVE-NEXT: ldrh w9, [sp, #24] 2062; NONEON-NOSVE-NEXT: strh w8, [sp, #46] 2063; NONEON-NOSVE-NEXT: ldrh w8, [sp, #26] 2064; NONEON-NOSVE-NEXT: add w8, w9, w8 2065; NONEON-NOSVE-NEXT: ldrh w9, [sp, #20] 2066; NONEON-NOSVE-NEXT: strh w8, [sp, #44] 2067; NONEON-NOSVE-NEXT: ldrh w8, [sp, #22] 2068; NONEON-NOSVE-NEXT: add w8, w9, w8 2069; NONEON-NOSVE-NEXT: ldrh w9, [sp, #16] 2070; NONEON-NOSVE-NEXT: strh w8, [sp, #42] 2071; NONEON-NOSVE-NEXT: ldrh w8, [sp, #18] 2072; NONEON-NOSVE-NEXT: add w8, w9, w8 2073; NONEON-NOSVE-NEXT: ldrh w9, [sp, #12] 2074; NONEON-NOSVE-NEXT: strh w8, [sp, #40] 2075; NONEON-NOSVE-NEXT: ldrh w8, [sp, #14] 2076; NONEON-NOSVE-NEXT: add w8, w9, w8 2077; NONEON-NOSVE-NEXT: ldrh w9, [sp, #8] 2078; NONEON-NOSVE-NEXT: strh w8, [sp, #38] 2079; NONEON-NOSVE-NEXT: ldrh w8, [sp, #10] 2080; NONEON-NOSVE-NEXT: add w8, w9, w8 2081; NONEON-NOSVE-NEXT: ldrh w9, [sp, #4] 2082; NONEON-NOSVE-NEXT: strh w8, [sp, #36] 2083; NONEON-NOSVE-NEXT: ldrh w8, [sp, #6] 2084; NONEON-NOSVE-NEXT: add w8, w9, w8 2085; NONEON-NOSVE-NEXT: ldrh w9, [sp] 2086; NONEON-NOSVE-NEXT: strh w8, [sp, #34] 2087; NONEON-NOSVE-NEXT: ldrh w8, [sp, #2] 2088; NONEON-NOSVE-NEXT: add w8, w9, w8 2089; NONEON-NOSVE-NEXT: strh w8, [sp, #32] 2090; NONEON-NOSVE-NEXT: ldr q0, [sp, #32] 2091; NONEON-NOSVE-NEXT: str q0, [x0] 2092; NONEON-NOSVE-NEXT: add sp, sp, #48 2093; NONEON-NOSVE-NEXT: ret 2094 %tmp1 = load <8 x i16>, ptr %a 2095 %tmp2 = load <8 x i16>, ptr %b 2096 %tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 2097 %tmp4 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 2098 %tmp5 = add <8 x i16> %tmp3, %tmp4 2099 store <8 x i16> %tmp5, ptr %a 2100 ret void 2101} 2102 2103define void @uzp_v8i32_undef(ptr %a) #0{ 2104; CHECK-LABEL: uzp_v8i32_undef: 2105; CHECK: // %bb.0: 2106; CHECK-NEXT: ldp q0, q1, [x0] 2107; CHECK-NEXT: mov z2.s, z1.s[2] 2108; CHECK-NEXT: mov z3.s, z0.s[2] 2109; CHECK-NEXT: mov z4.s, z1.s[3] 2110; CHECK-NEXT: mov z5.s, z1.s[1] 2111; CHECK-NEXT: mov z6.s, z0.s[3] 2112; CHECK-NEXT: mov z7.s, z0.s[1] 2113; CHECK-NEXT: zip1 z1.s, z1.s, z2.s 2114; CHECK-NEXT: zip1 z0.s, z0.s, z3.s 2115; CHECK-NEXT: zip1 z2.s, z5.s, z4.s 2116; CHECK-NEXT: zip1 z3.s, z7.s, z6.s 2117; CHECK-NEXT: zip1 z0.d, z0.d, z1.d 2118; CHECK-NEXT: zip1 z1.d, z3.d, z2.d 2119; CHECK-NEXT: add z0.s, z0.s, z1.s 2120; CHECK-NEXT: stp q0, q0, [x0] 2121; CHECK-NEXT: ret 2122; 2123; NONEON-NOSVE-LABEL: uzp_v8i32_undef: 2124; NONEON-NOSVE: // %bb.0: 2125; NONEON-NOSVE-NEXT: ldp q1, q0, [x0] 2126; NONEON-NOSVE-NEXT: stp q1, q0, [sp, #-48]! 2127; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 48 2128; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #24] 2129; NONEON-NOSVE-NEXT: add w8, w9, w8 2130; NONEON-NOSVE-NEXT: str w8, [sp, #44] 2131; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #16] 2132; NONEON-NOSVE-NEXT: add w8, w9, w8 2133; NONEON-NOSVE-NEXT: str w8, [sp, #40] 2134; NONEON-NOSVE-NEXT: ldp w9, w8, [sp, #8] 2135; NONEON-NOSVE-NEXT: add w8, w9, w8 2136; NONEON-NOSVE-NEXT: str w8, [sp, #36] 2137; NONEON-NOSVE-NEXT: ldp w9, w8, [sp] 2138; NONEON-NOSVE-NEXT: add w8, w9, w8 2139; NONEON-NOSVE-NEXT: str w8, [sp, #32] 2140; NONEON-NOSVE-NEXT: ldr q0, [sp, #32] 2141; NONEON-NOSVE-NEXT: stp q0, q0, [x0] 2142; NONEON-NOSVE-NEXT: add sp, sp, #48 2143; NONEON-NOSVE-NEXT: ret 2144 %tmp1 = load <8 x i32>, ptr %a 2145 %tmp3 = shufflevector <8 x i32> %tmp1, <8 x i32> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 0, i32 2, i32 4, i32 6> 2146 %tmp4 = shufflevector <8 x i32> %tmp1, <8 x i32> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 1, i32 3, i32 5, i32 7> 2147 %tmp5 = add <8 x i32> %tmp3, %tmp4 2148 store <8 x i32> %tmp5, ptr %a 2149 ret void 2150} 2151 2152define void @zip_vscale2_4(ptr %a, ptr %b) { 2153; CHECK-LABEL: zip_vscale2_4: 2154; CHECK: // %bb.0: 2155; CHECK-NEXT: ldp q1, q0, [x0] 2156; CHECK-NEXT: ptrue p0.d, vl2 2157; CHECK-NEXT: ldp q3, q2, [x1] 2158; CHECK-NEXT: zip1 z4.d, z1.d, z3.d 2159; CHECK-NEXT: zip1 z5.d, z0.d, z2.d 2160; CHECK-NEXT: trn2 z1.d, z1.d, z3.d 2161; CHECK-NEXT: trn2 z0.d, z0.d, z2.d 2162; CHECK-NEXT: movprfx z2, z4 2163; CHECK-NEXT: fadd z2.d, p0/m, z2.d, z5.d 2164; CHECK-NEXT: fadd z0.d, p0/m, z0.d, z1.d 2165; CHECK-NEXT: stp q2, q0, [x0] 2166; CHECK-NEXT: ret 2167; 2168; NONEON-NOSVE-LABEL: zip_vscale2_4: 2169; NONEON-NOSVE: // %bb.0: 2170; NONEON-NOSVE-NEXT: sub sp, sp, #96 2171; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 96 2172; NONEON-NOSVE-NEXT: ldp q1, q0, [x1] 2173; NONEON-NOSVE-NEXT: ldp q2, q3, [x0] 2174; NONEON-NOSVE-NEXT: stp q2, q1, [sp] 2175; NONEON-NOSVE-NEXT: stp q3, q0, [sp, #32] 2176; NONEON-NOSVE-NEXT: ldr d1, [sp, #24] 2177; NONEON-NOSVE-NEXT: ldr d0, [sp, #56] 2178; NONEON-NOSVE-NEXT: fadd d2, d1, d0 2179; NONEON-NOSVE-NEXT: ldp d3, d1, [sp, #8] 2180; NONEON-NOSVE-NEXT: ldr d0, [sp, #40] 2181; NONEON-NOSVE-NEXT: fadd d0, d3, d0 2182; NONEON-NOSVE-NEXT: stp d0, d2, [sp, #64] 2183; NONEON-NOSVE-NEXT: ldr d0, [sp, #48] 2184; NONEON-NOSVE-NEXT: fadd d2, d1, d0 2185; NONEON-NOSVE-NEXT: ldr d0, [sp, #32] 2186; NONEON-NOSVE-NEXT: ldr d1, [sp] 2187; NONEON-NOSVE-NEXT: fadd d0, d1, d0 2188; NONEON-NOSVE-NEXT: stp d0, d2, [sp, #80] 2189; NONEON-NOSVE-NEXT: ldp q1, q0, [sp, #64] 2190; NONEON-NOSVE-NEXT: stp q0, q1, [x0] 2191; NONEON-NOSVE-NEXT: add sp, sp, #96 2192; NONEON-NOSVE-NEXT: ret 2193 %tmp1 = load <4 x double>, ptr %a 2194 %tmp2 = load <4 x double>, ptr %b 2195 %tmp3 = shufflevector <4 x double> %tmp1, <4 x double> %tmp2, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2196 %tmp4 = shufflevector <4 x double> %tmp1, <4 x double> %tmp2, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2197 %tmp5 = fadd <4 x double> %tmp3, %tmp4 2198 store <4 x double> %tmp5, ptr %a 2199 ret void 2200} 2201