xref: /llvm-project/llvm/test/CodeGen/AArch64/sve-stepvector.ll (revision 9fd75233ca757cf172d10703ac82fc162ef8ec0e) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s --check-prefixes=CHECK
3
4; LEGAL INTEGER TYPES
5
6define <vscale x 2 x i64> @stepvector_nxv2i64() {
7; CHECK-LABEL: stepvector_nxv2i64:
8; CHECK:       // %bb.0:
9; CHECK-NEXT:    index z0.d, #0, #1
10; CHECK-NEXT:    ret
11  %1 = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
12  ret <vscale x 2 x i64> %1
13}
14
15define <vscale x 4 x i32> @stepvector_nxv4i32() {
16; CHECK-LABEL: stepvector_nxv4i32:
17; CHECK:       // %bb.0:
18; CHECK-NEXT:    index z0.s, #0, #1
19; CHECK-NEXT:    ret
20  %1 = call <vscale x 4 x i32> @llvm.stepvector.nxv4i32()
21  ret <vscale x 4 x i32> %1
22}
23
24define <vscale x 8 x i16> @stepvector_nxv8i16() {
25; CHECK-LABEL: stepvector_nxv8i16:
26; CHECK:       // %bb.0:
27; CHECK-NEXT:    index z0.h, #0, #1
28; CHECK-NEXT:    ret
29  %1 = call <vscale x 8 x i16> @llvm.stepvector.nxv8i16()
30  ret <vscale x 8 x i16> %1
31}
32
33define <vscale x 16 x i8> @stepvector_nxv16i8() {
34; CHECK-LABEL: stepvector_nxv16i8:
35; CHECK:       // %bb.0:
36; CHECK-NEXT:    index z0.b, #0, #1
37; CHECK-NEXT:    ret
38  %1 = call <vscale x 16 x i8> @llvm.stepvector.nxv16i8()
39  ret <vscale x 16 x i8> %1
40}
41
42; ILLEGAL INTEGER TYPES
43
44define <vscale x 6 x i64> @stepvector_nxv6i64() {
45; CHECK-LABEL: stepvector_nxv6i64:
46; CHECK:       // %bb.0:
47; CHECK-NEXT:    index z0.d, #0, #1
48; CHECK-NEXT:    mov z2.d, z0.d
49; CHECK-NEXT:    mov z1.d, z0.d
50; CHECK-NEXT:    incd z1.d
51; CHECK-NEXT:    incd z2.d, all, mul #2
52; CHECK-NEXT:    ret
53  %1 = call <vscale x 6 x i64> @llvm.stepvector.nxv6i64()
54  ret <vscale x 6 x i64> %1
55}
56
57define <vscale x 4 x i64> @stepvector_nxv4i64() {
58; CHECK-LABEL: stepvector_nxv4i64:
59; CHECK:       // %bb.0:
60; CHECK-NEXT:    index z0.d, #0, #1
61; CHECK-NEXT:    mov z1.d, z0.d
62; CHECK-NEXT:    incd z1.d
63; CHECK-NEXT:    ret
64  %1 = call <vscale x 4 x i64> @llvm.stepvector.nxv4i64()
65  ret <vscale x 4 x i64> %1
66}
67
68define <vscale x 16 x i32> @stepvector_nxv16i32() {
69; CHECK-LABEL: stepvector_nxv16i32:
70; CHECK:       // %bb.0:
71; CHECK-NEXT:    index z0.s, #0, #1
72; CHECK-NEXT:    mov z1.d, z0.d
73; CHECK-NEXT:    mov z2.d, z0.d
74; CHECK-NEXT:    incw z1.s
75; CHECK-NEXT:    incw z2.s, all, mul #2
76; CHECK-NEXT:    mov z3.d, z1.d
77; CHECK-NEXT:    incw z3.s, all, mul #2
78; CHECK-NEXT:    ret
79  %1 = call <vscale x 16 x i32> @llvm.stepvector.nxv16i32()
80  ret <vscale x 16 x i32> %1
81}
82
83define <vscale x 3 x i32> @stepvector_nxv3i32() {
84; CHECK-LABEL: stepvector_nxv3i32:
85; CHECK:       // %bb.0:
86; CHECK-NEXT:    index z0.s, #0, #1
87; CHECK-NEXT:    ret
88  %1 = call <vscale x 3 x i32> @llvm.stepvector.nxv3i32()
89  ret <vscale x 3 x i32> %1
90}
91
92define <vscale x 2 x i32> @stepvector_nxv2i32() {
93; CHECK-LABEL: stepvector_nxv2i32:
94; CHECK:       // %bb.0:
95; CHECK-NEXT:    index z0.d, #0, #1
96; CHECK-NEXT:    ret
97  %1 = call <vscale x 2 x i32> @llvm.stepvector.nxv2i32()
98  ret <vscale x 2 x i32> %1
99}
100
101define <vscale x 4 x i16> @stepvector_nxv4i16() {
102; CHECK-LABEL: stepvector_nxv4i16:
103; CHECK:       // %bb.0:
104; CHECK-NEXT:    index z0.s, #0, #1
105; CHECK-NEXT:    ret
106  %1 = call <vscale x 4 x i16> @llvm.stepvector.nxv4i16()
107  ret <vscale x 4 x i16> %1
108}
109
110define <vscale x 8 x i8> @stepvector_nxv8i8() {
111; CHECK-LABEL: stepvector_nxv8i8:
112; CHECK:       // %bb.0:
113; CHECK-NEXT:    index z0.h, #0, #1
114; CHECK-NEXT:    ret
115  %1 = call <vscale x 8 x i8> @llvm.stepvector.nxv8i8()
116  ret <vscale x 8 x i8> %1
117}
118
119define <vscale x 8 x i8> @add_stepvector_nxv8i8() {
120; CHECK-LABEL: add_stepvector_nxv8i8:
121; CHECK:       // %bb.0:
122; CHECK-NEXT:    index z0.h, #0, #2
123; CHECK-NEXT:    ret
124  %1 = call <vscale x 8 x i8> @llvm.stepvector.nxv8i8()
125  %2 = call <vscale x 8 x i8> @llvm.stepvector.nxv8i8()
126  %3 = add <vscale x 8 x i8> %1, %2
127  ret <vscale x 8 x i8> %3
128}
129
130define <vscale x 8 x i8> @add_stepvector_nxv8i8_1(<vscale x 8 x i8> %p) {
131; CHECK-LABEL: add_stepvector_nxv8i8_1:
132; CHECK:       // %bb.0:
133; CHECK-NEXT:    index z1.h, #0, #2
134; CHECK-NEXT:    add z0.h, z0.h, z1.h
135; CHECK-NEXT:    ret
136  %1 = call <vscale x 8 x i8> @llvm.stepvector.nxv8i8()
137  %2 = add <vscale x 8 x i8> %p, %1
138  %3 = call <vscale x 8 x i8> @llvm.stepvector.nxv8i8()
139  %4 = add <vscale x 8 x i8> %2, %3
140  ret <vscale x 8 x i8> %4
141}
142
143define <vscale x 8 x i8> @add_stepvector_nxv8i8_2() {
144; CHECK-LABEL: add_stepvector_nxv8i8_2:
145; CHECK:       // %bb.0:
146; CHECK-NEXT:    index z0.h, #2, #1
147; CHECK-NEXT:    ret
148  %2 = call <vscale x 8 x i8> @llvm.stepvector.nxv8i8()
149  %3 = add <vscale x 8 x i8> %2, splat(i8 2)
150  ret <vscale x 8 x i8> %3
151}
152
153define <vscale x 8 x i8> @add_stepvector_nxv8i8_2_commutative() {
154; CHECK-LABEL: add_stepvector_nxv8i8_2_commutative:
155; CHECK:       // %bb.0:
156; CHECK-NEXT:    index z0.h, #2, #1
157; CHECK-NEXT:    ret
158  %2 = call <vscale x 8 x i8> @llvm.stepvector.nxv8i8()
159  %3 = add <vscale x 8 x i8> splat(i8 2), %2
160  ret <vscale x 8 x i8> %3
161}
162
163define <vscale x 8 x i16> @add_stepvector_nxv8i16_1(i16 %data) {
164; CHECK-LABEL: add_stepvector_nxv8i16_1:
165; CHECK:       // %bb.0:
166; CHECK-NEXT:    index z0.h, w0, #1
167; CHECK-NEXT:    ret
168  %1 = insertelement <vscale x 8 x i16> poison, i16 %data, i32 0
169  %2 = shufflevector <vscale x 8 x i16> %1, <vscale x 8 x i16> poison, <vscale x 8 x i32> zeroinitializer
170  %3 = call <vscale x 8 x i16> @llvm.stepvector.nxv8i16()
171  %4 = add <vscale x 8 x i16> %3, %2
172  ret <vscale x 8 x i16> %4
173}
174
175define <vscale x 4 x i32> @add_stepvector_nxv4i32_1(i32 %data) {
176; CHECK-LABEL: add_stepvector_nxv4i32_1:
177; CHECK:       // %bb.0:
178; CHECK-NEXT:    index z0.s, w0, #1
179; CHECK-NEXT:    ret
180  %1 = insertelement <vscale x 4 x i32> poison, i32 %data, i32 0
181  %2 = shufflevector <vscale x 4 x i32> %1, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
182  %3 = call <vscale x 4 x i32> @llvm.stepvector.nxv4i32()
183  %4 = add <vscale x 4 x i32> %3, %2
184  ret <vscale x 4 x i32> %4
185}
186
187define <vscale x 4 x i32> @multiple_use_stepvector_nxv4i32_1(i32 %data) {
188; CHECK-LABEL: multiple_use_stepvector_nxv4i32_1:
189; CHECK:       // %bb.0:
190; CHECK-NEXT:    index z0.s, w0, #1
191; CHECK-NEXT:    mov z1.s, w0
192; CHECK-NEXT:    ptrue p0.s
193; CHECK-NEXT:    mul z1.s, p0/m, z1.s, z0.s
194; CHECK-NEXT:    sub z0.s, z1.s, z0.s
195; CHECK-NEXT:    ret
196  %1 = insertelement <vscale x 4 x i32> poison, i32 %data, i32 0
197  %2 = shufflevector <vscale x 4 x i32> %1, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer
198  %3 = call <vscale x 4 x i32> @llvm.stepvector.nxv4i32()
199  %4 = add <vscale x 4 x i32> %3, %2
200  %5 = mul <vscale x 4 x i32> %2, %4
201  %6 = sub <vscale x 4 x i32> %5, %4
202  ret <vscale x 4 x i32> %6
203}
204
205define <vscale x 2 x i64> @add_stepvector_nxv2i64_1(i64 %data) {
206; CHECK-LABEL: add_stepvector_nxv2i64_1:
207; CHECK:       // %bb.0:
208; CHECK-NEXT:    index z0.d, x0, #1
209; CHECK-NEXT:    ret
210  %1 = insertelement <vscale x 2 x i64> poison, i64 %data, i32 0
211  %2 = shufflevector <vscale x 2 x i64> %1, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
212  %3 = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
213  %4 = add <vscale x 2 x i64> %2, %3
214  ret <vscale x 2 x i64> %4
215}
216
217define <vscale x 2 x i64> @multiple_use_stepvector_nxv2i64_1(i64 %data) {
218; CHECK-LABEL: multiple_use_stepvector_nxv2i64_1:
219; CHECK:       // %bb.0:
220; CHECK-NEXT:    index z0.d, #0, #1
221; CHECK-NEXT:    mov z1.d, x0
222; CHECK-NEXT:    ptrue p0.d
223; CHECK-NEXT:    add z1.d, z0.d, z1.d
224; CHECK-NEXT:    mul z0.d, p0/m, z0.d, z1.d
225; CHECK-NEXT:    ret
226  %1 = insertelement <vscale x 2 x i64> poison, i64 %data, i32 0
227  %2 = shufflevector <vscale x 2 x i64> %1, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
228  %3 = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
229  %4 = add <vscale x 2 x i64> %2, %3
230  %5 = mul <vscale x 2 x i64> %4, %3
231  ret <vscale x 2 x i64> %5
232}
233
234define <vscale x 8 x i8> @mul_stepvector_nxv8i8() {
235; CHECK-LABEL: mul_stepvector_nxv8i8:
236; CHECK:       // %bb.0:
237; CHECK-NEXT:    index z0.h, #0, #2
238; CHECK-NEXT:    ret
239  %2 = call <vscale x 8 x i8> @llvm.stepvector.nxv8i8()
240  %3 = mul <vscale x 8 x i8> %2, splat(i8 2)
241  ret <vscale x 8 x i8> %3
242}
243
244define <vscale x 2 x i64> @mul_stepvector_nxv2i64() {
245; CHECK-LABEL: mul_stepvector_nxv2i64:
246; CHECK:       // %bb.0:
247; CHECK-NEXT:    mov w8, #2222 // =0x8ae
248; CHECK-NEXT:    index z0.d, #0, x8
249; CHECK-NEXT:    ret
250  %2 = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
251  %3 = mul <vscale x 2 x i64> %2, splat(i64 2222)
252  ret <vscale x 2 x i64> %3
253}
254
255define <vscale x 2 x i64> @mul_stepvector_bigconst_nxv2i64() {
256; CHECK-LABEL: mul_stepvector_bigconst_nxv2i64:
257; CHECK:       // %bb.0:
258; CHECK-NEXT:    mov x8, #146028888064 // =0x2200000000
259; CHECK-NEXT:    index z0.d, #0, x8
260; CHECK-NEXT:    ret
261  %2 = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
262  %3 = mul <vscale x 2 x i64> %2, splat(i64 146028888064)
263  ret <vscale x 2 x i64> %3
264}
265
266define <vscale x 2 x i64> @mul_add_stepvector_nxv2i64(i64 %x) {
267; CHECK-LABEL: mul_add_stepvector_nxv2i64:
268; CHECK:       // %bb.0:
269; CHECK-NEXT:    mov w8, #2222 // =0x8ae
270; CHECK-NEXT:    index z0.d, x0, x8
271; CHECK-NEXT:    ret
272  %2 = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
273  %3 = mul <vscale x 2 x i64> %2, splat(i64 2222)
274  %4 = insertelement <vscale x 2 x i64> poison, i64 %x, i32 0
275  %5 = shufflevector <vscale x 2 x i64> %4, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
276  %6 = add <vscale x 2 x i64> %3, %5
277  ret <vscale x 2 x i64> %6
278}
279
280define <vscale x 2 x i64> @mul_add_stepvector_nxv2i64_commutative(i64 %x, i64 %y) {
281; CHECK-LABEL: mul_add_stepvector_nxv2i64_commutative:
282; CHECK:       // %bb.0:
283; CHECK-NEXT:    index z0.d, x0, x1
284; CHECK-NEXT:    ret
285  %1 = insertelement <vscale x 2 x i64> poison, i64 %y, i32 0
286  %2 = shufflevector <vscale x 2 x i64> %1, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
287  %3 = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
288  %4 = mul <vscale x 2 x i64> %2, %3
289  %5 = insertelement <vscale x 2 x i64> poison, i64 %x, i32 0
290  %6 = shufflevector <vscale x 2 x i64> %5, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
291  %7 = add <vscale x 2 x i64> %6, %4
292  ret <vscale x 2 x i64> %7
293}
294
295define <vscale x 2 x i64> @mul_add_stepvector_bigconst_nxv2i64(i64 %x) {
296; CHECK-LABEL: mul_add_stepvector_bigconst_nxv2i64:
297; CHECK:       // %bb.0:
298; CHECK-NEXT:    mov x8, #146028888064 // =0x2200000000
299; CHECK-NEXT:    index z0.d, x0, x8
300; CHECK-NEXT:    ret
301  %2 = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
302  %3 = mul <vscale x 2 x i64> %2, splat(i64 146028888064)
303  %4 = insertelement <vscale x 2 x i64> poison, i64 %x, i32 0
304  %5 = shufflevector <vscale x 2 x i64> %4, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
305  %6 = add <vscale x 2 x i64> %3, %5
306  ret <vscale x 2 x i64> %6
307}
308
309define <vscale x 2 x i64> @mul_mul_add_stepvector_nxv2i64(i64 %x, i64 %y) {
310; CHECK-LABEL: mul_mul_add_stepvector_nxv2i64:
311; CHECK:       // %bb.0:
312; CHECK-NEXT:    add x8, x0, x0, lsl #1
313; CHECK-NEXT:    index z0.d, x1, x8
314; CHECK-NEXT:    ret
315  %xmul = mul i64 %x, 3
316  %1 = insertelement <vscale x 2 x i64> poison, i64 %xmul, i32 0
317  %2 = shufflevector <vscale x 2 x i64> %1, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
318  %3 = call <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
319  %4 = mul <vscale x 2 x i64> %3, %2
320  %5 = insertelement <vscale x 2 x i64> poison, i64 %y, i32 0
321  %6 = shufflevector <vscale x 2 x i64> %5, <vscale x 2 x i64> poison, <vscale x 2 x i32> zeroinitializer
322  %7 = add <vscale x 2 x i64> %4, %6
323  ret <vscale x 2 x i64> %7
324}
325
326define <vscale x 8 x i8> @shl_stepvector_nxv8i8() {
327; CHECK-LABEL: shl_stepvector_nxv8i8:
328; CHECK:       // %bb.0:
329; CHECK-NEXT:    index z0.h, #0, #4
330; CHECK-NEXT:    ret
331  %2 = call <vscale x 8 x i8> @llvm.stepvector.nxv8i8()
332  %3 = shl <vscale x 8 x i8> %2, splat(i8 2)
333  ret <vscale x 8 x i8> %3
334}
335
336define <vscale x 8 x i16> @sub_multiple_use_stepvector_nxv8i16() {
337; CHECK-LABEL: sub_multiple_use_stepvector_nxv8i16:
338; CHECK:       // %bb.0:
339; CHECK-NEXT:    index z0.h, #0, #1
340; CHECK-NEXT:    ptrue p0.h
341; CHECK-NEXT:    mov z1.d, z0.d
342; CHECK-NEXT:    subr z1.h, z1.h, #2 // =0x2
343; CHECK-NEXT:    lsl z0.h, p0/m, z0.h, z1.h
344; CHECK-NEXT:    ret
345  %2 = call <vscale x 8 x i16> @llvm.stepvector.nxv8i16()
346  %3 = sub <vscale x 8 x i16> splat(i16 2), %2
347  %4 = shl <vscale x 8 x i16> %2, %3
348  ret <vscale x 8 x i16> %4
349}
350
351define <vscale x 8 x i16> @sub_stepvector_nxv8i16() {
352; CHECK-LABEL: sub_stepvector_nxv8i16:
353; CHECK:       // %bb.0:
354; CHECK-NEXT:    index z0.h, #2, #-1
355; CHECK-NEXT:    ret
356  %2 = call <vscale x 8 x i16> @llvm.stepvector.nxv8i16()
357  %3 = sub <vscale x 8 x i16> splat(i16 2), %2
358  ret <vscale x 8 x i16> %3
359}
360
361define <vscale x 8 x i8> @promote_sub_stepvector_nxv8i8() {
362; CHECK-LABEL: promote_sub_stepvector_nxv8i8:
363; CHECK:       // %bb.0:
364; CHECK-NEXT:    index z0.h, #2, #-1
365; CHECK-NEXT:    ret
366  %2 = call <vscale x 8 x i8> @llvm.stepvector.nxv8i8()
367  %3 = sub <vscale x 8 x i8> splat(i8 2), %2
368  ret <vscale x 8 x i8> %3
369}
370
371define <vscale x 16 x i32> @split_sub_stepvector_nxv16i32() {
372; CHECK-LABEL: split_sub_stepvector_nxv16i32:
373; CHECK:       // %bb.0:
374; CHECK-NEXT:    cntw x8
375; CHECK-NEXT:    index z0.s, #0, #-1
376; CHECK-NEXT:    neg x8, x8
377; CHECK-NEXT:    mov z1.s, w8
378; CHECK-NEXT:    cnth x8
379; CHECK-NEXT:    neg x8, x8
380; CHECK-NEXT:    mov z3.s, w8
381; CHECK-NEXT:    add z1.s, z0.s, z1.s
382; CHECK-NEXT:    add z2.s, z0.s, z3.s
383; CHECK-NEXT:    add z3.s, z1.s, z3.s
384; CHECK-NEXT:    ret
385  %1 = call <vscale x 16 x i32> @llvm.stepvector.nxv16i32()
386  %2 = sub <vscale x 16 x i32> zeroinitializer, %1
387  ret <vscale x 16 x i32> %2
388}
389
390declare <vscale x 2 x i64> @llvm.stepvector.nxv2i64()
391declare <vscale x 4 x i32> @llvm.stepvector.nxv4i32()
392declare <vscale x 8 x i16> @llvm.stepvector.nxv8i16()
393declare <vscale x 16 x i8> @llvm.stepvector.nxv16i8()
394
395declare <vscale x 6 x i64> @llvm.stepvector.nxv6i64()
396declare <vscale x 4 x i64> @llvm.stepvector.nxv4i64()
397declare <vscale x 16 x i32> @llvm.stepvector.nxv16i32()
398declare <vscale x 3 x i32> @llvm.stepvector.nxv3i32()
399declare <vscale x 2 x i32> @llvm.stepvector.nxv2i32()
400declare <vscale x 8 x i8> @llvm.stepvector.nxv8i8()
401declare <vscale x 4 x i16> @llvm.stepvector.nxv4i16()
402