1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s | FileCheck %s 3 4target triple = "aarch64-unknown-linux-gnu" 5 6define <vscale x 4 x i32> @srem_combine_loop(<vscale x 4 x i32> %a) #0 { 7; CHECK-LABEL: srem_combine_loop: 8; CHECK: // %bb.0: 9; CHECK-NEXT: mov z1.d, z0.d 10; CHECK-NEXT: ptrue p0.s 11; CHECK-NEXT: mov z2.s, #2 // =0x2 12; CHECK-NEXT: asrd z1.s, p0/m, z1.s, #1 13; CHECK-NEXT: mls z0.s, p0/m, z1.s, z2.s 14; CHECK-NEXT: ret 15 %rem = srem <vscale x 4 x i32> %a, splat (i32 2) 16 ret <vscale x 4 x i32> %rem 17} 18 19attributes #0 = { "target-features"="+sve" } 20