xref: /llvm-project/llvm/test/CodeGen/AArch64/sve-pred-arith.ll (revision cc82f1290a1e2157a6c0530d78d8cc84d2b8553d) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
3
4; LEGAL ADDS
5
6define <vscale x 16 x i1> @add_nxv16i1(<vscale x 16 x i1> %a, <vscale x 16 x i1> %b) {
7; CHECK-LABEL: add_nxv16i1:
8; CHECK:       // %bb.0:
9; CHECK-NEXT:    ptrue p2.b
10; CHECK-NEXT:    eor p0.b, p2/z, p0.b, p1.b
11; CHECK-NEXT:    ret
12  %res = add <vscale x 16 x i1> %a, %b
13  ret <vscale x 16 x i1> %res;
14}
15
16define <vscale x 8 x i1> @add_nxv8i1(<vscale x 8 x i1> %a, <vscale x 8 x i1> %b) {
17; CHECK-LABEL: add_nxv8i1:
18; CHECK:       // %bb.0:
19; CHECK-NEXT:    ptrue p2.h
20; CHECK-NEXT:    eor p0.b, p2/z, p0.b, p1.b
21; CHECK-NEXT:    ret
22  %res = add <vscale x 8 x i1> %a, %b
23  ret <vscale x 8 x i1> %res;
24}
25
26define <vscale x 4 x i1> @add_nxv4i1(<vscale x 4 x i1> %a, <vscale x 4 x i1> %b) {
27; CHECK-LABEL: add_nxv4i1:
28; CHECK:       // %bb.0:
29; CHECK-NEXT:    ptrue p2.s
30; CHECK-NEXT:    eor p0.b, p2/z, p0.b, p1.b
31; CHECK-NEXT:    ret
32  %res = add <vscale x 4 x i1> %a, %b
33  ret <vscale x 4 x i1> %res;
34}
35
36define <vscale x 2 x i1> @add_nxv2i1(<vscale x 2 x i1> %a, <vscale x 2 x i1> %b) {
37; CHECK-LABEL: add_nxv2i1:
38; CHECK:       // %bb.0:
39; CHECK-NEXT:    ptrue p2.d
40; CHECK-NEXT:    eor p0.b, p2/z, p0.b, p1.b
41; CHECK-NEXT:    ret
42  %res = add <vscale x 2 x i1> %a, %b
43  ret <vscale x 2 x i1> %res;
44}
45
46
47; ILLEGAL ADDS
48
49define aarch64_sve_vector_pcs <vscale x 64 x i1> @add_nxv64i1(<vscale x 64 x i1> %a, <vscale x 64 x i1> %b) uwtable {
50; CHECK-LABEL: add_nxv64i1:
51; CHECK:       // %bb.0:
52; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
53; CHECK-NEXT:    .cfi_def_cfa_offset 16
54; CHECK-NEXT:    .cfi_offset w29, -16
55; CHECK-NEXT:    addvl sp, sp, #-1
56; CHECK-NEXT:    .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG
57; CHECK-NEXT:    str p8, [sp, #3, mul vl] // 2-byte Folded Spill
58; CHECK-NEXT:    str p7, [sp, #4, mul vl] // 2-byte Folded Spill
59; CHECK-NEXT:    str p6, [sp, #5, mul vl] // 2-byte Folded Spill
60; CHECK-NEXT:    ptrue p6.b
61; CHECK-NEXT:    str p5, [sp, #6, mul vl] // 2-byte Folded Spill
62; CHECK-NEXT:    str p4, [sp, #7, mul vl] // 2-byte Folded Spill
63; CHECK-NEXT:    ldr p4, [x0]
64; CHECK-NEXT:    ldr p5, [x1]
65; CHECK-NEXT:    ldr p7, [x2]
66; CHECK-NEXT:    ldr p8, [x3]
67; CHECK-NEXT:    eor p0.b, p6/z, p0.b, p4.b
68; CHECK-NEXT:    eor p1.b, p6/z, p1.b, p5.b
69; CHECK-NEXT:    ldr p5, [sp, #6, mul vl] // 2-byte Folded Reload
70; CHECK-NEXT:    eor p2.b, p6/z, p2.b, p7.b
71; CHECK-NEXT:    ldr p7, [sp, #4, mul vl] // 2-byte Folded Reload
72; CHECK-NEXT:    eor p3.b, p6/z, p3.b, p8.b
73; CHECK-NEXT:    ldr p8, [sp, #3, mul vl] // 2-byte Folded Reload
74; CHECK-NEXT:    ldr p6, [sp, #5, mul vl] // 2-byte Folded Reload
75; CHECK-NEXT:    ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload
76; CHECK-NEXT:    addvl sp, sp, #1
77; CHECK-NEXT:    .cfi_def_cfa wsp, 16
78; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
79; CHECK-NEXT:    .cfi_def_cfa_offset 0
80; CHECK-NEXT:    .cfi_restore w29
81; CHECK-NEXT:    ret
82  %res = add <vscale x 64 x i1> %a, %b
83  ret <vscale x 64 x i1> %res;
84}
85
86
87; LEGAL SUBS
88
89define <vscale x 16 x i1> @sub_xv16i1(<vscale x 16 x i1> %a, <vscale x 16 x i1> %b) {
90; CHECK-LABEL: sub_xv16i1:
91; CHECK:       // %bb.0:
92; CHECK-NEXT:    ptrue p2.b
93; CHECK-NEXT:    eor p0.b, p2/z, p0.b, p1.b
94; CHECK-NEXT:    ret
95  %res = sub <vscale x 16 x i1> %a, %b
96  ret <vscale x 16 x i1> %res;
97}
98
99define <vscale x 8 x i1> @sub_xv8i1(<vscale x 8 x i1> %a, <vscale x 8 x i1> %b) {
100; CHECK-LABEL: sub_xv8i1:
101; CHECK:       // %bb.0:
102; CHECK-NEXT:    ptrue p2.h
103; CHECK-NEXT:    eor p0.b, p2/z, p0.b, p1.b
104; CHECK-NEXT:    ret
105  %res = sub <vscale x 8 x i1> %a, %b
106  ret <vscale x 8 x i1> %res;
107}
108
109define <vscale x 4 x i1> @sub_xv4i1(<vscale x 4 x i1> %a, <vscale x 4 x i1> %b) {
110; CHECK-LABEL: sub_xv4i1:
111; CHECK:       // %bb.0:
112; CHECK-NEXT:    ptrue p2.s
113; CHECK-NEXT:    eor p0.b, p2/z, p0.b, p1.b
114; CHECK-NEXT:    ret
115  %res = sub <vscale x 4 x i1> %a, %b
116  ret <vscale x 4 x i1> %res;
117}
118
119define <vscale x 2 x i1> @sub_xv2i1(<vscale x 2 x i1> %a, <vscale x 2 x i1> %b) {
120; CHECK-LABEL: sub_xv2i1:
121; CHECK:       // %bb.0:
122; CHECK-NEXT:    ptrue p2.d
123; CHECK-NEXT:    eor p0.b, p2/z, p0.b, p1.b
124; CHECK-NEXT:    ret
125  %res = sub <vscale x 2 x i1> %a, %b
126  ret <vscale x 2 x i1> %res;
127}
128
129
130; ILLEGAL SUBGS
131
132
133define aarch64_sve_vector_pcs <vscale x 64 x i1> @sub_nxv64i1(<vscale x 64 x i1> %a, <vscale x 64 x i1> %b) uwtable {
134; CHECK-LABEL: sub_nxv64i1:
135; CHECK:       // %bb.0:
136; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
137; CHECK-NEXT:    .cfi_def_cfa_offset 16
138; CHECK-NEXT:    .cfi_offset w29, -16
139; CHECK-NEXT:    addvl sp, sp, #-1
140; CHECK-NEXT:    .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG
141; CHECK-NEXT:    str p8, [sp, #3, mul vl] // 2-byte Folded Spill
142; CHECK-NEXT:    str p7, [sp, #4, mul vl] // 2-byte Folded Spill
143; CHECK-NEXT:    str p6, [sp, #5, mul vl] // 2-byte Folded Spill
144; CHECK-NEXT:    ptrue p6.b
145; CHECK-NEXT:    str p5, [sp, #6, mul vl] // 2-byte Folded Spill
146; CHECK-NEXT:    str p4, [sp, #7, mul vl] // 2-byte Folded Spill
147; CHECK-NEXT:    ldr p4, [x0]
148; CHECK-NEXT:    ldr p5, [x1]
149; CHECK-NEXT:    ldr p7, [x2]
150; CHECK-NEXT:    ldr p8, [x3]
151; CHECK-NEXT:    eor p0.b, p6/z, p0.b, p4.b
152; CHECK-NEXT:    eor p1.b, p6/z, p1.b, p5.b
153; CHECK-NEXT:    ldr p5, [sp, #6, mul vl] // 2-byte Folded Reload
154; CHECK-NEXT:    eor p2.b, p6/z, p2.b, p7.b
155; CHECK-NEXT:    ldr p7, [sp, #4, mul vl] // 2-byte Folded Reload
156; CHECK-NEXT:    eor p3.b, p6/z, p3.b, p8.b
157; CHECK-NEXT:    ldr p8, [sp, #3, mul vl] // 2-byte Folded Reload
158; CHECK-NEXT:    ldr p6, [sp, #5, mul vl] // 2-byte Folded Reload
159; CHECK-NEXT:    ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload
160; CHECK-NEXT:    addvl sp, sp, #1
161; CHECK-NEXT:    .cfi_def_cfa wsp, 16
162; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
163; CHECK-NEXT:    .cfi_def_cfa_offset 0
164; CHECK-NEXT:    .cfi_restore w29
165; CHECK-NEXT:    ret
166  %res = sub <vscale x 64 x i1> %a, %b
167  ret <vscale x 64 x i1> %res;
168}
169