xref: /llvm-project/llvm/test/CodeGen/AArch64/sve-pr62151.ll (revision cc82f1290a1e2157a6c0530d78d8cc84d2b8553d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc -mtriple=aarch64 -mattr=+sve  < %s | FileCheck %s
3
4
5define i32 @build_interpolation(<2 x i32> %0, <2 x i32> %1, <2 x i32> %2) {
6; CHECK-LABEL: build_interpolation:
7; CHECK:       // %bb.0: // %entry
8; CHECK-NEXT:    mul v0.2s, v1.2s, v0.2s
9; CHECK-NEXT:    ptrue p0.s, vl2
10; CHECK-NEXT:    // kill: def $d2 killed $d2 def $z2
11; CHECK-NEXT:    sdiv z0.s, p0/m, z0.s, z2.s
12; CHECK-NEXT:    mla v0.2s, v1.2s, v0.s[1]
13; CHECK-NEXT:    fmov w0, s0
14; CHECK-NEXT:    ret
15entry:
16  %3 = mul nsw <2 x i32> %1, %0
17  %4 = sdiv <2 x i32> %3, %2
18  %shift = shufflevector <2 x i32> %4, <2 x i32> poison, <2 x i32> <i32 1, i32 1>
19  %5 = mul nsw <2 x i32> %shift, %1
20  %6 = add nsw <2 x i32> %5, %4
21  %add = extractelement <2 x i32> %6, i64 0
22  ret i32 %add
23}
24