xref: /llvm-project/llvm/test/CodeGen/AArch64/sve-masked-scatter-vec-plus-imm.ll (revision 5ddce70ef0e5a641d7fea95e31fc5e2439cb98cb) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s
3
4define void @masked_scatter_nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x ptr> %bases, <vscale x 2 x i1> %mask) {
5; CHECK-LABEL: masked_scatter_nxv2i8:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    st1b { z0.d }, p0, [z1.d, #1]
8; CHECK-NEXT:    ret
9  %ptrs = getelementptr i8, <vscale x 2 x ptr> %bases, i32 1
10  call void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x ptr> %ptrs, i32 1, <vscale x 2 x i1> %mask)
11  ret void
12}
13
14define void @masked_scatter_nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x ptr> %bases, <vscale x 2 x i1> %mask) {
15; CHECK-LABEL: masked_scatter_nxv2i16:
16; CHECK:       // %bb.0:
17; CHECK-NEXT:    st1h { z0.d }, p0, [z1.d, #2]
18; CHECK-NEXT:    ret
19  %ptrs = getelementptr i16, <vscale x 2 x ptr> %bases, i32 1
20  call void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %mask)
21  ret void
22}
23
24define void @masked_scatter_nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x ptr> %bases, <vscale x 2 x i1> %mask) {
25; CHECK-LABEL: masked_scatter_nxv2i32:
26; CHECK:       // %bb.0:
27; CHECK-NEXT:    st1w { z0.d }, p0, [z1.d, #4]
28; CHECK-NEXT:    ret
29  %ptrs = getelementptr i32, <vscale x 2 x ptr> %bases, i32 1
30  call void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x ptr> %ptrs, i32 4, <vscale x 2 x i1> %mask)
31  ret void
32}
33
34define void @masked_scatter_nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x ptr> %bases, <vscale x 2 x i1> %mask) {
35; CHECK-LABEL: masked_scatter_nxv2i64:
36; CHECK:       // %bb.0:
37; CHECK-NEXT:    st1d { z0.d }, p0, [z1.d, #8]
38; CHECK-NEXT:    ret
39  %ptrs = getelementptr i64, <vscale x 2 x ptr> %bases, i32 1
40  call void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x ptr> %ptrs, i32 8, <vscale x 2 x i1> %mask)
41  ret void
42}
43
44define void @masked_scatter_nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x ptr> %bases, <vscale x 2 x i1> %mask) {
45; CHECK-LABEL: masked_scatter_nxv2f16:
46; CHECK:       // %bb.0:
47; CHECK-NEXT:    st1h { z0.d }, p0, [z1.d, #4]
48; CHECK-NEXT:    ret
49  %ptrs = getelementptr half, <vscale x 2 x ptr> %bases, i32 2
50  call void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %mask)
51  ret void
52}
53
54define void @masked_scatter_nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x ptr> %bases, <vscale x 2 x i1> %mask) #0 {
55; CHECK-LABEL: masked_scatter_nxv2bf16:
56; CHECK:       // %bb.0:
57; CHECK-NEXT:    st1h { z0.d }, p0, [z1.d, #4]
58; CHECK-NEXT:    ret
59  %ptrs = getelementptr bfloat, <vscale x 2 x ptr> %bases, i32 2
60  call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %mask)
61  ret void
62}
63
64define void @masked_scatter_nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x ptr> %bases, <vscale x 2 x i1> %mask) {
65; CHECK-LABEL: masked_scatter_nxv2f32:
66; CHECK:       // %bb.0:
67; CHECK-NEXT:    st1w { z0.d }, p0, [z1.d, #12]
68; CHECK-NEXT:    ret
69  %ptrs = getelementptr float, <vscale x 2 x ptr> %bases, i32 3
70  call void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x ptr> %ptrs, i32 4, <vscale x 2 x i1> %mask)
71  ret void
72}
73
74define void @masked_scatter_nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x ptr> %bases, <vscale x 2 x i1> %mask) {
75; CHECK-LABEL: masked_scatter_nxv2f64:
76; CHECK:       // %bb.0:
77; CHECK-NEXT:    st1d { z0.d }, p0, [z1.d, #32]
78; CHECK-NEXT:    ret
79  %ptrs = getelementptr double, <vscale x 2 x ptr> %bases, i32 4
80  call void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x ptr> %ptrs, i32 8, <vscale x 2 x i1> %mask)
81  ret void
82}
83
84; Test where the immediate is out of range
85
86define void @masked_scatter_nxv2i8_range(<vscale x 2 x i8> %data, <vscale x 2 x ptr> %bases, <vscale x 2 x i1> %mask) {
87; CHECK-LABEL: masked_scatter_nxv2i8_range:
88; CHECK:       // %bb.0:
89; CHECK-NEXT:    mov w8, #32
90; CHECK-NEXT:    st1b { z0.d }, p0, [x8, z1.d]
91; CHECK-NEXT:    ret
92  %ptrs = getelementptr i8, <vscale x 2 x ptr> %bases, i32 32
93  call void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x ptr> %ptrs, i32 1, <vscale x 2 x i1> %mask)
94  ret void
95}
96
97define void @masked_scatter_nxv2i16_range(<vscale x 2 x i16> %data, <vscale x 2 x ptr> %bases, <vscale x 2 x i1> %mask) {
98; CHECK-LABEL: masked_scatter_nxv2i16_range:
99; CHECK:       // %bb.0:
100; CHECK-NEXT:    mov w8, #64
101; CHECK-NEXT:    st1h { z0.d }, p0, [x8, z1.d]
102; CHECK-NEXT:    ret
103  %ptrs = getelementptr i16, <vscale x 2 x ptr> %bases, i32 32
104  call void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x ptr> %ptrs, i32 2, <vscale x 2 x i1> %mask)
105  ret void
106}
107
108define void @masked_scatter_nxv2i32_range(<vscale x 2 x i32> %data, <vscale x 2 x ptr> %bases, <vscale x 2 x i1> %mask) {
109; CHECK-LABEL: masked_scatter_nxv2i32_range:
110; CHECK:       // %bb.0:
111; CHECK-NEXT:    mov w8, #128
112; CHECK-NEXT:    st1w { z0.d }, p0, [x8, z1.d]
113; CHECK-NEXT:    ret
114  %ptrs = getelementptr i32, <vscale x 2 x ptr> %bases, i32 32
115  call void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x ptr> %ptrs, i32 1, <vscale x 2 x i1> %mask)
116  ret void
117}
118
119define void @masked_scatter_nxv2f64_range(<vscale x 2 x double> %data, <vscale x 2 x ptr> %bases, <vscale x 2 x i1> %mask) {
120; CHECK-LABEL: masked_scatter_nxv2f64_range:
121; CHECK:       // %bb.0:
122; CHECK-NEXT:    mov w8, #256
123; CHECK-NEXT:    st1d { z0.d }, p0, [x8, z1.d]
124; CHECK-NEXT:    ret
125  %ptrs = getelementptr double, <vscale x 2 x ptr> %bases, i32 32
126  call void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x ptr> %ptrs, i32 8, <vscale x 2 x i1> %mask)
127  ret void
128}
129
130declare void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x ptr>,  i32, <vscale x 2 x i1>)
131declare void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)
132declare void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)
133declare void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)
134declare void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)
135declare void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)
136declare void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)
137declare void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)
138attributes #0 = { "target-features"="+sve,+bf16" }
139