xref: /llvm-project/llvm/test/CodeGen/AArch64/sve-masked-scatter-32b-scaled.ll (revision 5ddce70ef0e5a641d7fea95e31fc5e2439cb98cb) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
3
4;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
5; scaled unpacked 32-bit offsets
6;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
7
8define void @masked_scatter_nxv2i16_sext(<vscale x 2 x i16> %data, ptr %base, <vscale x 2 x i32> %indexes, <vscale x 2 x i1> %masks) nounwind {
9; CHECK-LABEL: masked_scatter_nxv2i16_sext:
10; CHECK:       // %bb.0:
11; CHECK-NEXT:    st1h { z0.d }, p0, [x0, z1.d, sxtw #1]
12; CHECK-NEXT:    ret
13  %ext = sext <vscale x 2 x i32> %indexes to <vscale x 2 x i64>
14  %ptrs = getelementptr i16, ptr %base, <vscale x 2 x i64> %ext
15  call void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)
16  ret void
17}
18
19define void @masked_scatter_nxv2i32_sext(<vscale x 2 x i32> %data, ptr %base, <vscale x 2 x i32> %indexes, <vscale x 2 x i1> %masks) nounwind {
20; CHECK-LABEL: masked_scatter_nxv2i32_sext:
21; CHECK:       // %bb.0:
22; CHECK-NEXT:    st1w { z0.d }, p0, [x0, z1.d, sxtw #2]
23; CHECK-NEXT:    ret
24  %ext = sext <vscale x 2 x i32> %indexes to <vscale x 2 x i64>
25  %ptrs = getelementptr i32, ptr %base, <vscale x 2 x i64> %ext
26  call void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)
27  ret void
28}
29
30define void @masked_scatter_nxv2i64_sext(<vscale x 2 x i64> %data, ptr %base, <vscale x 2 x i32> %indexes, <vscale x 2 x i1> %masks) nounwind {
31; CHECK-LABEL: masked_scatter_nxv2i64_sext:
32; CHECK:       // %bb.0:
33; CHECK-NEXT:    st1d { z0.d }, p0, [x0, z1.d, sxtw #3]
34; CHECK-NEXT:    ret
35  %ext = sext <vscale x 2 x i32> %indexes to <vscale x 2 x i64>
36  %ptrs = getelementptr i64, ptr %base, <vscale x 2 x i64> %ext
37  call void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)
38  ret void
39}
40
41define void @masked_scatter_nxv2f16_sext(<vscale x 2 x half> %data, ptr %base, <vscale x 2 x i32> %indexes, <vscale x 2 x i1> %masks) nounwind {
42; CHECK-LABEL: masked_scatter_nxv2f16_sext:
43; CHECK:       // %bb.0:
44; CHECK-NEXT:    st1h { z0.d }, p0, [x0, z1.d, sxtw #1]
45; CHECK-NEXT:    ret
46  %ext = sext <vscale x 2 x i32> %indexes to <vscale x 2 x i64>
47  %ptrs = getelementptr half, ptr %base, <vscale x 2 x i64> %ext
48  call void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)
49  ret void
50}
51
52define void @masked_scatter_nxv2bf16_sext(<vscale x 2 x bfloat> %data, ptr %base, <vscale x 2 x i32> %indexes, <vscale x 2 x i1> %masks) nounwind #0 {
53; CHECK-LABEL: masked_scatter_nxv2bf16_sext:
54; CHECK:       // %bb.0:
55; CHECK-NEXT:    st1h { z0.d }, p0, [x0, z1.d, sxtw #1]
56; CHECK-NEXT:    ret
57  %ext = sext <vscale x 2 x i32> %indexes to <vscale x 2 x i64>
58  %ptrs = getelementptr bfloat, ptr %base, <vscale x 2 x i64> %ext
59  call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)
60  ret void
61}
62
63define void @masked_scatter_nxv2f32_sext(<vscale x 2 x float> %data, ptr %base, <vscale x 2 x i32> %indexes, <vscale x 2 x i1> %masks) nounwind {
64; CHECK-LABEL: masked_scatter_nxv2f32_sext:
65; CHECK:       // %bb.0:
66; CHECK-NEXT:    st1w { z0.d }, p0, [x0, z1.d, sxtw #2]
67; CHECK-NEXT:    ret
68  %ext = sext <vscale x 2 x i32> %indexes to <vscale x 2 x i64>
69  %ptrs = getelementptr float, ptr %base, <vscale x 2 x i64> %ext
70  call void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)
71  ret void
72}
73
74define void @masked_scatter_nxv2f64_sext(<vscale x 2 x double> %data, ptr %base, <vscale x 2 x i32> %indexes, <vscale x 2 x i1> %masks) nounwind {
75; CHECK-LABEL: masked_scatter_nxv2f64_sext:
76; CHECK:       // %bb.0:
77; CHECK-NEXT:    st1d { z0.d }, p0, [x0, z1.d, sxtw #3]
78; CHECK-NEXT:    ret
79  %ext = sext <vscale x 2 x i32> %indexes to <vscale x 2 x i64>
80  %ptrs = getelementptr double, ptr %base, <vscale x 2 x i64> %ext
81  call void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)
82  ret void
83}
84
85define void @masked_scatter_nxv2i16_zext(<vscale x 2 x i16> %data, ptr %base, <vscale x 2 x i32> %indexes, <vscale x 2 x i1> %masks) nounwind {
86; CHECK-LABEL: masked_scatter_nxv2i16_zext:
87; CHECK:       // %bb.0:
88; CHECK-NEXT:    st1h { z0.d }, p0, [x0, z1.d, uxtw #1]
89; CHECK-NEXT:    ret
90  %ext = zext <vscale x 2 x i32> %indexes to <vscale x 2 x i64>
91  %ptrs = getelementptr i16, ptr %base, <vscale x 2 x i64> %ext
92  call void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)
93  ret void
94}
95
96define void @masked_scatter_nxv2i32_zext(<vscale x 2 x i32> %data, ptr %base, <vscale x 2 x i32> %indexes, <vscale x 2 x i1> %masks) nounwind {
97; CHECK-LABEL: masked_scatter_nxv2i32_zext:
98; CHECK:       // %bb.0:
99; CHECK-NEXT:    st1w { z0.d }, p0, [x0, z1.d, uxtw #2]
100; CHECK-NEXT:    ret
101  %ext = zext <vscale x 2 x i32> %indexes to <vscale x 2 x i64>
102  %ptrs = getelementptr i32, ptr %base, <vscale x 2 x i64> %ext
103  call void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)
104  ret void
105}
106
107define void @masked_scatter_nxv2i64_zext(<vscale x 2 x i64> %data, ptr %base, <vscale x 2 x i32> %indexes, <vscale x 2 x i1> %masks) nounwind {
108; CHECK-LABEL: masked_scatter_nxv2i64_zext:
109; CHECK:       // %bb.0:
110; CHECK-NEXT:    st1d { z0.d }, p0, [x0, z1.d, uxtw #3]
111; CHECK-NEXT:    ret
112  %ext = zext <vscale x 2 x i32> %indexes to <vscale x 2 x i64>
113  %ptrs = getelementptr i64, ptr %base, <vscale x 2 x i64> %ext
114  call void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)
115  ret void
116}
117
118define void @masked_scatter_nxv2f16_zext(<vscale x 2 x half> %data, ptr %base, <vscale x 2 x i32> %indexes, <vscale x 2 x i1> %masks) nounwind {
119; CHECK-LABEL: masked_scatter_nxv2f16_zext:
120; CHECK:       // %bb.0:
121; CHECK-NEXT:    st1h { z0.d }, p0, [x0, z1.d, uxtw #1]
122; CHECK-NEXT:    ret
123  %ext = zext <vscale x 2 x i32> %indexes to <vscale x 2 x i64>
124  %ptrs = getelementptr half, ptr %base, <vscale x 2 x i64> %ext
125  call void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)
126  ret void
127}
128
129define void @masked_scatter_nxv2bf16_zext(<vscale x 2 x bfloat> %data, ptr %base, <vscale x 2 x i32> %indexes, <vscale x 2 x i1> %masks) nounwind #0 {
130; CHECK-LABEL: masked_scatter_nxv2bf16_zext:
131; CHECK:       // %bb.0:
132; CHECK-NEXT:    st1h { z0.d }, p0, [x0, z1.d, uxtw #1]
133; CHECK-NEXT:    ret
134  %ext = zext <vscale x 2 x i32> %indexes to <vscale x 2 x i64>
135  %ptrs = getelementptr bfloat, ptr %base, <vscale x 2 x i64> %ext
136  call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)
137  ret void
138}
139
140define void @masked_scatter_nxv2f32_zext(<vscale x 2 x float> %data, ptr %base, <vscale x 2 x i32> %indexes, <vscale x 2 x i1> %masks) nounwind {
141; CHECK-LABEL: masked_scatter_nxv2f32_zext:
142; CHECK:       // %bb.0:
143; CHECK-NEXT:    st1w { z0.d }, p0, [x0, z1.d, uxtw #2]
144; CHECK-NEXT:    ret
145  %ext = zext <vscale x 2 x i32> %indexes to <vscale x 2 x i64>
146  %ptrs = getelementptr float, ptr %base, <vscale x 2 x i64> %ext
147  call void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)
148  ret void
149}
150
151define void @masked_scatter_nxv2f64_zext(<vscale x 2 x double> %data, ptr %base, <vscale x 2 x i32> %indexes, <vscale x 2 x i1> %masks) nounwind {
152; CHECK-LABEL: masked_scatter_nxv2f64_zext:
153; CHECK:       // %bb.0:
154; CHECK-NEXT:    st1d { z0.d }, p0, [x0, z1.d, uxtw #3]
155; CHECK-NEXT:    ret
156  %ext = zext <vscale x 2 x i32> %indexes to <vscale x 2 x i64>
157  %ptrs = getelementptr double, ptr %base, <vscale x 2 x i64> %ext
158  call void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)
159  ret void
160}
161
162;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
163; scaled packed 32-bit offset
164;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
165
166define void @masked_scatter_nxv4i16_sext(<vscale x 4 x i16> %data, ptr %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind {
167; CHECK-LABEL: masked_scatter_nxv4i16_sext:
168; CHECK:       // %bb.0:
169; CHECK-NEXT:    st1h { z0.s }, p0, [x0, z1.s, sxtw #1]
170; CHECK-NEXT:    ret
171  %ext = sext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
172  %ptrs = getelementptr i16, ptr %base, <vscale x 4 x i64> %ext
173  call void @llvm.masked.scatter.nxv4i16(<vscale x 4 x i16> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)
174  ret void
175}
176
177define void @masked_scatter_nxv4i32_sext(<vscale x 4 x i32> %data, ptr %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind {
178; CHECK-LABEL: masked_scatter_nxv4i32_sext:
179; CHECK:       // %bb.0:
180; CHECK-NEXT:    st1w { z0.s }, p0, [x0, z1.s, sxtw #2]
181; CHECK-NEXT:    ret
182  %ext = sext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
183  %ptrs = getelementptr i32, ptr %base, <vscale x 4 x i64> %ext
184  call void @llvm.masked.scatter.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)
185  ret void
186}
187
188define void @masked_scatter_nxv4f16_sext(<vscale x 4 x half> %data, ptr %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind {
189; CHECK-LABEL: masked_scatter_nxv4f16_sext:
190; CHECK:       // %bb.0:
191; CHECK-NEXT:    st1h { z0.s }, p0, [x0, z1.s, sxtw #1]
192; CHECK-NEXT:    ret
193  %ext = sext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
194  %ptrs = getelementptr half, ptr %base, <vscale x 4 x i64> %ext
195  call void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)
196  ret void
197}
198
199define void @masked_scatter_nxv4bf16_sext(<vscale x 4 x bfloat> %data, ptr %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind #0 {
200; CHECK-LABEL: masked_scatter_nxv4bf16_sext:
201; CHECK:       // %bb.0:
202; CHECK-NEXT:    st1h { z0.s }, p0, [x0, z1.s, sxtw #1]
203; CHECK-NEXT:    ret
204  %ext = sext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
205  %ptrs = getelementptr bfloat, ptr %base, <vscale x 4 x i64> %ext
206  call void @llvm.masked.scatter.nxv4bf16(<vscale x 4 x bfloat> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)
207  ret void
208}
209
210define void @masked_scatter_nxv4f32_sext(<vscale x 4 x float> %data, ptr %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind #0 {
211; CHECK-LABEL: masked_scatter_nxv4f32_sext:
212; CHECK:       // %bb.0:
213; CHECK-NEXT:    st1w { z0.s }, p0, [x0, z1.s, sxtw #2]
214; CHECK-NEXT:    ret
215  %ext = sext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
216  %ptrs = getelementptr float, ptr %base, <vscale x 4 x i64> %ext
217  call void @llvm.masked.scatter.nxv4f32(<vscale x 4 x float> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)
218  ret void
219}
220
221define void @masked_scatter_nxv4i16_zext(<vscale x 4 x i16> %data, ptr %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind {
222; CHECK-LABEL: masked_scatter_nxv4i16_zext:
223; CHECK:       // %bb.0:
224; CHECK-NEXT:    st1h { z0.s }, p0, [x0, z1.s, uxtw #1]
225; CHECK-NEXT:    ret
226  %ext = zext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
227  %ptrs = getelementptr i16, ptr %base, <vscale x 4 x i64> %ext
228  call void @llvm.masked.scatter.nxv4i16(<vscale x 4 x i16> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)
229  ret void
230}
231
232define void @masked_scatter_nxv4i32_zext(<vscale x 4 x i32> %data, ptr %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind {
233; CHECK-LABEL: masked_scatter_nxv4i32_zext:
234; CHECK:       // %bb.0:
235; CHECK-NEXT:    st1w { z0.s }, p0, [x0, z1.s, uxtw #2]
236; CHECK-NEXT:    ret
237  %ext = zext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
238  %ptrs = getelementptr i32, ptr %base, <vscale x 4 x i64> %ext
239  call void @llvm.masked.scatter.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)
240  ret void
241}
242
243define void @masked_scatter_nxv4f16_zext(<vscale x 4 x half> %data, ptr %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind {
244; CHECK-LABEL: masked_scatter_nxv4f16_zext:
245; CHECK:       // %bb.0:
246; CHECK-NEXT:    st1h { z0.s }, p0, [x0, z1.s, uxtw #1]
247; CHECK-NEXT:    ret
248  %ext = zext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
249  %ptrs = getelementptr half, ptr %base, <vscale x 4 x i64> %ext
250  call void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)
251  ret void
252}
253
254define void @masked_scatter_nxv4bf16_zext(<vscale x 4 x bfloat> %data, ptr %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind #0 {
255; CHECK-LABEL: masked_scatter_nxv4bf16_zext:
256; CHECK:       // %bb.0:
257; CHECK-NEXT:    st1h { z0.s }, p0, [x0, z1.s, uxtw #1]
258; CHECK-NEXT:    ret
259  %ext = zext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
260  %ptrs = getelementptr bfloat, ptr %base, <vscale x 4 x i64> %ext
261  call void @llvm.masked.scatter.nxv4bf16(<vscale x 4 x bfloat> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)
262  ret void
263}
264
265define void @masked_scatter_nxv4f32_zext(<vscale x 4 x float> %data, ptr %base, <vscale x 4 x i32> %indexes, <vscale x 4 x i1> %masks) nounwind #0 {
266; CHECK-LABEL: masked_scatter_nxv4f32_zext:
267; CHECK:       // %bb.0:
268; CHECK-NEXT:    st1w { z0.s }, p0, [x0, z1.s, uxtw #2]
269; CHECK-NEXT:    ret
270  %ext = zext <vscale x 4 x i32> %indexes to <vscale x 4 x i64>
271  %ptrs = getelementptr float, ptr %base, <vscale x 4 x i64> %ext
272  call void @llvm.masked.scatter.nxv4f32(<vscale x 4 x float> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)
273  ret void
274}
275
276declare void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)
277declare void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)
278declare void @llvm.masked.scatter.nxv4bf16(<vscale x 4 x bfloat>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)
279declare void @llvm.masked.scatter.nxv4f32(<vscale x 4 x float>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)
280declare void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)
281declare void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)
282declare void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)
283declare void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)
284declare void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)
285declare void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)
286declare void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)
287declare void @llvm.masked.scatter.nxv4i16(<vscale x 4 x i16>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)
288declare void @llvm.masked.scatter.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)
289declare void @llvm.masked.scatter.nxv4i8(<vscale x 4 x i8>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)
290attributes #0 = { "target-features"="+sve,+bf16" }
291