1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=aarch64 -mattr=+sve | FileCheck %s 3 4define <vscale x 1 x i64> @llrint_v1i64_v1f16(<vscale x 1 x half> %x) { 5; CHECK-LABEL: llrint_v1i64_v1f16: 6; CHECK: // %bb.0: 7; CHECK-NEXT: ptrue p0.d 8; CHECK-NEXT: mov w8, #64511 // =0xfbff 9; CHECK-NEXT: mov z2.d, #0x8000000000000000 10; CHECK-NEXT: mov z1.h, w8 11; CHECK-NEXT: mov w8, #31743 // =0x7bff 12; CHECK-NEXT: frintx z0.h, p0/m, z0.h 13; CHECK-NEXT: mov z3.h, w8 14; CHECK-NEXT: fcmge p1.h, p0/z, z0.h, z1.h 15; CHECK-NEXT: movprfx z1, z0 16; CHECK-NEXT: fcvtzs z1.d, p0/m, z0.h 17; CHECK-NEXT: fcmgt p2.h, p0/z, z0.h, z3.h 18; CHECK-NEXT: mov z3.d, #0x7fffffffffffffff 19; CHECK-NEXT: not p1.b, p0/z, p1.b 20; CHECK-NEXT: fcmuo p0.h, p0/z, z0.h, z0.h 21; CHECK-NEXT: mov z1.d, p1/m, z2.d 22; CHECK-NEXT: sel z0.d, p2, z3.d, z1.d 23; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x0 24; CHECK-NEXT: ret 25 %a = call <vscale x 1 x i64> @llvm.llrint.nxv1i64.nxv1f16(<vscale x 1 x half> %x) 26 ret <vscale x 1 x i64> %a 27} 28declare <vscale x 1 x i64> @llvm.llrint.nxv1i64.nxv1f16(<vscale x 1 x half>) 29 30define <vscale x 2 x i64> @llrint_v1i64_v2f16(<vscale x 2 x half> %x) { 31; CHECK-LABEL: llrint_v1i64_v2f16: 32; CHECK: // %bb.0: 33; CHECK-NEXT: ptrue p0.d 34; CHECK-NEXT: mov w8, #64511 // =0xfbff 35; CHECK-NEXT: mov z2.d, #0x8000000000000000 36; CHECK-NEXT: mov z1.h, w8 37; CHECK-NEXT: mov w8, #31743 // =0x7bff 38; CHECK-NEXT: frintx z0.h, p0/m, z0.h 39; CHECK-NEXT: mov z3.h, w8 40; CHECK-NEXT: fcmge p1.h, p0/z, z0.h, z1.h 41; CHECK-NEXT: movprfx z1, z0 42; CHECK-NEXT: fcvtzs z1.d, p0/m, z0.h 43; CHECK-NEXT: fcmgt p2.h, p0/z, z0.h, z3.h 44; CHECK-NEXT: mov z3.d, #0x7fffffffffffffff 45; CHECK-NEXT: not p1.b, p0/z, p1.b 46; CHECK-NEXT: fcmuo p0.h, p0/z, z0.h, z0.h 47; CHECK-NEXT: mov z1.d, p1/m, z2.d 48; CHECK-NEXT: sel z0.d, p2, z3.d, z1.d 49; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x0 50; CHECK-NEXT: ret 51 %a = call <vscale x 2 x i64> @llvm.llrint.nxv2i64.nxv2f16(<vscale x 2 x half> %x) 52 ret <vscale x 2 x i64> %a 53} 54declare <vscale x 2 x i64> @llvm.llrint.nxv2i64.nxv2f16(<vscale x 2 x half>) 55 56define <vscale x 4 x i64> @llrint_v4i64_v4f16(<vscale x 4 x half> %x) { 57; CHECK-LABEL: llrint_v4i64_v4f16: 58; CHECK: // %bb.0: 59; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill 60; CHECK-NEXT: addvl sp, sp, #-1 61; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill 62; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG 63; CHECK-NEXT: .cfi_offset w29, -16 64; CHECK-NEXT: uunpklo z1.d, z0.s 65; CHECK-NEXT: uunpkhi z0.d, z0.s 66; CHECK-NEXT: mov w8, #64511 // =0xfbff 67; CHECK-NEXT: ptrue p0.d 68; CHECK-NEXT: mov z2.h, w8 69; CHECK-NEXT: mov w8, #31743 // =0x7bff 70; CHECK-NEXT: mov z3.h, w8 71; CHECK-NEXT: mov z6.d, #0x7fffffffffffffff 72; CHECK-NEXT: frintx z1.h, p0/m, z1.h 73; CHECK-NEXT: frintx z0.h, p0/m, z0.h 74; CHECK-NEXT: fcmge p1.h, p0/z, z1.h, z2.h 75; CHECK-NEXT: fcmge p2.h, p0/z, z0.h, z2.h 76; CHECK-NEXT: mov z2.d, #0x8000000000000000 77; CHECK-NEXT: movprfx z4, z1 78; CHECK-NEXT: fcvtzs z4.d, p0/m, z1.h 79; CHECK-NEXT: movprfx z5, z0 80; CHECK-NEXT: fcvtzs z5.d, p0/m, z0.h 81; CHECK-NEXT: fcmgt p3.h, p0/z, z1.h, z3.h 82; CHECK-NEXT: fcmgt p4.h, p0/z, z0.h, z3.h 83; CHECK-NEXT: not p1.b, p0/z, p1.b 84; CHECK-NEXT: not p2.b, p0/z, p2.b 85; CHECK-NEXT: sel z3.d, p1, z2.d, z4.d 86; CHECK-NEXT: fcmuo p1.h, p0/z, z1.h, z1.h 87; CHECK-NEXT: fcmuo p0.h, p0/z, z0.h, z0.h 88; CHECK-NEXT: sel z2.d, p2, z2.d, z5.d 89; CHECK-NEXT: sel z0.d, p3, z6.d, z3.d 90; CHECK-NEXT: sel z1.d, p4, z6.d, z2.d 91; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload 92; CHECK-NEXT: mov z0.d, p1/m, #0 // =0x0 93; CHECK-NEXT: mov z1.d, p0/m, #0 // =0x0 94; CHECK-NEXT: addvl sp, sp, #1 95; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload 96; CHECK-NEXT: ret 97 %a = call <vscale x 4 x i64> @llvm.llrint.nxv4i64.nxv4f16(<vscale x 4 x half> %x) 98 ret <vscale x 4 x i64> %a 99} 100declare <vscale x 4 x i64> @llvm.llrint.nxv4i64.nxv4f16(<vscale x 4 x half>) 101 102define <vscale x 8 x i64> @llrint_v8i64_v8f16(<vscale x 8 x half> %x) { 103; CHECK-LABEL: llrint_v8i64_v8f16: 104; CHECK: // %bb.0: 105; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill 106; CHECK-NEXT: addvl sp, sp, #-1 107; CHECK-NEXT: str p7, [sp, #4, mul vl] // 2-byte Folded Spill 108; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Folded Spill 109; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Folded Spill 110; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill 111; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG 112; CHECK-NEXT: .cfi_offset w29, -16 113; CHECK-NEXT: uunpklo z1.s, z0.h 114; CHECK-NEXT: uunpkhi z0.s, z0.h 115; CHECK-NEXT: mov w8, #64511 // =0xfbff 116; CHECK-NEXT: ptrue p0.d 117; CHECK-NEXT: mov z4.h, w8 118; CHECK-NEXT: mov w8, #31743 // =0x7bff 119; CHECK-NEXT: mov z6.h, w8 120; CHECK-NEXT: mov z26.d, #0x7fffffffffffffff 121; CHECK-NEXT: uunpklo z2.d, z1.s 122; CHECK-NEXT: uunpkhi z1.d, z1.s 123; CHECK-NEXT: uunpklo z3.d, z0.s 124; CHECK-NEXT: uunpkhi z0.d, z0.s 125; CHECK-NEXT: frintx z2.h, p0/m, z2.h 126; CHECK-NEXT: frintx z1.h, p0/m, z1.h 127; CHECK-NEXT: frintx z3.h, p0/m, z3.h 128; CHECK-NEXT: movprfx z5, z0 129; CHECK-NEXT: frintx z5.h, p0/m, z0.h 130; CHECK-NEXT: mov z0.d, #0x8000000000000000 131; CHECK-NEXT: fcmge p1.h, p0/z, z2.h, z4.h 132; CHECK-NEXT: fcmge p2.h, p0/z, z1.h, z4.h 133; CHECK-NEXT: fcmge p3.h, p0/z, z3.h, z4.h 134; CHECK-NEXT: fcmge p4.h, p0/z, z5.h, z4.h 135; CHECK-NEXT: movprfx z4, z2 136; CHECK-NEXT: fcvtzs z4.d, p0/m, z2.h 137; CHECK-NEXT: movprfx z7, z1 138; CHECK-NEXT: fcvtzs z7.d, p0/m, z1.h 139; CHECK-NEXT: movprfx z24, z3 140; CHECK-NEXT: fcvtzs z24.d, p0/m, z3.h 141; CHECK-NEXT: movprfx z25, z5 142; CHECK-NEXT: fcvtzs z25.d, p0/m, z5.h 143; CHECK-NEXT: fcmgt p7.h, p0/z, z3.h, z6.h 144; CHECK-NEXT: fcmgt p5.h, p0/z, z2.h, z6.h 145; CHECK-NEXT: fcmgt p6.h, p0/z, z1.h, z6.h 146; CHECK-NEXT: not p1.b, p0/z, p1.b 147; CHECK-NEXT: not p2.b, p0/z, p2.b 148; CHECK-NEXT: not p3.b, p0/z, p3.b 149; CHECK-NEXT: mov z4.d, p1/m, z0.d 150; CHECK-NEXT: fcmgt p1.h, p0/z, z5.h, z6.h 151; CHECK-NEXT: not p4.b, p0/z, p4.b 152; CHECK-NEXT: sel z6.d, p2, z0.d, z7.d 153; CHECK-NEXT: fcmuo p2.h, p0/z, z2.h, z2.h 154; CHECK-NEXT: sel z7.d, p3, z0.d, z24.d 155; CHECK-NEXT: fcmuo p3.h, p0/z, z1.h, z1.h 156; CHECK-NEXT: sel z24.d, p4, z0.d, z25.d 157; CHECK-NEXT: fcmuo p4.h, p0/z, z3.h, z3.h 158; CHECK-NEXT: fcmuo p0.h, p0/z, z5.h, z5.h 159; CHECK-NEXT: sel z0.d, p5, z26.d, z4.d 160; CHECK-NEXT: sel z1.d, p6, z26.d, z6.d 161; CHECK-NEXT: ldr p6, [sp, #5, mul vl] // 2-byte Folded Reload 162; CHECK-NEXT: sel z2.d, p7, z26.d, z7.d 163; CHECK-NEXT: ldr p7, [sp, #4, mul vl] // 2-byte Folded Reload 164; CHECK-NEXT: sel z3.d, p1, z26.d, z24.d 165; CHECK-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Folded Reload 166; CHECK-NEXT: mov z0.d, p2/m, #0 // =0x0 167; CHECK-NEXT: mov z1.d, p3/m, #0 // =0x0 168; CHECK-NEXT: mov z2.d, p4/m, #0 // =0x0 169; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload 170; CHECK-NEXT: mov z3.d, p0/m, #0 // =0x0 171; CHECK-NEXT: addvl sp, sp, #1 172; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload 173; CHECK-NEXT: ret 174 %a = call <vscale x 8 x i64> @llvm.llrint.nxv8i64.nxv8f16(<vscale x 8 x half> %x) 175 ret <vscale x 8 x i64> %a 176} 177declare <vscale x 8 x i64> @llvm.llrint.nxv8i64.nxv8f16(<vscale x 8 x half>) 178 179define <vscale x 16 x i64> @llrint_v16i64_v16f16(<vscale x 16 x half> %x) { 180; CHECK-LABEL: llrint_v16i64_v16f16: 181; CHECK: // %bb.0: 182; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill 183; CHECK-NEXT: addvl sp, sp, #-3 184; CHECK-NEXT: str p10, [sp, #1, mul vl] // 2-byte Folded Spill 185; CHECK-NEXT: str p9, [sp, #2, mul vl] // 2-byte Folded Spill 186; CHECK-NEXT: str p8, [sp, #3, mul vl] // 2-byte Folded Spill 187; CHECK-NEXT: str p7, [sp, #4, mul vl] // 2-byte Folded Spill 188; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Folded Spill 189; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Folded Spill 190; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill 191; CHECK-NEXT: str z9, [sp, #1, mul vl] // 16-byte Folded Spill 192; CHECK-NEXT: str z8, [sp, #2, mul vl] // 16-byte Folded Spill 193; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x18, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 24 * VG 194; CHECK-NEXT: .cfi_offset w29, -16 195; CHECK-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG 196; CHECK-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG 197; CHECK-NEXT: uunpklo z2.s, z0.h 198; CHECK-NEXT: uunpkhi z0.s, z0.h 199; CHECK-NEXT: mov w8, #64511 // =0xfbff 200; CHECK-NEXT: uunpklo z4.s, z1.h 201; CHECK-NEXT: ptrue p0.d 202; CHECK-NEXT: uunpkhi z1.s, z1.h 203; CHECK-NEXT: mov z5.h, w8 204; CHECK-NEXT: mov w8, #31743 // =0x7bff 205; CHECK-NEXT: mov z25.d, #0x8000000000000000 206; CHECK-NEXT: mov z27.h, w8 207; CHECK-NEXT: mov z7.d, #0x7fffffffffffffff 208; CHECK-NEXT: uunpklo z3.d, z2.s 209; CHECK-NEXT: uunpkhi z2.d, z2.s 210; CHECK-NEXT: uunpklo z6.d, z0.s 211; CHECK-NEXT: uunpkhi z0.d, z0.s 212; CHECK-NEXT: uunpklo z24.d, z4.s 213; CHECK-NEXT: uunpkhi z4.d, z4.s 214; CHECK-NEXT: uunpklo z26.d, z1.s 215; CHECK-NEXT: uunpkhi z1.d, z1.s 216; CHECK-NEXT: frintx z2.h, p0/m, z2.h 217; CHECK-NEXT: frintx z3.h, p0/m, z3.h 218; CHECK-NEXT: frintx z6.h, p0/m, z6.h 219; CHECK-NEXT: movprfx z28, z0 220; CHECK-NEXT: frintx z28.h, p0/m, z0.h 221; CHECK-NEXT: movprfx z29, z4 222; CHECK-NEXT: frintx z29.h, p0/m, z4.h 223; CHECK-NEXT: frintx z24.h, p0/m, z24.h 224; CHECK-NEXT: movprfx z30, z1 225; CHECK-NEXT: frintx z30.h, p0/m, z1.h 226; CHECK-NEXT: frintx z26.h, p0/m, z26.h 227; CHECK-NEXT: fcmge p5.h, p0/z, z2.h, z5.h 228; CHECK-NEXT: fcmge p2.h, p0/z, z3.h, z5.h 229; CHECK-NEXT: movprfx z1, z2 230; CHECK-NEXT: fcvtzs z1.d, p0/m, z2.h 231; CHECK-NEXT: movprfx z0, z3 232; CHECK-NEXT: fcvtzs z0.d, p0/m, z3.h 233; CHECK-NEXT: fcmge p6.h, p0/z, z6.h, z5.h 234; CHECK-NEXT: fcmgt p3.h, p0/z, z3.h, z27.h 235; CHECK-NEXT: fcmuo p1.h, p0/z, z3.h, z3.h 236; CHECK-NEXT: fcmge p7.h, p0/z, z28.h, z5.h 237; CHECK-NEXT: movprfx z3, z6 238; CHECK-NEXT: fcvtzs z3.d, p0/m, z6.h 239; CHECK-NEXT: fcmge p8.h, p0/z, z24.h, z5.h 240; CHECK-NEXT: fcmgt p4.h, p0/z, z2.h, z27.h 241; CHECK-NEXT: fcmge p9.h, p0/z, z26.h, z5.h 242; CHECK-NEXT: not p5.b, p0/z, p5.b 243; CHECK-NEXT: movprfx z4, z24 244; CHECK-NEXT: fcvtzs z4.d, p0/m, z24.h 245; CHECK-NEXT: fcmge p10.h, p0/z, z30.h, z5.h 246; CHECK-NEXT: not p2.b, p0/z, p2.b 247; CHECK-NEXT: movprfx z31, z26 248; CHECK-NEXT: fcvtzs z31.d, p0/m, z26.h 249; CHECK-NEXT: movprfx z8, z30 250; CHECK-NEXT: fcvtzs z8.d, p0/m, z30.h 251; CHECK-NEXT: mov z1.d, p5/m, z25.d 252; CHECK-NEXT: fcmge p5.h, p0/z, z29.h, z5.h 253; CHECK-NEXT: not p6.b, p0/z, p6.b 254; CHECK-NEXT: mov z0.d, p2/m, z25.d 255; CHECK-NEXT: fcmuo p2.h, p0/z, z2.h, z2.h 256; CHECK-NEXT: movprfx z2, z28 257; CHECK-NEXT: fcvtzs z2.d, p0/m, z28.h 258; CHECK-NEXT: movprfx z5, z29 259; CHECK-NEXT: fcvtzs z5.d, p0/m, z29.h 260; CHECK-NEXT: not p7.b, p0/z, p7.b 261; CHECK-NEXT: mov z3.d, p6/m, z25.d 262; CHECK-NEXT: not p6.b, p0/z, p8.b 263; CHECK-NEXT: fcmgt p8.h, p0/z, z6.h, z27.h 264; CHECK-NEXT: mov z1.d, p4/m, z7.d 265; CHECK-NEXT: not p5.b, p0/z, p5.b 266; CHECK-NEXT: mov z0.d, p3/m, z7.d 267; CHECK-NEXT: fcmgt p3.h, p0/z, z29.h, z27.h 268; CHECK-NEXT: sel z9.d, p7, z25.d, z2.d 269; CHECK-NEXT: not p7.b, p0/z, p9.b 270; CHECK-NEXT: mov z4.d, p6/m, z25.d 271; CHECK-NEXT: not p6.b, p0/z, p10.b 272; CHECK-NEXT: fcmgt p10.h, p0/z, z28.h, z27.h 273; CHECK-NEXT: mov z5.d, p5/m, z25.d 274; CHECK-NEXT: fcmgt p5.h, p0/z, z24.h, z27.h 275; CHECK-NEXT: fcmuo p9.h, p0/z, z6.h, z6.h 276; CHECK-NEXT: sel z6.d, p7, z25.d, z31.d 277; CHECK-NEXT: sel z25.d, p6, z25.d, z8.d 278; CHECK-NEXT: ldr z8, [sp, #2, mul vl] // 16-byte Folded Reload 279; CHECK-NEXT: fcmgt p6.h, p0/z, z26.h, z27.h 280; CHECK-NEXT: fcmgt p7.h, p0/z, z30.h, z27.h 281; CHECK-NEXT: fcmuo p4.h, p0/z, z28.h, z28.h 282; CHECK-NEXT: sel z2.d, p8, z7.d, z3.d 283; CHECK-NEXT: sel z3.d, p10, z7.d, z9.d 284; CHECK-NEXT: ldr z9, [sp, #1, mul vl] // 16-byte Folded Reload 285; CHECK-NEXT: fcmuo p8.h, p0/z, z29.h, z29.h 286; CHECK-NEXT: mov z4.d, p5/m, z7.d 287; CHECK-NEXT: fcmuo p5.h, p0/z, z24.h, z24.h 288; CHECK-NEXT: fcmuo p10.h, p0/z, z26.h, z26.h 289; CHECK-NEXT: mov z5.d, p3/m, z7.d 290; CHECK-NEXT: mov z6.d, p6/m, z7.d 291; CHECK-NEXT: ldr p6, [sp, #5, mul vl] // 2-byte Folded Reload 292; CHECK-NEXT: fcmuo p0.h, p0/z, z30.h, z30.h 293; CHECK-NEXT: sel z7.d, p7, z7.d, z25.d 294; CHECK-NEXT: ldr p7, [sp, #4, mul vl] // 2-byte Folded Reload 295; CHECK-NEXT: mov z2.d, p9/m, #0 // =0x0 296; CHECK-NEXT: ldr p9, [sp, #2, mul vl] // 2-byte Folded Reload 297; CHECK-NEXT: mov z3.d, p4/m, #0 // =0x0 298; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload 299; CHECK-NEXT: mov z4.d, p5/m, #0 // =0x0 300; CHECK-NEXT: mov z5.d, p8/m, #0 // =0x0 301; CHECK-NEXT: ldr p8, [sp, #3, mul vl] // 2-byte Folded Reload 302; CHECK-NEXT: mov z6.d, p10/m, #0 // =0x0 303; CHECK-NEXT: mov z0.d, p1/m, #0 // =0x0 304; CHECK-NEXT: ldr p10, [sp, #1, mul vl] // 2-byte Folded Reload 305; CHECK-NEXT: mov z1.d, p2/m, #0 // =0x0 306; CHECK-NEXT: mov z7.d, p0/m, #0 // =0x0 307; CHECK-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Folded Reload 308; CHECK-NEXT: addvl sp, sp, #3 309; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload 310; CHECK-NEXT: ret 311 %a = call <vscale x 16 x i64> @llvm.llrint.nxv16i64.nxv16f16(<vscale x 16 x half> %x) 312 ret <vscale x 16 x i64> %a 313} 314declare <vscale x 16 x i64> @llvm.llrint.nxv16i64.nxv16f16(<vscale x 16 x half>) 315 316define <vscale x 32 x i64> @llrint_v32i64_v32f16(<vscale x 32 x half> %x) { 317; CHECK-LABEL: llrint_v32i64_v32f16: 318; CHECK: // %bb.0: 319; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill 320; CHECK-NEXT: addvl sp, sp, #-17 321; CHECK-NEXT: str p9, [sp, #2, mul vl] // 2-byte Folded Spill 322; CHECK-NEXT: str p8, [sp, #3, mul vl] // 2-byte Folded Spill 323; CHECK-NEXT: str p7, [sp, #4, mul vl] // 2-byte Folded Spill 324; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Folded Spill 325; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Folded Spill 326; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill 327; CHECK-NEXT: str z23, [sp, #1, mul vl] // 16-byte Folded Spill 328; CHECK-NEXT: str z22, [sp, #2, mul vl] // 16-byte Folded Spill 329; CHECK-NEXT: str z21, [sp, #3, mul vl] // 16-byte Folded Spill 330; CHECK-NEXT: str z20, [sp, #4, mul vl] // 16-byte Folded Spill 331; CHECK-NEXT: str z19, [sp, #5, mul vl] // 16-byte Folded Spill 332; CHECK-NEXT: str z18, [sp, #6, mul vl] // 16-byte Folded Spill 333; CHECK-NEXT: str z17, [sp, #7, mul vl] // 16-byte Folded Spill 334; CHECK-NEXT: str z16, [sp, #8, mul vl] // 16-byte Folded Spill 335; CHECK-NEXT: str z15, [sp, #9, mul vl] // 16-byte Folded Spill 336; CHECK-NEXT: str z14, [sp, #10, mul vl] // 16-byte Folded Spill 337; CHECK-NEXT: str z13, [sp, #11, mul vl] // 16-byte Folded Spill 338; CHECK-NEXT: str z12, [sp, #12, mul vl] // 16-byte Folded Spill 339; CHECK-NEXT: str z11, [sp, #13, mul vl] // 16-byte Folded Spill 340; CHECK-NEXT: str z10, [sp, #14, mul vl] // 16-byte Folded Spill 341; CHECK-NEXT: str z9, [sp, #15, mul vl] // 16-byte Folded Spill 342; CHECK-NEXT: str z8, [sp, #16, mul vl] // 16-byte Folded Spill 343; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x88, 0x01, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 136 * VG 344; CHECK-NEXT: .cfi_offset w29, -16 345; CHECK-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG 346; CHECK-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG 347; CHECK-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x68, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 24 * VG 348; CHECK-NEXT: .cfi_escape 0x10, 0x4b, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x60, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d11 @ cfa - 16 - 32 * VG 349; CHECK-NEXT: .cfi_escape 0x10, 0x4c, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x58, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d12 @ cfa - 16 - 40 * VG 350; CHECK-NEXT: .cfi_escape 0x10, 0x4d, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x50, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d13 @ cfa - 16 - 48 * VG 351; CHECK-NEXT: .cfi_escape 0x10, 0x4e, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x48, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d14 @ cfa - 16 - 56 * VG 352; CHECK-NEXT: .cfi_escape 0x10, 0x4f, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x40, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d15 @ cfa - 16 - 64 * VG 353; CHECK-NEXT: uunpkhi z5.s, z0.h 354; CHECK-NEXT: uunpklo z4.s, z0.h 355; CHECK-NEXT: mov w9, #64511 // =0xfbff 356; CHECK-NEXT: ptrue p0.d 357; CHECK-NEXT: uunpklo z6.s, z1.h 358; CHECK-NEXT: mov z30.h, w9 359; CHECK-NEXT: uunpkhi z10.s, z1.h 360; CHECK-NEXT: mov w9, #31743 // =0x7bff 361; CHECK-NEXT: mov z29.d, #0x8000000000000000 362; CHECK-NEXT: uunpklo z8.s, z2.h 363; CHECK-NEXT: uunpkhi z13.s, z3.h 364; CHECK-NEXT: uunpklo z18.s, z3.h 365; CHECK-NEXT: uunpklo z7.d, z5.s 366; CHECK-NEXT: uunpklo z0.d, z4.s 367; CHECK-NEXT: uunpkhi z4.d, z4.s 368; CHECK-NEXT: uunpkhi z24.d, z5.s 369; CHECK-NEXT: uunpklo z25.d, z6.s 370; CHECK-NEXT: uunpkhi z26.d, z6.s 371; CHECK-NEXT: uunpklo z27.d, z10.s 372; CHECK-NEXT: uunpkhi z10.d, z10.s 373; CHECK-NEXT: uunpklo z12.d, z8.s 374; CHECK-NEXT: uunpkhi z16.d, z8.s 375; CHECK-NEXT: movprfx z5, z7 376; CHECK-NEXT: frintx z5.h, p0/m, z7.h 377; CHECK-NEXT: movprfx z1, z4 378; CHECK-NEXT: frintx z1.h, p0/m, z4.h 379; CHECK-NEXT: frintx z0.h, p0/m, z0.h 380; CHECK-NEXT: movprfx z6, z24 381; CHECK-NEXT: frintx z6.h, p0/m, z24.h 382; CHECK-NEXT: movprfx z24, z25 383; CHECK-NEXT: frintx z24.h, p0/m, z25.h 384; CHECK-NEXT: movprfx z25, z26 385; CHECK-NEXT: frintx z25.h, p0/m, z26.h 386; CHECK-NEXT: movprfx z28, z27 387; CHECK-NEXT: frintx z28.h, p0/m, z27.h 388; CHECK-NEXT: movprfx z8, z10 389; CHECK-NEXT: frintx z8.h, p0/m, z10.h 390; CHECK-NEXT: mov z7.h, w9 391; CHECK-NEXT: mov z4.d, #0x7fffffffffffffff 392; CHECK-NEXT: rdvl x9, #15 393; CHECK-NEXT: fcmge p3.h, p0/z, z5.h, z30.h 394; CHECK-NEXT: movprfx z11, z5 395; CHECK-NEXT: fcvtzs z11.d, p0/m, z5.h 396; CHECK-NEXT: fcmge p2.h, p0/z, z1.h, z30.h 397; CHECK-NEXT: fcmge p1.h, p0/z, z0.h, z30.h 398; CHECK-NEXT: fcmge p4.h, p0/z, z6.h, z30.h 399; CHECK-NEXT: movprfx z9, z6 400; CHECK-NEXT: fcvtzs z9.d, p0/m, z6.h 401; CHECK-NEXT: movprfx z15, z25 402; CHECK-NEXT: fcvtzs z15.d, p0/m, z25.h 403; CHECK-NEXT: movprfx z14, z24 404; CHECK-NEXT: fcvtzs z14.d, p0/m, z24.h 405; CHECK-NEXT: movprfx z26, z0 406; CHECK-NEXT: fcvtzs z26.d, p0/m, z0.h 407; CHECK-NEXT: movprfx z19, z28 408; CHECK-NEXT: fcvtzs z19.d, p0/m, z28.h 409; CHECK-NEXT: movprfx z31, z1 410; CHECK-NEXT: fcvtzs z31.d, p0/m, z1.h 411; CHECK-NEXT: not p3.b, p0/z, p3.b 412; CHECK-NEXT: not p6.b, p0/z, p2.b 413; CHECK-NEXT: fcmge p2.h, p0/z, z25.h, z30.h 414; CHECK-NEXT: sel z27.d, p3, z29.d, z11.d 415; CHECK-NEXT: uunpkhi z11.s, z2.h 416; CHECK-NEXT: not p5.b, p0/z, p1.b 417; CHECK-NEXT: fcmge p1.h, p0/z, z24.h, z30.h 418; CHECK-NEXT: not p3.b, p0/z, p4.b 419; CHECK-NEXT: fcmge p4.h, p0/z, z28.h, z30.h 420; CHECK-NEXT: mov z26.d, p5/m, z29.d 421; CHECK-NEXT: mov z31.d, p6/m, z29.d 422; CHECK-NEXT: sel z2.d, p3, z29.d, z9.d 423; CHECK-NEXT: movprfx z9, z12 424; CHECK-NEXT: frintx z9.h, p0/m, z12.h 425; CHECK-NEXT: uunpkhi z12.d, z13.s 426; CHECK-NEXT: uunpklo z17.d, z11.s 427; CHECK-NEXT: not p2.b, p0/z, p2.b 428; CHECK-NEXT: not p1.b, p0/z, p1.b 429; CHECK-NEXT: sel z3.d, p2, z29.d, z15.d 430; CHECK-NEXT: uunpklo z15.d, z13.s 431; CHECK-NEXT: fcmge p2.h, p0/z, z8.h, z30.h 432; CHECK-NEXT: sel z10.d, p1, z29.d, z14.d 433; CHECK-NEXT: movprfx z14, z16 434; CHECK-NEXT: frintx z14.h, p0/m, z16.h 435; CHECK-NEXT: uunpkhi z16.d, z18.s 436; CHECK-NEXT: movprfx z13, z17 437; CHECK-NEXT: frintx z13.h, p0/m, z17.h 438; CHECK-NEXT: movprfx z20, z12 439; CHECK-NEXT: frintx z20.h, p0/m, z12.h 440; CHECK-NEXT: fcmge p3.h, p0/z, z9.h, z30.h 441; CHECK-NEXT: uunpkhi z17.d, z11.s 442; CHECK-NEXT: uunpklo z18.d, z18.s 443; CHECK-NEXT: movprfx z12, z8 444; CHECK-NEXT: fcvtzs z12.d, p0/m, z8.h 445; CHECK-NEXT: movprfx z21, z15 446; CHECK-NEXT: frintx z21.h, p0/m, z15.h 447; CHECK-NEXT: not p1.b, p0/z, p4.b 448; CHECK-NEXT: movprfx z15, z9 449; CHECK-NEXT: fcvtzs z15.d, p0/m, z9.h 450; CHECK-NEXT: frintx z16.h, p0/m, z16.h 451; CHECK-NEXT: not p2.b, p0/z, p2.b 452; CHECK-NEXT: movprfx z22, z14 453; CHECK-NEXT: fcvtzs z22.d, p0/m, z14.h 454; CHECK-NEXT: fcmge p4.h, p0/z, z13.h, z30.h 455; CHECK-NEXT: fcmge p5.h, p0/z, z20.h, z30.h 456; CHECK-NEXT: sel z11.d, p1, z29.d, z19.d 457; CHECK-NEXT: not p3.b, p0/z, p3.b 458; CHECK-NEXT: frintx z17.h, p0/m, z17.h 459; CHECK-NEXT: frintx z18.h, p0/m, z18.h 460; CHECK-NEXT: movprfx z19, z20 461; CHECK-NEXT: fcvtzs z19.d, p0/m, z20.h 462; CHECK-NEXT: mov z12.d, p2/m, z29.d 463; CHECK-NEXT: fcmge p2.h, p0/z, z21.h, z30.h 464; CHECK-NEXT: fcmge p1.h, p0/z, z14.h, z30.h 465; CHECK-NEXT: mov z15.d, p3/m, z29.d 466; CHECK-NEXT: movprfx z23, z21 467; CHECK-NEXT: fcvtzs z23.d, p0/m, z21.h 468; CHECK-NEXT: not p3.b, p0/z, p4.b 469; CHECK-NEXT: fcmge p4.h, p0/z, z16.h, z30.h 470; CHECK-NEXT: fcmgt p8.h, p0/z, z21.h, z7.h 471; CHECK-NEXT: not p5.b, p0/z, p5.b 472; CHECK-NEXT: fcmge p6.h, p0/z, z17.h, z30.h 473; CHECK-NEXT: fcmge p7.h, p0/z, z18.h, z30.h 474; CHECK-NEXT: movprfx z30, z16 475; CHECK-NEXT: fcvtzs z30.d, p0/m, z16.h 476; CHECK-NEXT: not p2.b, p0/z, p2.b 477; CHECK-NEXT: fcmuo p9.h, p0/z, z21.h, z21.h 478; CHECK-NEXT: mov z19.d, p5/m, z29.d 479; CHECK-NEXT: fcmgt p5.h, p0/z, z20.h, z7.h 480; CHECK-NEXT: not p1.b, p0/z, p1.b 481; CHECK-NEXT: not p4.b, p0/z, p4.b 482; CHECK-NEXT: mov z23.d, p2/m, z29.d 483; CHECK-NEXT: fcmuo p2.h, p0/z, z20.h, z20.h 484; CHECK-NEXT: movprfx z20, z18 485; CHECK-NEXT: fcvtzs z20.d, p0/m, z18.h 486; CHECK-NEXT: movprfx z21, z13 487; CHECK-NEXT: fcvtzs z21.d, p0/m, z13.h 488; CHECK-NEXT: mov z22.d, p1/m, z29.d 489; CHECK-NEXT: not p1.b, p0/z, p7.b 490; CHECK-NEXT: mov z30.d, p4/m, z29.d 491; CHECK-NEXT: fcmgt p4.h, p0/z, z18.h, z7.h 492; CHECK-NEXT: mov z19.d, p5/m, z4.d 493; CHECK-NEXT: fcmuo p7.h, p0/z, z18.h, z18.h 494; CHECK-NEXT: movprfx z18, z17 495; CHECK-NEXT: fcvtzs z18.d, p0/m, z17.h 496; CHECK-NEXT: fcmgt p5.h, p0/z, z16.h, z7.h 497; CHECK-NEXT: not p6.b, p0/z, p6.b 498; CHECK-NEXT: mov z23.d, p8/m, z4.d 499; CHECK-NEXT: mov z20.d, p1/m, z29.d 500; CHECK-NEXT: mov z21.d, p3/m, z29.d 501; CHECK-NEXT: fcmuo p3.h, p0/z, z16.h, z16.h 502; CHECK-NEXT: mov z19.d, p2/m, #0 // =0x0 503; CHECK-NEXT: fcmgt p2.h, p0/z, z17.h, z7.h 504; CHECK-NEXT: ptrue p1.b 505; CHECK-NEXT: sel z29.d, p6, z29.d, z18.d 506; CHECK-NEXT: mov z23.d, p9/m, #0 // =0x0 507; CHECK-NEXT: fcmgt p6.h, p0/z, z14.h, z7.h 508; CHECK-NEXT: mov z30.d, p5/m, z4.d 509; CHECK-NEXT: sel z16.d, p4, z4.d, z20.d 510; CHECK-NEXT: fcmuo p4.h, p0/z, z17.h, z17.h 511; CHECK-NEXT: st1b { z19.b }, p1, [x8, x9] 512; CHECK-NEXT: rdvl x9, #14 513; CHECK-NEXT: fcmgt p5.h, p0/z, z1.h, z7.h 514; CHECK-NEXT: st1b { z23.b }, p1, [x8, x9] 515; CHECK-NEXT: rdvl x9, #13 516; CHECK-NEXT: mov z29.d, p2/m, z4.d 517; CHECK-NEXT: mov z30.d, p3/m, #0 // =0x0 518; CHECK-NEXT: fcmgt p3.h, p0/z, z13.h, z7.h 519; CHECK-NEXT: mov z16.d, p7/m, #0 // =0x0 520; CHECK-NEXT: fcmgt p2.h, p0/z, z9.h, z7.h 521; CHECK-NEXT: fcmuo p7.h, p0/z, z14.h, z14.h 522; CHECK-NEXT: mov z29.d, p4/m, #0 // =0x0 523; CHECK-NEXT: fcmuo p4.h, p0/z, z13.h, z13.h 524; CHECK-NEXT: st1b { z30.b }, p1, [x8, x9] 525; CHECK-NEXT: rdvl x9, #12 526; CHECK-NEXT: sel z30.d, p5, z4.d, z31.d 527; CHECK-NEXT: st1b { z16.b }, p1, [x8, x9] 528; CHECK-NEXT: rdvl x9, #11 529; CHECK-NEXT: sel z31.d, p3, z4.d, z21.d 530; CHECK-NEXT: st1b { z29.b }, p1, [x8, x9] 531; CHECK-NEXT: rdvl x9, #10 532; CHECK-NEXT: fcmgt p5.h, p0/z, z24.h, z7.h 533; CHECK-NEXT: fcmgt p3.h, p0/z, z28.h, z7.h 534; CHECK-NEXT: sel z13.d, p2, z4.d, z15.d 535; CHECK-NEXT: fcmuo p2.h, p0/z, z9.h, z9.h 536; CHECK-NEXT: sel z29.d, p6, z4.d, z22.d 537; CHECK-NEXT: mov z31.d, p4/m, #0 // =0x0 538; CHECK-NEXT: fcmgt p4.h, p0/z, z8.h, z7.h 539; CHECK-NEXT: fcmgt p6.h, p0/z, z5.h, z7.h 540; CHECK-NEXT: sel z9.d, p5, z4.d, z10.d 541; CHECK-NEXT: fcmgt p5.h, p0/z, z6.h, z7.h 542; CHECK-NEXT: st1b { z31.b }, p1, [x8, x9] 543; CHECK-NEXT: rdvl x9, #9 544; CHECK-NEXT: mov z29.d, p7/m, #0 // =0x0 545; CHECK-NEXT: sel z10.d, p3, z4.d, z11.d 546; CHECK-NEXT: fcmgt p3.h, p0/z, z25.h, z7.h 547; CHECK-NEXT: mov z13.d, p2/m, #0 // =0x0 548; CHECK-NEXT: fcmuo p7.h, p0/z, z8.h, z8.h 549; CHECK-NEXT: fcmuo p2.h, p0/z, z28.h, z28.h 550; CHECK-NEXT: sel z28.d, p4, z4.d, z12.d 551; CHECK-NEXT: st1b { z29.b }, p1, [x8, x9] 552; CHECK-NEXT: rdvl x9, #8 553; CHECK-NEXT: fcmuo p4.h, p0/z, z25.h, z25.h 554; CHECK-NEXT: st1b { z13.b }, p1, [x8, x9] 555; CHECK-NEXT: fcmuo p1.h, p0/z, z24.h, z24.h 556; CHECK-NEXT: mov z2.d, p5/m, z4.d 557; CHECK-NEXT: mov z3.d, p3/m, z4.d 558; CHECK-NEXT: fcmgt p3.h, p0/z, z0.h, z7.h 559; CHECK-NEXT: mov z28.d, p7/m, #0 // =0x0 560; CHECK-NEXT: fcmuo p7.h, p0/z, z6.h, z6.h 561; CHECK-NEXT: mov z10.d, p2/m, #0 // =0x0 562; CHECK-NEXT: fcmuo p2.h, p0/z, z5.h, z5.h 563; CHECK-NEXT: sel z5.d, p6, z4.d, z27.d 564; CHECK-NEXT: mov z3.d, p4/m, #0 // =0x0 565; CHECK-NEXT: fcmuo p4.h, p0/z, z1.h, z1.h 566; CHECK-NEXT: mov z9.d, p1/m, #0 // =0x0 567; CHECK-NEXT: st1d { z28.d }, p0, [x8, #7, mul vl] 568; CHECK-NEXT: fcmuo p1.h, p0/z, z0.h, z0.h 569; CHECK-NEXT: sel z0.d, p3, z4.d, z26.d 570; CHECK-NEXT: st1d { z10.d }, p0, [x8, #6, mul vl] 571; CHECK-NEXT: mov z2.d, p7/m, #0 // =0x0 572; CHECK-NEXT: st1d { z3.d }, p0, [x8, #5, mul vl] 573; CHECK-NEXT: mov z5.d, p2/m, #0 // =0x0 574; CHECK-NEXT: st1d { z9.d }, p0, [x8, #4, mul vl] 575; CHECK-NEXT: mov z30.d, p4/m, #0 // =0x0 576; CHECK-NEXT: mov z0.d, p1/m, #0 // =0x0 577; CHECK-NEXT: st1d { z2.d }, p0, [x8, #3, mul vl] 578; CHECK-NEXT: st1d { z5.d }, p0, [x8, #2, mul vl] 579; CHECK-NEXT: st1d { z30.d }, p0, [x8, #1, mul vl] 580; CHECK-NEXT: st1d { z0.d }, p0, [x8] 581; CHECK-NEXT: ldr z23, [sp, #1, mul vl] // 16-byte Folded Reload 582; CHECK-NEXT: ldr z22, [sp, #2, mul vl] // 16-byte Folded Reload 583; CHECK-NEXT: ldr z21, [sp, #3, mul vl] // 16-byte Folded Reload 584; CHECK-NEXT: ldr z20, [sp, #4, mul vl] // 16-byte Folded Reload 585; CHECK-NEXT: ldr z19, [sp, #5, mul vl] // 16-byte Folded Reload 586; CHECK-NEXT: ldr z18, [sp, #6, mul vl] // 16-byte Folded Reload 587; CHECK-NEXT: ldr z17, [sp, #7, mul vl] // 16-byte Folded Reload 588; CHECK-NEXT: ldr z16, [sp, #8, mul vl] // 16-byte Folded Reload 589; CHECK-NEXT: ldr z15, [sp, #9, mul vl] // 16-byte Folded Reload 590; CHECK-NEXT: ldr z14, [sp, #10, mul vl] // 16-byte Folded Reload 591; CHECK-NEXT: ldr z13, [sp, #11, mul vl] // 16-byte Folded Reload 592; CHECK-NEXT: ldr z12, [sp, #12, mul vl] // 16-byte Folded Reload 593; CHECK-NEXT: ldr z11, [sp, #13, mul vl] // 16-byte Folded Reload 594; CHECK-NEXT: ldr z10, [sp, #14, mul vl] // 16-byte Folded Reload 595; CHECK-NEXT: ldr z9, [sp, #15, mul vl] // 16-byte Folded Reload 596; CHECK-NEXT: ldr z8, [sp, #16, mul vl] // 16-byte Folded Reload 597; CHECK-NEXT: ldr p9, [sp, #2, mul vl] // 2-byte Folded Reload 598; CHECK-NEXT: ldr p8, [sp, #3, mul vl] // 2-byte Folded Reload 599; CHECK-NEXT: ldr p7, [sp, #4, mul vl] // 2-byte Folded Reload 600; CHECK-NEXT: ldr p6, [sp, #5, mul vl] // 2-byte Folded Reload 601; CHECK-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Folded Reload 602; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload 603; CHECK-NEXT: addvl sp, sp, #17 604; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload 605; CHECK-NEXT: ret 606 %a = call <vscale x 32 x i64> @llvm.llrint.nxv32i64.nxv32f16(<vscale x 32 x half> %x) 607 ret <vscale x 32 x i64> %a 608} 609declare <vscale x 32 x i64> @llvm.llrint.nxv32i64.nxv32f16(<vscale x 32 x half>) 610 611define <vscale x 1 x i64> @llrint_v1i64_v1f32(<vscale x 1 x float> %x) { 612; CHECK-LABEL: llrint_v1i64_v1f32: 613; CHECK: // %bb.0: 614; CHECK-NEXT: ptrue p0.d 615; CHECK-NEXT: mov w8, #-553648128 // =0xdf000000 616; CHECK-NEXT: mov z2.d, #0x8000000000000000 617; CHECK-NEXT: mov z1.s, w8 618; CHECK-NEXT: mov w8, #1593835519 // =0x5effffff 619; CHECK-NEXT: frintx z0.s, p0/m, z0.s 620; CHECK-NEXT: mov z3.s, w8 621; CHECK-NEXT: fcmge p1.s, p0/z, z0.s, z1.s 622; CHECK-NEXT: movprfx z1, z0 623; CHECK-NEXT: fcvtzs z1.d, p0/m, z0.s 624; CHECK-NEXT: fcmgt p2.s, p0/z, z0.s, z3.s 625; CHECK-NEXT: mov z3.d, #0x7fffffffffffffff 626; CHECK-NEXT: not p1.b, p0/z, p1.b 627; CHECK-NEXT: fcmuo p0.s, p0/z, z0.s, z0.s 628; CHECK-NEXT: mov z1.d, p1/m, z2.d 629; CHECK-NEXT: sel z0.d, p2, z3.d, z1.d 630; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x0 631; CHECK-NEXT: ret 632 %a = call <vscale x 1 x i64> @llvm.llrint.nxv1i64.nxv1f32(<vscale x 1 x float> %x) 633 ret <vscale x 1 x i64> %a 634} 635declare <vscale x 1 x i64> @llvm.llrint.nxv1i64.nxv1f32(<vscale x 1 x float>) 636 637define <vscale x 2 x i64> @llrint_v2i64_v2f32(<vscale x 2 x float> %x) { 638; CHECK-LABEL: llrint_v2i64_v2f32: 639; CHECK: // %bb.0: 640; CHECK-NEXT: ptrue p0.d 641; CHECK-NEXT: mov w8, #-553648128 // =0xdf000000 642; CHECK-NEXT: mov z2.d, #0x8000000000000000 643; CHECK-NEXT: mov z1.s, w8 644; CHECK-NEXT: mov w8, #1593835519 // =0x5effffff 645; CHECK-NEXT: frintx z0.s, p0/m, z0.s 646; CHECK-NEXT: mov z3.s, w8 647; CHECK-NEXT: fcmge p1.s, p0/z, z0.s, z1.s 648; CHECK-NEXT: movprfx z1, z0 649; CHECK-NEXT: fcvtzs z1.d, p0/m, z0.s 650; CHECK-NEXT: fcmgt p2.s, p0/z, z0.s, z3.s 651; CHECK-NEXT: mov z3.d, #0x7fffffffffffffff 652; CHECK-NEXT: not p1.b, p0/z, p1.b 653; CHECK-NEXT: fcmuo p0.s, p0/z, z0.s, z0.s 654; CHECK-NEXT: mov z1.d, p1/m, z2.d 655; CHECK-NEXT: sel z0.d, p2, z3.d, z1.d 656; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x0 657; CHECK-NEXT: ret 658 %a = call <vscale x 2 x i64> @llvm.llrint.nxv2i64.nxv2f32(<vscale x 2 x float> %x) 659 ret <vscale x 2 x i64> %a 660} 661declare <vscale x 2 x i64> @llvm.llrint.nxv2i64.nxv2f32(<vscale x 2 x float>) 662 663define <vscale x 4 x i64> @llrint_v4i64_v4f32(<vscale x 4 x float> %x) { 664; CHECK-LABEL: llrint_v4i64_v4f32: 665; CHECK: // %bb.0: 666; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill 667; CHECK-NEXT: addvl sp, sp, #-1 668; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill 669; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG 670; CHECK-NEXT: .cfi_offset w29, -16 671; CHECK-NEXT: uunpklo z1.d, z0.s 672; CHECK-NEXT: uunpkhi z0.d, z0.s 673; CHECK-NEXT: mov w8, #-553648128 // =0xdf000000 674; CHECK-NEXT: ptrue p0.d 675; CHECK-NEXT: mov z2.s, w8 676; CHECK-NEXT: mov w8, #1593835519 // =0x5effffff 677; CHECK-NEXT: mov z3.s, w8 678; CHECK-NEXT: mov z6.d, #0x7fffffffffffffff 679; CHECK-NEXT: frintx z1.s, p0/m, z1.s 680; CHECK-NEXT: frintx z0.s, p0/m, z0.s 681; CHECK-NEXT: fcmge p1.s, p0/z, z1.s, z2.s 682; CHECK-NEXT: fcmge p2.s, p0/z, z0.s, z2.s 683; CHECK-NEXT: mov z2.d, #0x8000000000000000 684; CHECK-NEXT: movprfx z4, z1 685; CHECK-NEXT: fcvtzs z4.d, p0/m, z1.s 686; CHECK-NEXT: movprfx z5, z0 687; CHECK-NEXT: fcvtzs z5.d, p0/m, z0.s 688; CHECK-NEXT: fcmgt p3.s, p0/z, z1.s, z3.s 689; CHECK-NEXT: fcmgt p4.s, p0/z, z0.s, z3.s 690; CHECK-NEXT: not p1.b, p0/z, p1.b 691; CHECK-NEXT: not p2.b, p0/z, p2.b 692; CHECK-NEXT: sel z3.d, p1, z2.d, z4.d 693; CHECK-NEXT: fcmuo p1.s, p0/z, z1.s, z1.s 694; CHECK-NEXT: fcmuo p0.s, p0/z, z0.s, z0.s 695; CHECK-NEXT: sel z2.d, p2, z2.d, z5.d 696; CHECK-NEXT: sel z0.d, p3, z6.d, z3.d 697; CHECK-NEXT: sel z1.d, p4, z6.d, z2.d 698; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload 699; CHECK-NEXT: mov z0.d, p1/m, #0 // =0x0 700; CHECK-NEXT: mov z1.d, p0/m, #0 // =0x0 701; CHECK-NEXT: addvl sp, sp, #1 702; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload 703; CHECK-NEXT: ret 704 %a = call <vscale x 4 x i64> @llvm.llrint.nxv4i64.nxv4f32(<vscale x 4 x float> %x) 705 ret <vscale x 4 x i64> %a 706} 707declare <vscale x 4 x i64> @llvm.llrint.nxv4i64.nxv4f32(<vscale x 4 x float>) 708 709define <vscale x 8 x i64> @llrint_v8i64_v8f32(<vscale x 8 x float> %x) { 710; CHECK-LABEL: llrint_v8i64_v8f32: 711; CHECK: // %bb.0: 712; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill 713; CHECK-NEXT: addvl sp, sp, #-1 714; CHECK-NEXT: str p7, [sp, #4, mul vl] // 2-byte Folded Spill 715; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Folded Spill 716; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Folded Spill 717; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill 718; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG 719; CHECK-NEXT: .cfi_offset w29, -16 720; CHECK-NEXT: uunpklo z2.d, z0.s 721; CHECK-NEXT: uunpkhi z0.d, z0.s 722; CHECK-NEXT: mov w8, #-553648128 // =0xdf000000 723; CHECK-NEXT: uunpklo z3.d, z1.s 724; CHECK-NEXT: ptrue p0.d 725; CHECK-NEXT: uunpkhi z1.d, z1.s 726; CHECK-NEXT: mov z4.s, w8 727; CHECK-NEXT: mov w8, #1593835519 // =0x5effffff 728; CHECK-NEXT: mov z5.d, #0x8000000000000000 729; CHECK-NEXT: mov z6.s, w8 730; CHECK-NEXT: mov z26.d, #0x7fffffffffffffff 731; CHECK-NEXT: frintx z2.s, p0/m, z2.s 732; CHECK-NEXT: frintx z0.s, p0/m, z0.s 733; CHECK-NEXT: frintx z3.s, p0/m, z3.s 734; CHECK-NEXT: frintx z1.s, p0/m, z1.s 735; CHECK-NEXT: fcmge p1.s, p0/z, z2.s, z4.s 736; CHECK-NEXT: fcmge p2.s, p0/z, z0.s, z4.s 737; CHECK-NEXT: movprfx z7, z0 738; CHECK-NEXT: fcvtzs z7.d, p0/m, z0.s 739; CHECK-NEXT: fcmge p3.s, p0/z, z3.s, z4.s 740; CHECK-NEXT: fcmge p4.s, p0/z, z1.s, z4.s 741; CHECK-NEXT: movprfx z4, z2 742; CHECK-NEXT: fcvtzs z4.d, p0/m, z2.s 743; CHECK-NEXT: movprfx z24, z3 744; CHECK-NEXT: fcvtzs z24.d, p0/m, z3.s 745; CHECK-NEXT: movprfx z25, z1 746; CHECK-NEXT: fcvtzs z25.d, p0/m, z1.s 747; CHECK-NEXT: fcmgt p7.s, p0/z, z3.s, z6.s 748; CHECK-NEXT: fcmgt p5.s, p0/z, z2.s, z6.s 749; CHECK-NEXT: fcmgt p6.s, p0/z, z0.s, z6.s 750; CHECK-NEXT: not p1.b, p0/z, p1.b 751; CHECK-NEXT: not p2.b, p0/z, p2.b 752; CHECK-NEXT: not p3.b, p0/z, p3.b 753; CHECK-NEXT: mov z4.d, p1/m, z5.d 754; CHECK-NEXT: fcmgt p1.s, p0/z, z1.s, z6.s 755; CHECK-NEXT: not p4.b, p0/z, p4.b 756; CHECK-NEXT: sel z6.d, p2, z5.d, z7.d 757; CHECK-NEXT: fcmuo p2.s, p0/z, z2.s, z2.s 758; CHECK-NEXT: sel z7.d, p3, z5.d, z24.d 759; CHECK-NEXT: fcmuo p3.s, p0/z, z0.s, z0.s 760; CHECK-NEXT: sel z5.d, p4, z5.d, z25.d 761; CHECK-NEXT: fcmuo p4.s, p0/z, z3.s, z3.s 762; CHECK-NEXT: fcmuo p0.s, p0/z, z1.s, z1.s 763; CHECK-NEXT: sel z0.d, p5, z26.d, z4.d 764; CHECK-NEXT: sel z1.d, p6, z26.d, z6.d 765; CHECK-NEXT: ldr p6, [sp, #5, mul vl] // 2-byte Folded Reload 766; CHECK-NEXT: sel z2.d, p7, z26.d, z7.d 767; CHECK-NEXT: ldr p7, [sp, #4, mul vl] // 2-byte Folded Reload 768; CHECK-NEXT: sel z3.d, p1, z26.d, z5.d 769; CHECK-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Folded Reload 770; CHECK-NEXT: mov z0.d, p2/m, #0 // =0x0 771; CHECK-NEXT: mov z1.d, p3/m, #0 // =0x0 772; CHECK-NEXT: mov z2.d, p4/m, #0 // =0x0 773; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload 774; CHECK-NEXT: mov z3.d, p0/m, #0 // =0x0 775; CHECK-NEXT: addvl sp, sp, #1 776; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload 777; CHECK-NEXT: ret 778 %a = call <vscale x 8 x i64> @llvm.llrint.nxv8i64.nxv8f32(<vscale x 8 x float> %x) 779 ret <vscale x 8 x i64> %a 780} 781declare <vscale x 8 x i64> @llvm.llrint.nxv8i64.nxv8f32(<vscale x 8 x float>) 782 783define <vscale x 16 x i64> @llrint_v16i64_v16f32(<vscale x 16 x float> %x) { 784; CHECK-LABEL: llrint_v16i64_v16f32: 785; CHECK: // %bb.0: 786; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill 787; CHECK-NEXT: addvl sp, sp, #-2 788; CHECK-NEXT: str p10, [sp, #1, mul vl] // 2-byte Folded Spill 789; CHECK-NEXT: str p9, [sp, #2, mul vl] // 2-byte Folded Spill 790; CHECK-NEXT: str p8, [sp, #3, mul vl] // 2-byte Folded Spill 791; CHECK-NEXT: str p7, [sp, #4, mul vl] // 2-byte Folded Spill 792; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Folded Spill 793; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Folded Spill 794; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill 795; CHECK-NEXT: str z8, [sp, #1, mul vl] // 16-byte Folded Spill 796; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 16 * VG 797; CHECK-NEXT: .cfi_offset w29, -16 798; CHECK-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG 799; CHECK-NEXT: uunpklo z4.d, z0.s 800; CHECK-NEXT: uunpkhi z0.d, z0.s 801; CHECK-NEXT: mov w8, #-553648128 // =0xdf000000 802; CHECK-NEXT: ptrue p0.d 803; CHECK-NEXT: uunpklo z7.d, z1.s 804; CHECK-NEXT: uunpkhi z1.d, z1.s 805; CHECK-NEXT: uunpklo z24.d, z2.s 806; CHECK-NEXT: uunpkhi z2.d, z2.s 807; CHECK-NEXT: uunpklo z25.d, z3.s 808; CHECK-NEXT: uunpkhi z3.d, z3.s 809; CHECK-NEXT: mov z26.d, #0x7fffffffffffffff 810; CHECK-NEXT: movprfx z5, z4 811; CHECK-NEXT: frintx z5.s, p0/m, z4.s 812; CHECK-NEXT: movprfx z6, z0 813; CHECK-NEXT: frintx z6.s, p0/m, z0.s 814; CHECK-NEXT: mov z4.s, w8 815; CHECK-NEXT: frintx z7.s, p0/m, z7.s 816; CHECK-NEXT: movprfx z28, z1 817; CHECK-NEXT: frintx z28.s, p0/m, z1.s 818; CHECK-NEXT: mov w8, #1593835519 // =0x5effffff 819; CHECK-NEXT: mov z0.d, #0x8000000000000000 820; CHECK-NEXT: frintx z24.s, p0/m, z24.s 821; CHECK-NEXT: movprfx z29, z2 822; CHECK-NEXT: frintx z29.s, p0/m, z2.s 823; CHECK-NEXT: frintx z25.s, p0/m, z25.s 824; CHECK-NEXT: movprfx z30, z3 825; CHECK-NEXT: frintx z30.s, p0/m, z3.s 826; CHECK-NEXT: mov z27.s, w8 827; CHECK-NEXT: fcmge p1.s, p0/z, z5.s, z4.s 828; CHECK-NEXT: fcmge p2.s, p0/z, z6.s, z4.s 829; CHECK-NEXT: movprfx z1, z5 830; CHECK-NEXT: fcvtzs z1.d, p0/m, z5.s 831; CHECK-NEXT: movprfx z2, z6 832; CHECK-NEXT: fcvtzs z2.d, p0/m, z6.s 833; CHECK-NEXT: fcmge p5.s, p0/z, z7.s, z4.s 834; CHECK-NEXT: fcmge p6.s, p0/z, z28.s, z4.s 835; CHECK-NEXT: movprfx z3, z7 836; CHECK-NEXT: fcvtzs z3.d, p0/m, z7.s 837; CHECK-NEXT: fcmge p8.s, p0/z, z29.s, z4.s 838; CHECK-NEXT: fcmgt p3.s, p0/z, z5.s, z27.s 839; CHECK-NEXT: fcmgt p7.s, p0/z, z6.s, z27.s 840; CHECK-NEXT: fcmge p9.s, p0/z, z25.s, z4.s 841; CHECK-NEXT: movprfx z31, z25 842; CHECK-NEXT: fcvtzs z31.d, p0/m, z25.s 843; CHECK-NEXT: not p4.b, p0/z, p1.b 844; CHECK-NEXT: fcmuo p1.s, p0/z, z5.s, z5.s 845; CHECK-NEXT: movprfx z5, z28 846; CHECK-NEXT: fcvtzs z5.d, p0/m, z28.s 847; CHECK-NEXT: not p2.b, p0/z, p2.b 848; CHECK-NEXT: fcmge p10.s, p0/z, z30.s, z4.s 849; CHECK-NEXT: movprfx z8, z30 850; CHECK-NEXT: fcvtzs z8.d, p0/m, z30.s 851; CHECK-NEXT: mov z1.d, p4/m, z0.d 852; CHECK-NEXT: fcmge p4.s, p0/z, z24.s, z4.s 853; CHECK-NEXT: movprfx z4, z29 854; CHECK-NEXT: fcvtzs z4.d, p0/m, z29.s 855; CHECK-NEXT: mov z2.d, p2/m, z0.d 856; CHECK-NEXT: fcmuo p2.s, p0/z, z6.s, z6.s 857; CHECK-NEXT: movprfx z6, z24 858; CHECK-NEXT: fcvtzs z6.d, p0/m, z24.s 859; CHECK-NEXT: not p5.b, p0/z, p5.b 860; CHECK-NEXT: not p6.b, p0/z, p6.b 861; CHECK-NEXT: not p4.b, p0/z, p4.b 862; CHECK-NEXT: mov z3.d, p5/m, z0.d 863; CHECK-NEXT: not p5.b, p0/z, p8.b 864; CHECK-NEXT: mov z5.d, p6/m, z0.d 865; CHECK-NEXT: fcmgt p8.s, p0/z, z7.s, z27.s 866; CHECK-NEXT: not p6.b, p0/z, p9.b 867; CHECK-NEXT: mov z6.d, p4/m, z0.d 868; CHECK-NEXT: fcmuo p9.s, p0/z, z7.s, z7.s 869; CHECK-NEXT: not p4.b, p0/z, p10.b 870; CHECK-NEXT: fcmgt p10.s, p0/z, z28.s, z27.s 871; CHECK-NEXT: sel z7.d, p5, z0.d, z4.d 872; CHECK-NEXT: fcmgt p5.s, p0/z, z24.s, z27.s 873; CHECK-NEXT: mov z31.d, p6/m, z0.d 874; CHECK-NEXT: fcmgt p6.s, p0/z, z30.s, z27.s 875; CHECK-NEXT: mov z8.d, p4/m, z0.d 876; CHECK-NEXT: sel z0.d, p3, z26.d, z1.d 877; CHECK-NEXT: fcmgt p3.s, p0/z, z29.s, z27.s 878; CHECK-NEXT: fcmgt p4.s, p0/z, z25.s, z27.s 879; CHECK-NEXT: sel z1.d, p7, z26.d, z2.d 880; CHECK-NEXT: fcmuo p7.s, p0/z, z28.s, z28.s 881; CHECK-NEXT: sel z2.d, p8, z26.d, z3.d 882; CHECK-NEXT: sel z3.d, p10, z26.d, z5.d 883; CHECK-NEXT: fcmuo p8.s, p0/z, z29.s, z29.s 884; CHECK-NEXT: sel z4.d, p5, z26.d, z6.d 885; CHECK-NEXT: fcmuo p5.s, p0/z, z24.s, z24.s 886; CHECK-NEXT: fcmuo p10.s, p0/z, z25.s, z25.s 887; CHECK-NEXT: sel z5.d, p3, z26.d, z7.d 888; CHECK-NEXT: fcmuo p0.s, p0/z, z30.s, z30.s 889; CHECK-NEXT: sel z7.d, p6, z26.d, z8.d 890; CHECK-NEXT: ldr z8, [sp, #1, mul vl] // 16-byte Folded Reload 891; CHECK-NEXT: ldr p6, [sp, #5, mul vl] // 2-byte Folded Reload 892; CHECK-NEXT: sel z6.d, p4, z26.d, z31.d 893; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload 894; CHECK-NEXT: mov z2.d, p9/m, #0 // =0x0 895; CHECK-NEXT: mov z3.d, p7/m, #0 // =0x0 896; CHECK-NEXT: ldr p9, [sp, #2, mul vl] // 2-byte Folded Reload 897; CHECK-NEXT: mov z4.d, p5/m, #0 // =0x0 898; CHECK-NEXT: mov z5.d, p8/m, #0 // =0x0 899; CHECK-NEXT: ldr p8, [sp, #3, mul vl] // 2-byte Folded Reload 900; CHECK-NEXT: mov z6.d, p10/m, #0 // =0x0 901; CHECK-NEXT: mov z0.d, p1/m, #0 // =0x0 902; CHECK-NEXT: ldr p10, [sp, #1, mul vl] // 2-byte Folded Reload 903; CHECK-NEXT: mov z1.d, p2/m, #0 // =0x0 904; CHECK-NEXT: mov z7.d, p0/m, #0 // =0x0 905; CHECK-NEXT: ldr p7, [sp, #4, mul vl] // 2-byte Folded Reload 906; CHECK-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Folded Reload 907; CHECK-NEXT: addvl sp, sp, #2 908; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload 909; CHECK-NEXT: ret 910 %a = call <vscale x 16 x i64> @llvm.llrint.nxv16i64.nxv16f32(<vscale x 16 x float> %x) 911 ret <vscale x 16 x i64> %a 912} 913declare <vscale x 16 x i64> @llvm.llrint.nxv16i64.nxv16f32(<vscale x 16 x float>) 914 915define <vscale x 32 x i64> @llrint_v32i64_v32f32(<vscale x 32 x float> %x) { 916; CHECK-LABEL: llrint_v32i64_v32f32: 917; CHECK: // %bb.0: 918; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill 919; CHECK-NEXT: addvl sp, sp, #-17 920; CHECK-NEXT: str p9, [sp, #2, mul vl] // 2-byte Folded Spill 921; CHECK-NEXT: str p8, [sp, #3, mul vl] // 2-byte Folded Spill 922; CHECK-NEXT: str p7, [sp, #4, mul vl] // 2-byte Folded Spill 923; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Folded Spill 924; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Folded Spill 925; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill 926; CHECK-NEXT: str z23, [sp, #1, mul vl] // 16-byte Folded Spill 927; CHECK-NEXT: str z22, [sp, #2, mul vl] // 16-byte Folded Spill 928; CHECK-NEXT: str z21, [sp, #3, mul vl] // 16-byte Folded Spill 929; CHECK-NEXT: str z20, [sp, #4, mul vl] // 16-byte Folded Spill 930; CHECK-NEXT: str z19, [sp, #5, mul vl] // 16-byte Folded Spill 931; CHECK-NEXT: str z18, [sp, #6, mul vl] // 16-byte Folded Spill 932; CHECK-NEXT: str z17, [sp, #7, mul vl] // 16-byte Folded Spill 933; CHECK-NEXT: str z16, [sp, #8, mul vl] // 16-byte Folded Spill 934; CHECK-NEXT: str z15, [sp, #9, mul vl] // 16-byte Folded Spill 935; CHECK-NEXT: str z14, [sp, #10, mul vl] // 16-byte Folded Spill 936; CHECK-NEXT: str z13, [sp, #11, mul vl] // 16-byte Folded Spill 937; CHECK-NEXT: str z12, [sp, #12, mul vl] // 16-byte Folded Spill 938; CHECK-NEXT: str z11, [sp, #13, mul vl] // 16-byte Folded Spill 939; CHECK-NEXT: str z10, [sp, #14, mul vl] // 16-byte Folded Spill 940; CHECK-NEXT: str z9, [sp, #15, mul vl] // 16-byte Folded Spill 941; CHECK-NEXT: str z8, [sp, #16, mul vl] // 16-byte Folded Spill 942; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x88, 0x01, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 136 * VG 943; CHECK-NEXT: .cfi_offset w29, -16 944; CHECK-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG 945; CHECK-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG 946; CHECK-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x68, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 24 * VG 947; CHECK-NEXT: .cfi_escape 0x10, 0x4b, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x60, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d11 @ cfa - 16 - 32 * VG 948; CHECK-NEXT: .cfi_escape 0x10, 0x4c, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x58, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d12 @ cfa - 16 - 40 * VG 949; CHECK-NEXT: .cfi_escape 0x10, 0x4d, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x50, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d13 @ cfa - 16 - 48 * VG 950; CHECK-NEXT: .cfi_escape 0x10, 0x4e, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x48, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d14 @ cfa - 16 - 56 * VG 951; CHECK-NEXT: .cfi_escape 0x10, 0x4f, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x40, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d15 @ cfa - 16 - 64 * VG 952; CHECK-NEXT: uunpklo z24.d, z0.s 953; CHECK-NEXT: uunpkhi z25.d, z0.s 954; CHECK-NEXT: mov w9, #-553648128 // =0xdf000000 955; CHECK-NEXT: uunpklo z26.d, z1.s 956; CHECK-NEXT: ptrue p0.d 957; CHECK-NEXT: uunpkhi z27.d, z1.s 958; CHECK-NEXT: mov z31.s, w9 959; CHECK-NEXT: mov w9, #1593835519 // =0x5effffff 960; CHECK-NEXT: uunpklo z28.d, z2.s 961; CHECK-NEXT: mov z8.d, #0x8000000000000000 962; CHECK-NEXT: uunpklo z30.d, z3.s 963; CHECK-NEXT: uunpklo z13.d, z4.s 964; CHECK-NEXT: movprfx z0, z24 965; CHECK-NEXT: frintx z0.s, p0/m, z24.s 966; CHECK-NEXT: movprfx z1, z25 967; CHECK-NEXT: frintx z1.s, p0/m, z25.s 968; CHECK-NEXT: uunpkhi z15.d, z4.s 969; CHECK-NEXT: movprfx z24, z26 970; CHECK-NEXT: frintx z24.s, p0/m, z26.s 971; CHECK-NEXT: uunpkhi z26.d, z2.s 972; CHECK-NEXT: movprfx z25, z27 973; CHECK-NEXT: frintx z25.s, p0/m, z27.s 974; CHECK-NEXT: movprfx z27, z28 975; CHECK-NEXT: frintx z27.s, p0/m, z28.s 976; CHECK-NEXT: uunpklo z16.d, z5.s 977; CHECK-NEXT: uunpkhi z17.d, z7.s 978; CHECK-NEXT: frintx z30.s, p0/m, z30.s 979; CHECK-NEXT: uunpklo z18.d, z7.s 980; CHECK-NEXT: uunpklo z21.d, z6.s 981; CHECK-NEXT: fcmge p1.s, p0/z, z0.s, z31.s 982; CHECK-NEXT: movprfx z9, z0 983; CHECK-NEXT: fcvtzs z9.d, p0/m, z0.s 984; CHECK-NEXT: movprfx z10, z1 985; CHECK-NEXT: fcvtzs z10.d, p0/m, z1.s 986; CHECK-NEXT: fcmge p2.s, p0/z, z1.s, z31.s 987; CHECK-NEXT: fcmge p3.s, p0/z, z24.s, z31.s 988; CHECK-NEXT: movprfx z11, z24 989; CHECK-NEXT: fcvtzs z11.d, p0/m, z24.s 990; CHECK-NEXT: movprfx z29, z26 991; CHECK-NEXT: frintx z29.s, p0/m, z26.s 992; CHECK-NEXT: fcmge p4.s, p0/z, z25.s, z31.s 993; CHECK-NEXT: fcmge p5.s, p0/z, z27.s, z31.s 994; CHECK-NEXT: movprfx z12, z27 995; CHECK-NEXT: fcvtzs z12.d, p0/m, z27.s 996; CHECK-NEXT: movprfx z19, z30 997; CHECK-NEXT: fcvtzs z19.d, p0/m, z30.s 998; CHECK-NEXT: movprfx z7, z16 999; CHECK-NEXT: frintx z7.s, p0/m, z16.s 1000; CHECK-NEXT: not p1.b, p0/z, p1.b 1001; CHECK-NEXT: frintx z17.s, p0/m, z17.s 1002; CHECK-NEXT: uunpkhi z16.d, z5.s 1003; CHECK-NEXT: not p2.b, p0/z, p2.b 1004; CHECK-NEXT: frintx z18.s, p0/m, z18.s 1005; CHECK-NEXT: mov z28.s, w9 1006; CHECK-NEXT: not p6.b, p0/z, p3.b 1007; CHECK-NEXT: sel z26.d, p1, z8.d, z9.d 1008; CHECK-NEXT: movprfx z14, z29 1009; CHECK-NEXT: fcvtzs z14.d, p0/m, z29.s 1010; CHECK-NEXT: sel z9.d, p2, z8.d, z10.d 1011; CHECK-NEXT: uunpkhi z10.d, z3.s 1012; CHECK-NEXT: rdvl x9, #15 1013; CHECK-NEXT: sel z3.d, p6, z8.d, z11.d 1014; CHECK-NEXT: movprfx z11, z25 1015; CHECK-NEXT: fcvtzs z11.d, p0/m, z25.s 1016; CHECK-NEXT: fcmge p3.s, p0/z, z29.s, z31.s 1017; CHECK-NEXT: not p4.b, p0/z, p4.b 1018; CHECK-NEXT: fcmge p1.s, p0/z, z30.s, z31.s 1019; CHECK-NEXT: movprfx z23, z18 1020; CHECK-NEXT: fcvtzs z23.d, p0/m, z18.s 1021; CHECK-NEXT: not p2.b, p0/z, p5.b 1022; CHECK-NEXT: fcmge p5.s, p0/z, z17.s, z31.s 1023; CHECK-NEXT: frintx z16.s, p0/m, z16.s 1024; CHECK-NEXT: frintx z10.s, p0/m, z10.s 1025; CHECK-NEXT: mov z2.d, #0x7fffffffffffffff 1026; CHECK-NEXT: fcmgt p8.s, p0/z, z18.s, z28.s 1027; CHECK-NEXT: sel z4.d, p4, z8.d, z11.d 1028; CHECK-NEXT: movprfx z11, z13 1029; CHECK-NEXT: frintx z11.s, p0/m, z13.s 1030; CHECK-NEXT: not p3.b, p0/z, p3.b 1031; CHECK-NEXT: sel z13.d, p2, z8.d, z12.d 1032; CHECK-NEXT: not p1.b, p0/z, p1.b 1033; CHECK-NEXT: fcmge p4.s, p0/z, z7.s, z31.s 1034; CHECK-NEXT: sel z12.d, p3, z8.d, z14.d 1035; CHECK-NEXT: movprfx z14, z15 1036; CHECK-NEXT: frintx z14.s, p0/m, z15.s 1037; CHECK-NEXT: uunpkhi z15.d, z6.s 1038; CHECK-NEXT: movprfx z20, z10 1039; CHECK-NEXT: fcvtzs z20.d, p0/m, z10.s 1040; CHECK-NEXT: fcmge p2.s, p0/z, z10.s, z31.s 1041; CHECK-NEXT: sel z5.d, p1, z8.d, z19.d 1042; CHECK-NEXT: movprfx z19, z11 1043; CHECK-NEXT: fcvtzs z19.d, p0/m, z11.s 1044; CHECK-NEXT: fcmge p3.s, p0/z, z11.s, z31.s 1045; CHECK-NEXT: not p5.b, p0/z, p5.b 1046; CHECK-NEXT: fcmge p6.s, p0/z, z16.s, z31.s 1047; CHECK-NEXT: fcmuo p9.s, p0/z, z18.s, z18.s 1048; CHECK-NEXT: movprfx z22, z15 1049; CHECK-NEXT: frintx z22.s, p0/m, z15.s 1050; CHECK-NEXT: fcmge p1.s, p0/z, z14.s, z31.s 1051; CHECK-NEXT: not p2.b, p0/z, p2.b 1052; CHECK-NEXT: not p3.b, p0/z, p3.b 1053; CHECK-NEXT: sel z6.d, p2, z8.d, z20.d 1054; CHECK-NEXT: movprfx z20, z21 1055; CHECK-NEXT: frintx z20.s, p0/m, z21.s 1056; CHECK-NEXT: fcmge p2.s, p0/z, z18.s, z31.s 1057; CHECK-NEXT: sel z15.d, p3, z8.d, z19.d 1058; CHECK-NEXT: movprfx z19, z17 1059; CHECK-NEXT: fcvtzs z19.d, p0/m, z17.s 1060; CHECK-NEXT: not p3.b, p0/z, p4.b 1061; CHECK-NEXT: fcmge p4.s, p0/z, z22.s, z31.s 1062; CHECK-NEXT: movprfx z21, z14 1063; CHECK-NEXT: fcvtzs z21.d, p0/m, z14.s 1064; CHECK-NEXT: not p1.b, p0/z, p1.b 1065; CHECK-NEXT: movprfx z18, z7 1066; CHECK-NEXT: fcvtzs z18.d, p0/m, z7.s 1067; CHECK-NEXT: not p6.b, p0/z, p6.b 1068; CHECK-NEXT: fcmge p7.s, p0/z, z20.s, z31.s 1069; CHECK-NEXT: movprfx z31, z22 1070; CHECK-NEXT: fcvtzs z31.d, p0/m, z22.s 1071; CHECK-NEXT: not p2.b, p0/z, p2.b 1072; CHECK-NEXT: mov z19.d, p5/m, z8.d 1073; CHECK-NEXT: fcmgt p5.s, p0/z, z17.s, z28.s 1074; CHECK-NEXT: not p4.b, p0/z, p4.b 1075; CHECK-NEXT: mov z23.d, p2/m, z8.d 1076; CHECK-NEXT: fcmuo p2.s, p0/z, z17.s, z17.s 1077; CHECK-NEXT: movprfx z17, z20 1078; CHECK-NEXT: fcvtzs z17.d, p0/m, z20.s 1079; CHECK-NEXT: mov z21.d, p1/m, z8.d 1080; CHECK-NEXT: mov z18.d, p3/m, z8.d 1081; CHECK-NEXT: not p1.b, p0/z, p7.b 1082; CHECK-NEXT: mov z31.d, p4/m, z8.d 1083; CHECK-NEXT: fcmgt p4.s, p0/z, z20.s, z28.s 1084; CHECK-NEXT: mov z19.d, p5/m, z2.d 1085; CHECK-NEXT: fcmuo p7.s, p0/z, z20.s, z20.s 1086; CHECK-NEXT: movprfx z20, z16 1087; CHECK-NEXT: fcvtzs z20.d, p0/m, z16.s 1088; CHECK-NEXT: fcmgt p5.s, p0/z, z22.s, z28.s 1089; CHECK-NEXT: mov z23.d, p8/m, z2.d 1090; CHECK-NEXT: fcmuo p3.s, p0/z, z22.s, z22.s 1091; CHECK-NEXT: mov z17.d, p1/m, z8.d 1092; CHECK-NEXT: ptrue p1.b 1093; CHECK-NEXT: mov z19.d, p2/m, #0 // =0x0 1094; CHECK-NEXT: fcmgt p2.s, p0/z, z16.s, z28.s 1095; CHECK-NEXT: sel z8.d, p6, z8.d, z20.d 1096; CHECK-NEXT: mov z23.d, p9/m, #0 // =0x0 1097; CHECK-NEXT: fcmgt p6.s, p0/z, z14.s, z28.s 1098; CHECK-NEXT: mov z31.d, p5/m, z2.d 1099; CHECK-NEXT: mov z17.d, p4/m, z2.d 1100; CHECK-NEXT: fcmuo p4.s, p0/z, z16.s, z16.s 1101; CHECK-NEXT: st1b { z19.b }, p1, [x8, x9] 1102; CHECK-NEXT: rdvl x9, #14 1103; CHECK-NEXT: fcmgt p5.s, p0/z, z1.s, z28.s 1104; CHECK-NEXT: st1b { z23.b }, p1, [x8, x9] 1105; CHECK-NEXT: rdvl x9, #13 1106; CHECK-NEXT: mov z8.d, p2/m, z2.d 1107; CHECK-NEXT: mov z31.d, p3/m, #0 // =0x0 1108; CHECK-NEXT: fcmgt p3.s, p0/z, z7.s, z28.s 1109; CHECK-NEXT: mov z17.d, p7/m, #0 // =0x0 1110; CHECK-NEXT: fcmgt p2.s, p0/z, z11.s, z28.s 1111; CHECK-NEXT: fcmuo p7.s, p0/z, z14.s, z14.s 1112; CHECK-NEXT: mov z8.d, p4/m, #0 // =0x0 1113; CHECK-NEXT: fcmuo p4.s, p0/z, z7.s, z7.s 1114; CHECK-NEXT: sel z7.d, p5, z2.d, z9.d 1115; CHECK-NEXT: st1b { z31.b }, p1, [x8, x9] 1116; CHECK-NEXT: rdvl x9, #12 1117; CHECK-NEXT: fcmgt p5.s, p0/z, z27.s, z28.s 1118; CHECK-NEXT: st1b { z17.b }, p1, [x8, x9] 1119; CHECK-NEXT: rdvl x9, #11 1120; CHECK-NEXT: sel z31.d, p3, z2.d, z18.d 1121; CHECK-NEXT: st1b { z8.b }, p1, [x8, x9] 1122; CHECK-NEXT: rdvl x9, #10 1123; CHECK-NEXT: fcmgt p3.s, p0/z, z30.s, z28.s 1124; CHECK-NEXT: sel z9.d, p2, z2.d, z15.d 1125; CHECK-NEXT: fcmuo p2.s, p0/z, z11.s, z11.s 1126; CHECK-NEXT: sel z8.d, p6, z2.d, z21.d 1127; CHECK-NEXT: mov z31.d, p4/m, #0 // =0x0 1128; CHECK-NEXT: fcmgt p4.s, p0/z, z10.s, z28.s 1129; CHECK-NEXT: fcmgt p6.s, p0/z, z24.s, z28.s 1130; CHECK-NEXT: sel z11.d, p5, z2.d, z13.d 1131; CHECK-NEXT: fcmgt p5.s, p0/z, z25.s, z28.s 1132; CHECK-NEXT: mov z8.d, p7/m, #0 // =0x0 1133; CHECK-NEXT: mov z5.d, p3/m, z2.d 1134; CHECK-NEXT: fcmgt p3.s, p0/z, z29.s, z28.s 1135; CHECK-NEXT: st1b { z31.b }, p1, [x8, x9] 1136; CHECK-NEXT: rdvl x9, #9 1137; CHECK-NEXT: mov z9.d, p2/m, #0 // =0x0 1138; CHECK-NEXT: fcmuo p7.s, p0/z, z10.s, z10.s 1139; CHECK-NEXT: fcmuo p2.s, p0/z, z30.s, z30.s 1140; CHECK-NEXT: mov z6.d, p4/m, z2.d 1141; CHECK-NEXT: st1b { z8.b }, p1, [x8, x9] 1142; CHECK-NEXT: rdvl x9, #8 1143; CHECK-NEXT: fcmuo p4.s, p0/z, z29.s, z29.s 1144; CHECK-NEXT: st1b { z9.b }, p1, [x8, x9] 1145; CHECK-NEXT: fcmuo p1.s, p0/z, z27.s, z27.s 1146; CHECK-NEXT: sel z27.d, p3, z2.d, z12.d 1147; CHECK-NEXT: fcmgt p3.s, p0/z, z0.s, z28.s 1148; CHECK-NEXT: mov z4.d, p5/m, z2.d 1149; CHECK-NEXT: mov z3.d, p6/m, z2.d 1150; CHECK-NEXT: mov z6.d, p7/m, #0 // =0x0 1151; CHECK-NEXT: fcmuo p7.s, p0/z, z25.s, z25.s 1152; CHECK-NEXT: mov z5.d, p2/m, #0 // =0x0 1153; CHECK-NEXT: fcmuo p2.s, p0/z, z24.s, z24.s 1154; CHECK-NEXT: mov z27.d, p4/m, #0 // =0x0 1155; CHECK-NEXT: fcmuo p4.s, p0/z, z1.s, z1.s 1156; CHECK-NEXT: mov z11.d, p1/m, #0 // =0x0 1157; CHECK-NEXT: fcmuo p1.s, p0/z, z0.s, z0.s 1158; CHECK-NEXT: st1d { z6.d }, p0, [x8, #7, mul vl] 1159; CHECK-NEXT: sel z0.d, p3, z2.d, z26.d 1160; CHECK-NEXT: st1d { z5.d }, p0, [x8, #6, mul vl] 1161; CHECK-NEXT: mov z4.d, p7/m, #0 // =0x0 1162; CHECK-NEXT: st1d { z27.d }, p0, [x8, #5, mul vl] 1163; CHECK-NEXT: mov z3.d, p2/m, #0 // =0x0 1164; CHECK-NEXT: mov z7.d, p4/m, #0 // =0x0 1165; CHECK-NEXT: st1d { z11.d }, p0, [x8, #4, mul vl] 1166; CHECK-NEXT: mov z0.d, p1/m, #0 // =0x0 1167; CHECK-NEXT: st1d { z4.d }, p0, [x8, #3, mul vl] 1168; CHECK-NEXT: st1d { z3.d }, p0, [x8, #2, mul vl] 1169; CHECK-NEXT: st1d { z7.d }, p0, [x8, #1, mul vl] 1170; CHECK-NEXT: st1d { z0.d }, p0, [x8] 1171; CHECK-NEXT: ldr z23, [sp, #1, mul vl] // 16-byte Folded Reload 1172; CHECK-NEXT: ldr z22, [sp, #2, mul vl] // 16-byte Folded Reload 1173; CHECK-NEXT: ldr z21, [sp, #3, mul vl] // 16-byte Folded Reload 1174; CHECK-NEXT: ldr z20, [sp, #4, mul vl] // 16-byte Folded Reload 1175; CHECK-NEXT: ldr z19, [sp, #5, mul vl] // 16-byte Folded Reload 1176; CHECK-NEXT: ldr z18, [sp, #6, mul vl] // 16-byte Folded Reload 1177; CHECK-NEXT: ldr z17, [sp, #7, mul vl] // 16-byte Folded Reload 1178; CHECK-NEXT: ldr z16, [sp, #8, mul vl] // 16-byte Folded Reload 1179; CHECK-NEXT: ldr z15, [sp, #9, mul vl] // 16-byte Folded Reload 1180; CHECK-NEXT: ldr z14, [sp, #10, mul vl] // 16-byte Folded Reload 1181; CHECK-NEXT: ldr z13, [sp, #11, mul vl] // 16-byte Folded Reload 1182; CHECK-NEXT: ldr z12, [sp, #12, mul vl] // 16-byte Folded Reload 1183; CHECK-NEXT: ldr z11, [sp, #13, mul vl] // 16-byte Folded Reload 1184; CHECK-NEXT: ldr z10, [sp, #14, mul vl] // 16-byte Folded Reload 1185; CHECK-NEXT: ldr z9, [sp, #15, mul vl] // 16-byte Folded Reload 1186; CHECK-NEXT: ldr z8, [sp, #16, mul vl] // 16-byte Folded Reload 1187; CHECK-NEXT: ldr p9, [sp, #2, mul vl] // 2-byte Folded Reload 1188; CHECK-NEXT: ldr p8, [sp, #3, mul vl] // 2-byte Folded Reload 1189; CHECK-NEXT: ldr p7, [sp, #4, mul vl] // 2-byte Folded Reload 1190; CHECK-NEXT: ldr p6, [sp, #5, mul vl] // 2-byte Folded Reload 1191; CHECK-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Folded Reload 1192; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload 1193; CHECK-NEXT: addvl sp, sp, #17 1194; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload 1195; CHECK-NEXT: ret 1196 %a = call <vscale x 32 x i64> @llvm.llrint.nxv32i64.nxv32f32(<vscale x 32 x float> %x) 1197 ret <vscale x 32 x i64> %a 1198} 1199declare <vscale x 32 x i64> @llvm.llrint.nxv32i64.nxv32f32(<vscale x 32 x float>) 1200 1201define <vscale x 1 x i64> @llrint_v1i64_v1f64(<vscale x 1 x double> %x) { 1202; CHECK-LABEL: llrint_v1i64_v1f64: 1203; CHECK: // %bb.0: 1204; CHECK-NEXT: ptrue p0.d 1205; CHECK-NEXT: mov x8, #-4332462841530417152 // =0xc3e0000000000000 1206; CHECK-NEXT: mov z2.d, #0x8000000000000000 1207; CHECK-NEXT: mov z1.d, x8 1208; CHECK-NEXT: mov x8, #4890909195324358655 // =0x43dfffffffffffff 1209; CHECK-NEXT: frintx z0.d, p0/m, z0.d 1210; CHECK-NEXT: mov z3.d, x8 1211; CHECK-NEXT: fcmge p1.d, p0/z, z0.d, z1.d 1212; CHECK-NEXT: movprfx z1, z0 1213; CHECK-NEXT: fcvtzs z1.d, p0/m, z0.d 1214; CHECK-NEXT: fcmgt p2.d, p0/z, z0.d, z3.d 1215; CHECK-NEXT: mov z3.d, #0x7fffffffffffffff 1216; CHECK-NEXT: not p1.b, p0/z, p1.b 1217; CHECK-NEXT: fcmuo p0.d, p0/z, z0.d, z0.d 1218; CHECK-NEXT: mov z1.d, p1/m, z2.d 1219; CHECK-NEXT: sel z0.d, p2, z3.d, z1.d 1220; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x0 1221; CHECK-NEXT: ret 1222 %a = call <vscale x 1 x i64> @llvm.llrint.nxv1i64.nxv1f64(<vscale x 1 x double> %x) 1223 ret <vscale x 1 x i64> %a 1224} 1225declare <vscale x 1 x i64> @llvm.llrint.nxv1i64.nxv1f64(<vscale x 1 x double>) 1226 1227define <vscale x 2 x i64> @llrint_v2i64_v2f64(<vscale x 2 x double> %x) { 1228; CHECK-LABEL: llrint_v2i64_v2f64: 1229; CHECK: // %bb.0: 1230; CHECK-NEXT: ptrue p0.d 1231; CHECK-NEXT: mov x8, #-4332462841530417152 // =0xc3e0000000000000 1232; CHECK-NEXT: mov z2.d, #0x8000000000000000 1233; CHECK-NEXT: mov z1.d, x8 1234; CHECK-NEXT: mov x8, #4890909195324358655 // =0x43dfffffffffffff 1235; CHECK-NEXT: frintx z0.d, p0/m, z0.d 1236; CHECK-NEXT: mov z3.d, x8 1237; CHECK-NEXT: fcmge p1.d, p0/z, z0.d, z1.d 1238; CHECK-NEXT: movprfx z1, z0 1239; CHECK-NEXT: fcvtzs z1.d, p0/m, z0.d 1240; CHECK-NEXT: fcmgt p2.d, p0/z, z0.d, z3.d 1241; CHECK-NEXT: mov z3.d, #0x7fffffffffffffff 1242; CHECK-NEXT: not p1.b, p0/z, p1.b 1243; CHECK-NEXT: fcmuo p0.d, p0/z, z0.d, z0.d 1244; CHECK-NEXT: mov z1.d, p1/m, z2.d 1245; CHECK-NEXT: sel z0.d, p2, z3.d, z1.d 1246; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x0 1247; CHECK-NEXT: ret 1248 %a = call <vscale x 2 x i64> @llvm.llrint.nxv2i64.nxv2f64(<vscale x 2 x double> %x) 1249 ret <vscale x 2 x i64> %a 1250} 1251declare <vscale x 2 x i64> @llvm.llrint.nxv2i64.nxv2f64(<vscale x 2 x double>) 1252 1253define <vscale x 4 x i64> @llrint_v4i64_v4f64(<vscale x 4 x double> %x) { 1254; CHECK-LABEL: llrint_v4i64_v4f64: 1255; CHECK: // %bb.0: 1256; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill 1257; CHECK-NEXT: addvl sp, sp, #-1 1258; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill 1259; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG 1260; CHECK-NEXT: .cfi_offset w29, -16 1261; CHECK-NEXT: ptrue p0.d 1262; CHECK-NEXT: mov x8, #-4332462841530417152 // =0xc3e0000000000000 1263; CHECK-NEXT: mov z6.d, #0x7fffffffffffffff 1264; CHECK-NEXT: mov z2.d, x8 1265; CHECK-NEXT: mov x8, #4890909195324358655 // =0x43dfffffffffffff 1266; CHECK-NEXT: frintx z0.d, p0/m, z0.d 1267; CHECK-NEXT: frintx z1.d, p0/m, z1.d 1268; CHECK-NEXT: mov z3.d, x8 1269; CHECK-NEXT: fcmge p1.d, p0/z, z0.d, z2.d 1270; CHECK-NEXT: fcmge p2.d, p0/z, z1.d, z2.d 1271; CHECK-NEXT: mov z2.d, #0x8000000000000000 1272; CHECK-NEXT: movprfx z4, z0 1273; CHECK-NEXT: fcvtzs z4.d, p0/m, z0.d 1274; CHECK-NEXT: movprfx z5, z1 1275; CHECK-NEXT: fcvtzs z5.d, p0/m, z1.d 1276; CHECK-NEXT: fcmgt p3.d, p0/z, z0.d, z3.d 1277; CHECK-NEXT: fcmgt p4.d, p0/z, z1.d, z3.d 1278; CHECK-NEXT: not p1.b, p0/z, p1.b 1279; CHECK-NEXT: not p2.b, p0/z, p2.b 1280; CHECK-NEXT: sel z3.d, p1, z2.d, z4.d 1281; CHECK-NEXT: fcmuo p1.d, p0/z, z0.d, z0.d 1282; CHECK-NEXT: fcmuo p0.d, p0/z, z1.d, z1.d 1283; CHECK-NEXT: sel z2.d, p2, z2.d, z5.d 1284; CHECK-NEXT: sel z0.d, p3, z6.d, z3.d 1285; CHECK-NEXT: sel z1.d, p4, z6.d, z2.d 1286; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload 1287; CHECK-NEXT: mov z0.d, p1/m, #0 // =0x0 1288; CHECK-NEXT: mov z1.d, p0/m, #0 // =0x0 1289; CHECK-NEXT: addvl sp, sp, #1 1290; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload 1291; CHECK-NEXT: ret 1292 %a = call <vscale x 4 x i64> @llvm.llrint.nxv4i64.nxv4f64(<vscale x 4 x double> %x) 1293 ret <vscale x 4 x i64> %a 1294} 1295declare <vscale x 4 x i64> @llvm.llrint.nxv4i64.nxv4f64(<vscale x 4 x double>) 1296 1297define <vscale x 8 x i64> @llrint_v8i64_v8f64(<vscale x 8 x double> %x) { 1298; CHECK-LABEL: llrint_v8i64_v8f64: 1299; CHECK: // %bb.0: 1300; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill 1301; CHECK-NEXT: addvl sp, sp, #-1 1302; CHECK-NEXT: str p7, [sp, #4, mul vl] // 2-byte Folded Spill 1303; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Folded Spill 1304; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Folded Spill 1305; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill 1306; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG 1307; CHECK-NEXT: .cfi_offset w29, -16 1308; CHECK-NEXT: ptrue p0.d 1309; CHECK-NEXT: mov x8, #-4332462841530417152 // =0xc3e0000000000000 1310; CHECK-NEXT: mov z5.d, #0x8000000000000000 1311; CHECK-NEXT: mov z4.d, x8 1312; CHECK-NEXT: mov x8, #4890909195324358655 // =0x43dfffffffffffff 1313; CHECK-NEXT: mov z26.d, #0x7fffffffffffffff 1314; CHECK-NEXT: frintx z0.d, p0/m, z0.d 1315; CHECK-NEXT: frintx z1.d, p0/m, z1.d 1316; CHECK-NEXT: frintx z2.d, p0/m, z2.d 1317; CHECK-NEXT: frintx z3.d, p0/m, z3.d 1318; CHECK-NEXT: mov z6.d, x8 1319; CHECK-NEXT: fcmge p1.d, p0/z, z0.d, z4.d 1320; CHECK-NEXT: fcmge p2.d, p0/z, z1.d, z4.d 1321; CHECK-NEXT: fcmge p3.d, p0/z, z2.d, z4.d 1322; CHECK-NEXT: fcmge p4.d, p0/z, z3.d, z4.d 1323; CHECK-NEXT: movprfx z4, z0 1324; CHECK-NEXT: fcvtzs z4.d, p0/m, z0.d 1325; CHECK-NEXT: movprfx z7, z1 1326; CHECK-NEXT: fcvtzs z7.d, p0/m, z1.d 1327; CHECK-NEXT: movprfx z24, z2 1328; CHECK-NEXT: fcvtzs z24.d, p0/m, z2.d 1329; CHECK-NEXT: movprfx z25, z3 1330; CHECK-NEXT: fcvtzs z25.d, p0/m, z3.d 1331; CHECK-NEXT: fcmgt p7.d, p0/z, z2.d, z6.d 1332; CHECK-NEXT: fcmgt p5.d, p0/z, z0.d, z6.d 1333; CHECK-NEXT: fcmgt p6.d, p0/z, z1.d, z6.d 1334; CHECK-NEXT: not p1.b, p0/z, p1.b 1335; CHECK-NEXT: not p2.b, p0/z, p2.b 1336; CHECK-NEXT: not p3.b, p0/z, p3.b 1337; CHECK-NEXT: mov z4.d, p1/m, z5.d 1338; CHECK-NEXT: fcmgt p1.d, p0/z, z3.d, z6.d 1339; CHECK-NEXT: not p4.b, p0/z, p4.b 1340; CHECK-NEXT: sel z6.d, p2, z5.d, z7.d 1341; CHECK-NEXT: fcmuo p2.d, p0/z, z0.d, z0.d 1342; CHECK-NEXT: sel z7.d, p3, z5.d, z24.d 1343; CHECK-NEXT: fcmuo p3.d, p0/z, z1.d, z1.d 1344; CHECK-NEXT: sel z5.d, p4, z5.d, z25.d 1345; CHECK-NEXT: fcmuo p4.d, p0/z, z2.d, z2.d 1346; CHECK-NEXT: fcmuo p0.d, p0/z, z3.d, z3.d 1347; CHECK-NEXT: sel z0.d, p5, z26.d, z4.d 1348; CHECK-NEXT: sel z1.d, p6, z26.d, z6.d 1349; CHECK-NEXT: ldr p6, [sp, #5, mul vl] // 2-byte Folded Reload 1350; CHECK-NEXT: sel z2.d, p7, z26.d, z7.d 1351; CHECK-NEXT: ldr p7, [sp, #4, mul vl] // 2-byte Folded Reload 1352; CHECK-NEXT: sel z3.d, p1, z26.d, z5.d 1353; CHECK-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Folded Reload 1354; CHECK-NEXT: mov z0.d, p2/m, #0 // =0x0 1355; CHECK-NEXT: mov z1.d, p3/m, #0 // =0x0 1356; CHECK-NEXT: mov z2.d, p4/m, #0 // =0x0 1357; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload 1358; CHECK-NEXT: mov z3.d, p0/m, #0 // =0x0 1359; CHECK-NEXT: addvl sp, sp, #1 1360; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload 1361; CHECK-NEXT: ret 1362 %a = call <vscale x 8 x i64> @llvm.llrint.nxv8i64.nxv8f64(<vscale x 8 x double> %x) 1363 ret <vscale x 8 x i64> %a 1364} 1365declare <vscale x 8 x i64> @llvm.llrint.nxv8i64.nxv8f64(<vscale x 8 x double>) 1366 1367define <vscale x 16 x i64> @llrint_v16f64(<vscale x 16 x double> %x) { 1368; CHECK-LABEL: llrint_v16f64: 1369; CHECK: // %bb.0: 1370; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill 1371; CHECK-NEXT: addvl sp, sp, #-2 1372; CHECK-NEXT: str p10, [sp, #1, mul vl] // 2-byte Folded Spill 1373; CHECK-NEXT: str p9, [sp, #2, mul vl] // 2-byte Folded Spill 1374; CHECK-NEXT: str p8, [sp, #3, mul vl] // 2-byte Folded Spill 1375; CHECK-NEXT: str p7, [sp, #4, mul vl] // 2-byte Folded Spill 1376; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Folded Spill 1377; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Folded Spill 1378; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill 1379; CHECK-NEXT: str z8, [sp, #1, mul vl] // 16-byte Folded Spill 1380; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 16 * VG 1381; CHECK-NEXT: .cfi_offset w29, -16 1382; CHECK-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG 1383; CHECK-NEXT: ptrue p0.d 1384; CHECK-NEXT: mov x8, #-4332462841530417152 // =0xc3e0000000000000 1385; CHECK-NEXT: mov z24.d, #0x7fffffffffffffff 1386; CHECK-NEXT: mov z25.d, x8 1387; CHECK-NEXT: mov x8, #4890909195324358655 // =0x43dfffffffffffff 1388; CHECK-NEXT: movprfx z26, z0 1389; CHECK-NEXT: frintx z26.d, p0/m, z0.d 1390; CHECK-NEXT: movprfx z27, z1 1391; CHECK-NEXT: frintx z27.d, p0/m, z1.d 1392; CHECK-NEXT: frintx z2.d, p0/m, z2.d 1393; CHECK-NEXT: mov z0.d, #0x8000000000000000 1394; CHECK-NEXT: mov z1.d, x8 1395; CHECK-NEXT: frintx z3.d, p0/m, z3.d 1396; CHECK-NEXT: movprfx z28, z4 1397; CHECK-NEXT: frintx z28.d, p0/m, z4.d 1398; CHECK-NEXT: frintx z5.d, p0/m, z5.d 1399; CHECK-NEXT: frintx z6.d, p0/m, z6.d 1400; CHECK-NEXT: frintx z7.d, p0/m, z7.d 1401; CHECK-NEXT: fcmge p1.d, p0/z, z26.d, z25.d 1402; CHECK-NEXT: fcmge p2.d, p0/z, z27.d, z25.d 1403; CHECK-NEXT: movprfx z4, z26 1404; CHECK-NEXT: fcvtzs z4.d, p0/m, z26.d 1405; CHECK-NEXT: fcmge p5.d, p0/z, z2.d, z25.d 1406; CHECK-NEXT: movprfx z29, z27 1407; CHECK-NEXT: fcvtzs z29.d, p0/m, z27.d 1408; CHECK-NEXT: fcmgt p3.d, p0/z, z26.d, z1.d 1409; CHECK-NEXT: fcmge p6.d, p0/z, z3.d, z25.d 1410; CHECK-NEXT: fcmge p8.d, p0/z, z5.d, z25.d 1411; CHECK-NEXT: fcmgt p7.d, p0/z, z27.d, z1.d 1412; CHECK-NEXT: fcmge p9.d, p0/z, z6.d, z25.d 1413; CHECK-NEXT: movprfx z30, z28 1414; CHECK-NEXT: fcvtzs z30.d, p0/m, z28.d 1415; CHECK-NEXT: fcmge p10.d, p0/z, z7.d, z25.d 1416; CHECK-NEXT: not p4.b, p0/z, p1.b 1417; CHECK-NEXT: fcmuo p1.d, p0/z, z26.d, z26.d 1418; CHECK-NEXT: movprfx z26, z2 1419; CHECK-NEXT: fcvtzs z26.d, p0/m, z2.d 1420; CHECK-NEXT: not p2.b, p0/z, p2.b 1421; CHECK-NEXT: movprfx z31, z6 1422; CHECK-NEXT: fcvtzs z31.d, p0/m, z6.d 1423; CHECK-NEXT: movprfx z8, z7 1424; CHECK-NEXT: fcvtzs z8.d, p0/m, z7.d 1425; CHECK-NEXT: mov z4.d, p4/m, z0.d 1426; CHECK-NEXT: fcmge p4.d, p0/z, z28.d, z25.d 1427; CHECK-NEXT: not p5.b, p0/z, p5.b 1428; CHECK-NEXT: mov z29.d, p2/m, z0.d 1429; CHECK-NEXT: fcmuo p2.d, p0/z, z27.d, z27.d 1430; CHECK-NEXT: movprfx z27, z3 1431; CHECK-NEXT: fcvtzs z27.d, p0/m, z3.d 1432; CHECK-NEXT: sel z25.d, p5, z0.d, z26.d 1433; CHECK-NEXT: movprfx z26, z5 1434; CHECK-NEXT: fcvtzs z26.d, p0/m, z5.d 1435; CHECK-NEXT: not p6.b, p0/z, p6.b 1436; CHECK-NEXT: not p5.b, p0/z, p8.b 1437; CHECK-NEXT: fcmgt p8.d, p0/z, z2.d, z1.d 1438; CHECK-NEXT: not p4.b, p0/z, p4.b 1439; CHECK-NEXT: mov z27.d, p6/m, z0.d 1440; CHECK-NEXT: not p6.b, p0/z, p9.b 1441; CHECK-NEXT: fcmuo p9.d, p0/z, z2.d, z2.d 1442; CHECK-NEXT: mov z30.d, p4/m, z0.d 1443; CHECK-NEXT: not p4.b, p0/z, p10.b 1444; CHECK-NEXT: fcmgt p10.d, p0/z, z3.d, z1.d 1445; CHECK-NEXT: mov z26.d, p5/m, z0.d 1446; CHECK-NEXT: fcmgt p5.d, p0/z, z28.d, z1.d 1447; CHECK-NEXT: mov z31.d, p6/m, z0.d 1448; CHECK-NEXT: mov z8.d, p4/m, z0.d 1449; CHECK-NEXT: sel z0.d, p3, z24.d, z4.d 1450; CHECK-NEXT: fcmgt p3.d, p0/z, z5.d, z1.d 1451; CHECK-NEXT: fcmgt p4.d, p0/z, z6.d, z1.d 1452; CHECK-NEXT: fcmgt p6.d, p0/z, z7.d, z1.d 1453; CHECK-NEXT: sel z1.d, p7, z24.d, z29.d 1454; CHECK-NEXT: fcmuo p7.d, p0/z, z3.d, z3.d 1455; CHECK-NEXT: sel z2.d, p8, z24.d, z25.d 1456; CHECK-NEXT: sel z3.d, p10, z24.d, z27.d 1457; CHECK-NEXT: sel z4.d, p5, z24.d, z30.d 1458; CHECK-NEXT: fcmuo p5.d, p0/z, z28.d, z28.d 1459; CHECK-NEXT: fcmuo p8.d, p0/z, z5.d, z5.d 1460; CHECK-NEXT: fcmuo p10.d, p0/z, z6.d, z6.d 1461; CHECK-NEXT: sel z5.d, p3, z24.d, z26.d 1462; CHECK-NEXT: fcmuo p0.d, p0/z, z7.d, z7.d 1463; CHECK-NEXT: sel z6.d, p4, z24.d, z31.d 1464; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload 1465; CHECK-NEXT: sel z7.d, p6, z24.d, z8.d 1466; CHECK-NEXT: ldr z8, [sp, #1, mul vl] // 16-byte Folded Reload 1467; CHECK-NEXT: ldr p6, [sp, #5, mul vl] // 2-byte Folded Reload 1468; CHECK-NEXT: mov z2.d, p9/m, #0 // =0x0 1469; CHECK-NEXT: ldr p9, [sp, #2, mul vl] // 2-byte Folded Reload 1470; CHECK-NEXT: mov z3.d, p7/m, #0 // =0x0 1471; CHECK-NEXT: mov z4.d, p5/m, #0 // =0x0 1472; CHECK-NEXT: ldr p7, [sp, #4, mul vl] // 2-byte Folded Reload 1473; CHECK-NEXT: mov z5.d, p8/m, #0 // =0x0 1474; CHECK-NEXT: mov z6.d, p10/m, #0 // =0x0 1475; CHECK-NEXT: ldr p10, [sp, #1, mul vl] // 2-byte Folded Reload 1476; CHECK-NEXT: mov z0.d, p1/m, #0 // =0x0 1477; CHECK-NEXT: mov z1.d, p2/m, #0 // =0x0 1478; CHECK-NEXT: ldr p8, [sp, #3, mul vl] // 2-byte Folded Reload 1479; CHECK-NEXT: mov z7.d, p0/m, #0 // =0x0 1480; CHECK-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Folded Reload 1481; CHECK-NEXT: addvl sp, sp, #2 1482; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload 1483; CHECK-NEXT: ret 1484 %a = call <vscale x 16 x i64> @llvm.llrint.nxv16i64.nxv16f64(<vscale x 16 x double> %x) 1485 ret <vscale x 16 x i64> %a 1486} 1487declare <vscale x 16 x i64> @llvm.llrint.nxv16i64.nxv16f64(<vscale x 16 x double>) 1488 1489define <vscale x 32 x i64> @llrint_v32f64(<vscale x 32 x double> %x) { 1490; CHECK-LABEL: llrint_v32f64: 1491; CHECK: // %bb.0: 1492; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill 1493; CHECK-NEXT: addvl sp, sp, #-12 1494; CHECK-NEXT: str p8, [sp, #3, mul vl] // 2-byte Folded Spill 1495; CHECK-NEXT: str p7, [sp, #4, mul vl] // 2-byte Folded Spill 1496; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Folded Spill 1497; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Folded Spill 1498; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill 1499; CHECK-NEXT: str z18, [sp, #1, mul vl] // 16-byte Folded Spill 1500; CHECK-NEXT: str z17, [sp, #2, mul vl] // 16-byte Folded Spill 1501; CHECK-NEXT: str z16, [sp, #3, mul vl] // 16-byte Folded Spill 1502; CHECK-NEXT: str z15, [sp, #4, mul vl] // 16-byte Folded Spill 1503; CHECK-NEXT: str z14, [sp, #5, mul vl] // 16-byte Folded Spill 1504; CHECK-NEXT: str z13, [sp, #6, mul vl] // 16-byte Folded Spill 1505; CHECK-NEXT: str z12, [sp, #7, mul vl] // 16-byte Folded Spill 1506; CHECK-NEXT: str z11, [sp, #8, mul vl] // 16-byte Folded Spill 1507; CHECK-NEXT: str z10, [sp, #9, mul vl] // 16-byte Folded Spill 1508; CHECK-NEXT: str z9, [sp, #10, mul vl] // 16-byte Folded Spill 1509; CHECK-NEXT: str z8, [sp, #11, mul vl] // 16-byte Folded Spill 1510; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0xe0, 0x00, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 96 * VG 1511; CHECK-NEXT: .cfi_offset w29, -16 1512; CHECK-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG 1513; CHECK-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG 1514; CHECK-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x68, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 24 * VG 1515; CHECK-NEXT: .cfi_escape 0x10, 0x4b, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x60, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d11 @ cfa - 16 - 32 * VG 1516; CHECK-NEXT: .cfi_escape 0x10, 0x4c, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x58, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d12 @ cfa - 16 - 40 * VG 1517; CHECK-NEXT: .cfi_escape 0x10, 0x4d, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x50, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d13 @ cfa - 16 - 48 * VG 1518; CHECK-NEXT: .cfi_escape 0x10, 0x4e, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x48, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d14 @ cfa - 16 - 56 * VG 1519; CHECK-NEXT: .cfi_escape 0x10, 0x4f, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x40, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d15 @ cfa - 16 - 64 * VG 1520; CHECK-NEXT: ptrue p1.b 1521; CHECK-NEXT: rdvl x9, #8 1522; CHECK-NEXT: rdvl x10, #9 1523; CHECK-NEXT: ptrue p0.d 1524; CHECK-NEXT: rdvl x11, #10 1525; CHECK-NEXT: mov x12, #-4332462841530417152 // =0xc3e0000000000000 1526; CHECK-NEXT: ld1b { z0.b }, p1/z, [x0, x9] 1527; CHECK-NEXT: ld1b { z1.b }, p1/z, [x0, x10] 1528; CHECK-NEXT: mov z2.d, x12 1529; CHECK-NEXT: rdvl x14, #13 1530; CHECK-NEXT: rdvl x13, #12 1531; CHECK-NEXT: rdvl x12, #11 1532; CHECK-NEXT: ld1b { z6.b }, p1/z, [x0, x14] 1533; CHECK-NEXT: ld1b { z7.b }, p1/z, [x0, x13] 1534; CHECK-NEXT: mov z3.d, #0x8000000000000000 1535; CHECK-NEXT: movprfx z24, z0 1536; CHECK-NEXT: frintx z24.d, p0/m, z0.d 1537; CHECK-NEXT: ld1b { z0.b }, p1/z, [x0, x11] 1538; CHECK-NEXT: movprfx z5, z1 1539; CHECK-NEXT: frintx z5.d, p0/m, z1.d 1540; CHECK-NEXT: ld1b { z1.b }, p1/z, [x0, x12] 1541; CHECK-NEXT: mov x15, #4890909195324358655 // =0x43dfffffffffffff 1542; CHECK-NEXT: rdvl x16, #15 1543; CHECK-NEXT: movprfx z30, z6 1544; CHECK-NEXT: frintx z30.d, p0/m, z6.d 1545; CHECK-NEXT: movprfx z28, z7 1546; CHECK-NEXT: frintx z28.d, p0/m, z7.d 1547; CHECK-NEXT: ld1b { z8.b }, p1/z, [x0, x16] 1548; CHECK-NEXT: movprfx z4, z0 1549; CHECK-NEXT: frintx z4.d, p0/m, z0.d 1550; CHECK-NEXT: mov z0.d, #0x7fffffffffffffff 1551; CHECK-NEXT: ld1d { z18.d }, p0/z, [x0] 1552; CHECK-NEXT: fcmge p3.d, p0/z, z5.d, z2.d 1553; CHECK-NEXT: fcmge p2.d, p0/z, z24.d, z2.d 1554; CHECK-NEXT: movprfx z6, z5 1555; CHECK-NEXT: fcvtzs z6.d, p0/m, z5.d 1556; CHECK-NEXT: movprfx z27, z1 1557; CHECK-NEXT: frintx z27.d, p0/m, z1.d 1558; CHECK-NEXT: movprfx z25, z24 1559; CHECK-NEXT: fcvtzs z25.d, p0/m, z24.d 1560; CHECK-NEXT: mov z1.d, x15 1561; CHECK-NEXT: rdvl x15, #14 1562; CHECK-NEXT: movprfx z9, z28 1563; CHECK-NEXT: fcvtzs z9.d, p0/m, z28.d 1564; CHECK-NEXT: movprfx z13, z8 1565; CHECK-NEXT: frintx z13.d, p0/m, z8.d 1566; CHECK-NEXT: fcmge p4.d, p0/z, z4.d, z2.d 1567; CHECK-NEXT: movprfx z7, z4 1568; CHECK-NEXT: fcvtzs z7.d, p0/m, z4.d 1569; CHECK-NEXT: ld1d { z15.d }, p0/z, [x0, #2, mul vl] 1570; CHECK-NEXT: not p3.b, p0/z, p3.b 1571; CHECK-NEXT: fcmgt p5.d, p0/z, z24.d, z1.d 1572; CHECK-NEXT: fcmgt p6.d, p0/z, z5.d, z1.d 1573; CHECK-NEXT: not p2.b, p0/z, p2.b 1574; CHECK-NEXT: fcmge p7.d, p0/z, z27.d, z2.d 1575; CHECK-NEXT: movprfx z26, z27 1576; CHECK-NEXT: fcvtzs z26.d, p0/m, z27.d 1577; CHECK-NEXT: sel z29.d, p3, z3.d, z6.d 1578; CHECK-NEXT: ld1b { z6.b }, p1/z, [x0, x15] 1579; CHECK-NEXT: fcmge p3.d, p0/z, z28.d, z2.d 1580; CHECK-NEXT: not p4.b, p0/z, p4.b 1581; CHECK-NEXT: mov z25.d, p2/m, z3.d 1582; CHECK-NEXT: fcmgt p2.d, p0/z, z4.d, z1.d 1583; CHECK-NEXT: movprfx z16, z13 1584; CHECK-NEXT: fcvtzs z16.d, p0/m, z13.d 1585; CHECK-NEXT: ld1d { z17.d }, p0/z, [x0, #1, mul vl] 1586; CHECK-NEXT: ld1d { z14.d }, p0/z, [x0, #3, mul vl] 1587; CHECK-NEXT: sel z31.d, p4, z3.d, z7.d 1588; CHECK-NEXT: movprfx z11, z6 1589; CHECK-NEXT: frintx z11.d, p0/m, z6.d 1590; CHECK-NEXT: not p7.b, p0/z, p7.b 1591; CHECK-NEXT: not p3.b, p0/z, p3.b 1592; CHECK-NEXT: sel z6.d, p5, z0.d, z25.d 1593; CHECK-NEXT: fcmgt p4.d, p0/z, z27.d, z1.d 1594; CHECK-NEXT: sel z7.d, p6, z0.d, z29.d 1595; CHECK-NEXT: mov z26.d, p7/m, z3.d 1596; CHECK-NEXT: fcmge p5.d, p0/z, z13.d, z2.d 1597; CHECK-NEXT: sel z25.d, p2, z0.d, z31.d 1598; CHECK-NEXT: fcmge p2.d, p0/z, z30.d, z2.d 1599; CHECK-NEXT: sel z29.d, p3, z3.d, z9.d 1600; CHECK-NEXT: fcmge p3.d, p0/z, z11.d, z2.d 1601; CHECK-NEXT: movprfx z31, z30 1602; CHECK-NEXT: fcvtzs z31.d, p0/m, z30.d 1603; CHECK-NEXT: movprfx z9, z11 1604; CHECK-NEXT: fcvtzs z9.d, p0/m, z11.d 1605; CHECK-NEXT: mov z26.d, p4/m, z0.d 1606; CHECK-NEXT: fcmgt p4.d, p0/z, z28.d, z1.d 1607; CHECK-NEXT: fcmgt p6.d, p0/z, z30.d, z1.d 1608; CHECK-NEXT: not p7.b, p0/z, p5.b 1609; CHECK-NEXT: fcmuo p5.d, p0/z, z27.d, z27.d 1610; CHECK-NEXT: fcmgt p8.d, p0/z, z13.d, z1.d 1611; CHECK-NEXT: not p2.b, p0/z, p2.b 1612; CHECK-NEXT: movprfx z27, z18 1613; CHECK-NEXT: frintx z27.d, p0/m, z18.d 1614; CHECK-NEXT: ld1d { z8.d }, p0/z, [x0, #7, mul vl] 1615; CHECK-NEXT: not p3.b, p0/z, p3.b 1616; CHECK-NEXT: mov z16.d, p7/m, z3.d 1617; CHECK-NEXT: fcmuo p7.d, p0/z, z13.d, z13.d 1618; CHECK-NEXT: mov z31.d, p2/m, z3.d 1619; CHECK-NEXT: fcmgt p2.d, p0/z, z11.d, z1.d 1620; CHECK-NEXT: mov z29.d, p4/m, z0.d 1621; CHECK-NEXT: mov z9.d, p3/m, z3.d 1622; CHECK-NEXT: fcmuo p3.d, p0/z, z28.d, z28.d 1623; CHECK-NEXT: fcmuo p4.d, p0/z, z30.d, z30.d 1624; CHECK-NEXT: movprfx z28, z17 1625; CHECK-NEXT: frintx z28.d, p0/m, z17.d 1626; CHECK-NEXT: movprfx z30, z15 1627; CHECK-NEXT: frintx z30.d, p0/m, z15.d 1628; CHECK-NEXT: ld1d { z13.d }, p0/z, [x0, #4, mul vl] 1629; CHECK-NEXT: mov z31.d, p6/m, z0.d 1630; CHECK-NEXT: fcmuo p6.d, p0/z, z11.d, z11.d 1631; CHECK-NEXT: sel z11.d, p8, z0.d, z16.d 1632; CHECK-NEXT: mov z9.d, p2/m, z0.d 1633; CHECK-NEXT: fcmuo p2.d, p0/z, z24.d, z24.d 1634; CHECK-NEXT: movprfx z24, z14 1635; CHECK-NEXT: frintx z24.d, p0/m, z14.d 1636; CHECK-NEXT: fcmge p8.d, p0/z, z27.d, z2.d 1637; CHECK-NEXT: ld1d { z10.d }, p0/z, [x0, #6, mul vl] 1638; CHECK-NEXT: ld1d { z12.d }, p0/z, [x0, #5, mul vl] 1639; CHECK-NEXT: mov z26.d, p5/m, #0 // =0x0 1640; CHECK-NEXT: mov z29.d, p3/m, #0 // =0x0 1641; CHECK-NEXT: fcmge p5.d, p0/z, z28.d, z2.d 1642; CHECK-NEXT: movprfx z14, z27 1643; CHECK-NEXT: fcvtzs z14.d, p0/m, z27.d 1644; CHECK-NEXT: fcmge p3.d, p0/z, z30.d, z2.d 1645; CHECK-NEXT: frintx z13.d, p0/m, z13.d 1646; CHECK-NEXT: mov z31.d, p4/m, #0 // =0x0 1647; CHECK-NEXT: fcmge p4.d, p0/z, z24.d, z2.d 1648; CHECK-NEXT: mov z9.d, p6/m, #0 // =0x0 1649; CHECK-NEXT: movprfx z15, z28 1650; CHECK-NEXT: fcvtzs z15.d, p0/m, z28.d 1651; CHECK-NEXT: not p6.b, p0/z, p8.b 1652; CHECK-NEXT: movprfx z16, z30 1653; CHECK-NEXT: fcvtzs z16.d, p0/m, z30.d 1654; CHECK-NEXT: frintx z12.d, p0/m, z12.d 1655; CHECK-NEXT: frintx z10.d, p0/m, z10.d 1656; CHECK-NEXT: movprfx z17, z24 1657; CHECK-NEXT: fcvtzs z17.d, p0/m, z24.d 1658; CHECK-NEXT: movprfx z18, z8 1659; CHECK-NEXT: frintx z18.d, p0/m, z8.d 1660; CHECK-NEXT: not p5.b, p0/z, p5.b 1661; CHECK-NEXT: sel z8.d, p6, z3.d, z14.d 1662; CHECK-NEXT: not p3.b, p0/z, p3.b 1663; CHECK-NEXT: fcmge p6.d, p0/z, z13.d, z2.d 1664; CHECK-NEXT: mov z11.d, p7/m, #0 // =0x0 1665; CHECK-NEXT: not p4.b, p0/z, p4.b 1666; CHECK-NEXT: sel z14.d, p5, z3.d, z15.d 1667; CHECK-NEXT: fcmuo p7.d, p0/z, z5.d, z5.d 1668; CHECK-NEXT: sel z15.d, p3, z3.d, z16.d 1669; CHECK-NEXT: movprfx z16, z13 1670; CHECK-NEXT: fcvtzs z16.d, p0/m, z13.d 1671; CHECK-NEXT: fcmge p5.d, p0/z, z12.d, z2.d 1672; CHECK-NEXT: fcmge p3.d, p0/z, z10.d, z2.d 1673; CHECK-NEXT: sel z5.d, p4, z3.d, z17.d 1674; CHECK-NEXT: fcmge p4.d, p0/z, z18.d, z2.d 1675; CHECK-NEXT: not p6.b, p0/z, p6.b 1676; CHECK-NEXT: movprfx z2, z12 1677; CHECK-NEXT: fcvtzs z2.d, p0/m, z12.d 1678; CHECK-NEXT: movprfx z17, z10 1679; CHECK-NEXT: fcvtzs z17.d, p0/m, z10.d 1680; CHECK-NEXT: st1b { z11.b }, p1, [x8, x16] 1681; CHECK-NEXT: movprfx z11, z18 1682; CHECK-NEXT: fcvtzs z11.d, p0/m, z18.d 1683; CHECK-NEXT: mov z6.d, p2/m, #0 // =0x0 1684; CHECK-NEXT: st1b { z9.b }, p1, [x8, x15] 1685; CHECK-NEXT: sel z9.d, p6, z3.d, z16.d 1686; CHECK-NEXT: fcmuo p6.d, p0/z, z4.d, z4.d 1687; CHECK-NEXT: not p5.b, p0/z, p5.b 1688; CHECK-NEXT: fcmgt p2.d, p0/z, z18.d, z1.d 1689; CHECK-NEXT: mov z7.d, p7/m, #0 // =0x0 1690; CHECK-NEXT: not p3.b, p0/z, p3.b 1691; CHECK-NEXT: st1b { z31.b }, p1, [x8, x14] 1692; CHECK-NEXT: fcmgt p7.d, p0/z, z24.d, z1.d 1693; CHECK-NEXT: not p4.b, p0/z, p4.b 1694; CHECK-NEXT: mov z2.d, p5/m, z3.d 1695; CHECK-NEXT: fcmgt p5.d, p0/z, z28.d, z1.d 1696; CHECK-NEXT: sel z4.d, p3, z3.d, z17.d 1697; CHECK-NEXT: fcmgt p3.d, p0/z, z13.d, z1.d 1698; CHECK-NEXT: mov z25.d, p6/m, #0 // =0x0 1699; CHECK-NEXT: sel z3.d, p4, z3.d, z11.d 1700; CHECK-NEXT: fcmgt p4.d, p0/z, z10.d, z1.d 1701; CHECK-NEXT: fcmgt p6.d, p0/z, z12.d, z1.d 1702; CHECK-NEXT: st1b { z29.b }, p1, [x8, x13] 1703; CHECK-NEXT: st1b { z26.b }, p1, [x8, x12] 1704; CHECK-NEXT: sel z26.d, p5, z0.d, z14.d 1705; CHECK-NEXT: fcmgt p5.d, p0/z, z30.d, z1.d 1706; CHECK-NEXT: sel z29.d, p3, z0.d, z9.d 1707; CHECK-NEXT: fcmuo p3.d, p0/z, z18.d, z18.d 1708; CHECK-NEXT: mov z3.d, p2/m, z0.d 1709; CHECK-NEXT: st1b { z25.b }, p1, [x8, x11] 1710; CHECK-NEXT: fcmuo p2.d, p0/z, z10.d, z10.d 1711; CHECK-NEXT: mov z4.d, p4/m, z0.d 1712; CHECK-NEXT: fcmuo p4.d, p0/z, z12.d, z12.d 1713; CHECK-NEXT: st1b { z7.b }, p1, [x8, x10] 1714; CHECK-NEXT: mov z2.d, p6/m, z0.d 1715; CHECK-NEXT: st1b { z6.b }, p1, [x8, x9] 1716; CHECK-NEXT: fcmuo p1.d, p0/z, z13.d, z13.d 1717; CHECK-NEXT: fcmgt p6.d, p0/z, z27.d, z1.d 1718; CHECK-NEXT: mov z3.d, p3/m, #0 // =0x0 1719; CHECK-NEXT: fcmuo p3.d, p0/z, z24.d, z24.d 1720; CHECK-NEXT: sel z1.d, p7, z0.d, z5.d 1721; CHECK-NEXT: mov z4.d, p2/m, #0 // =0x0 1722; CHECK-NEXT: fcmuo p2.d, p0/z, z30.d, z30.d 1723; CHECK-NEXT: sel z5.d, p5, z0.d, z15.d 1724; CHECK-NEXT: mov z2.d, p4/m, #0 // =0x0 1725; CHECK-NEXT: fcmuo p4.d, p0/z, z28.d, z28.d 1726; CHECK-NEXT: mov z29.d, p1/m, #0 // =0x0 1727; CHECK-NEXT: fcmuo p1.d, p0/z, z27.d, z27.d 1728; CHECK-NEXT: sel z0.d, p6, z0.d, z8.d 1729; CHECK-NEXT: mov z1.d, p3/m, #0 // =0x0 1730; CHECK-NEXT: st1d { z3.d }, p0, [x8, #7, mul vl] 1731; CHECK-NEXT: mov z5.d, p2/m, #0 // =0x0 1732; CHECK-NEXT: st1d { z4.d }, p0, [x8, #6, mul vl] 1733; CHECK-NEXT: mov z26.d, p4/m, #0 // =0x0 1734; CHECK-NEXT: st1d { z2.d }, p0, [x8, #5, mul vl] 1735; CHECK-NEXT: mov z0.d, p1/m, #0 // =0x0 1736; CHECK-NEXT: st1d { z29.d }, p0, [x8, #4, mul vl] 1737; CHECK-NEXT: st1d { z1.d }, p0, [x8, #3, mul vl] 1738; CHECK-NEXT: st1d { z5.d }, p0, [x8, #2, mul vl] 1739; CHECK-NEXT: st1d { z26.d }, p0, [x8, #1, mul vl] 1740; CHECK-NEXT: st1d { z0.d }, p0, [x8] 1741; CHECK-NEXT: ldr z18, [sp, #1, mul vl] // 16-byte Folded Reload 1742; CHECK-NEXT: ldr z17, [sp, #2, mul vl] // 16-byte Folded Reload 1743; CHECK-NEXT: ldr z16, [sp, #3, mul vl] // 16-byte Folded Reload 1744; CHECK-NEXT: ldr z15, [sp, #4, mul vl] // 16-byte Folded Reload 1745; CHECK-NEXT: ldr z14, [sp, #5, mul vl] // 16-byte Folded Reload 1746; CHECK-NEXT: ldr z13, [sp, #6, mul vl] // 16-byte Folded Reload 1747; CHECK-NEXT: ldr z12, [sp, #7, mul vl] // 16-byte Folded Reload 1748; CHECK-NEXT: ldr z11, [sp, #8, mul vl] // 16-byte Folded Reload 1749; CHECK-NEXT: ldr z10, [sp, #9, mul vl] // 16-byte Folded Reload 1750; CHECK-NEXT: ldr z9, [sp, #10, mul vl] // 16-byte Folded Reload 1751; CHECK-NEXT: ldr z8, [sp, #11, mul vl] // 16-byte Folded Reload 1752; CHECK-NEXT: ldr p8, [sp, #3, mul vl] // 2-byte Folded Reload 1753; CHECK-NEXT: ldr p7, [sp, #4, mul vl] // 2-byte Folded Reload 1754; CHECK-NEXT: ldr p6, [sp, #5, mul vl] // 2-byte Folded Reload 1755; CHECK-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Folded Reload 1756; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload 1757; CHECK-NEXT: addvl sp, sp, #12 1758; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload 1759; CHECK-NEXT: ret 1760 %a = call <vscale x 32 x i64> @llvm.llrint.nxv32i64.nxv16f64(<vscale x 32 x double> %x) 1761 ret <vscale x 32 x i64> %a 1762} 1763declare <vscale x 32 x i64> @llvm.llrint.nxv32i64.nxv32f64(<vscale x 32 x double>) 1764