xref: /llvm-project/llvm/test/CodeGen/AArch64/sve-intrinsics-fp-compares.ll (revision 026bb84bcd42b875d77b769eb5ee4c19fc2a9719) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
3
4;
5; FACGE
6;
7
8define <vscale x 8 x i1> @facge_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
9; CHECK-LABEL: facge_h:
10; CHECK:       // %bb.0:
11; CHECK-NEXT:    facge p0.h, p0/z, z0.h, z1.h
12; CHECK-NEXT:    ret
13  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.facge.nxv8f16(<vscale x 8 x i1> %pg,
14                                                                <vscale x 8 x half> %a,
15                                                                <vscale x 8 x half> %b)
16  ret <vscale x 8 x i1> %out
17}
18
19define <vscale x 4 x i1> @facge_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
20; CHECK-LABEL: facge_s:
21; CHECK:       // %bb.0:
22; CHECK-NEXT:    facge p0.s, p0/z, z0.s, z1.s
23; CHECK-NEXT:    ret
24  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.facge.nxv4f32(<vscale x 4 x i1> %pg,
25                                                                <vscale x 4 x float> %a,
26                                                                <vscale x 4 x float> %b)
27  ret <vscale x 4 x i1> %out
28}
29
30define <vscale x 2 x i1> @facge_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {
31; CHECK-LABEL: facge_d:
32; CHECK:       // %bb.0:
33; CHECK-NEXT:    facge p0.d, p0/z, z0.d, z1.d
34; CHECK-NEXT:    ret
35  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.facge.nxv2f64(<vscale x 2 x i1> %pg,
36                                                                <vscale x 2 x double> %a,
37                                                                <vscale x 2 x double> %b)
38  ret <vscale x 2 x i1> %out
39}
40
41;
42; FACGT
43;
44
45define <vscale x 8 x i1> @facgt_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
46; CHECK-LABEL: facgt_h:
47; CHECK:       // %bb.0:
48; CHECK-NEXT:    facgt p0.h, p0/z, z0.h, z1.h
49; CHECK-NEXT:    ret
50  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.facgt.nxv8f16(<vscale x 8 x i1> %pg,
51                                                                <vscale x 8 x half> %a,
52                                                                <vscale x 8 x half> %b)
53  ret <vscale x 8 x i1> %out
54}
55
56define <vscale x 4 x i1> @facgt_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
57; CHECK-LABEL: facgt_s:
58; CHECK:       // %bb.0:
59; CHECK-NEXT:    facgt p0.s, p0/z, z0.s, z1.s
60; CHECK-NEXT:    ret
61  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.facgt.nxv4f32(<vscale x 4 x i1> %pg,
62                                                                <vscale x 4 x float> %a,
63                                                                <vscale x 4 x float> %b)
64  ret <vscale x 4 x i1> %out
65}
66
67define <vscale x 2 x i1> @facgt_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {
68; CHECK-LABEL: facgt_d:
69; CHECK:       // %bb.0:
70; CHECK-NEXT:    facgt p0.d, p0/z, z0.d, z1.d
71; CHECK-NEXT:    ret
72  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.facgt.nxv2f64(<vscale x 2 x i1> %pg,
73                                                                <vscale x 2 x double> %a,
74                                                                <vscale x 2 x double> %b)
75  ret <vscale x 2 x i1> %out
76}
77
78;
79; FCMEQ
80;
81
82define <vscale x 8 x i1> @fcmeq_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
83; CHECK-LABEL: fcmeq_h:
84; CHECK:       // %bb.0:
85; CHECK-NEXT:    fcmeq p0.h, p0/z, z0.h, z1.h
86; CHECK-NEXT:    ret
87  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.fcmpeq.nxv8f16(<vscale x 8 x i1> %pg,
88                                                                 <vscale x 8 x half> %a,
89                                                                 <vscale x 8 x half> %b)
90  ret <vscale x 8 x i1> %out
91}
92
93define <vscale x 4 x i1> @fcmeq_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
94; CHECK-LABEL: fcmeq_s:
95; CHECK:       // %bb.0:
96; CHECK-NEXT:    fcmeq p0.s, p0/z, z0.s, z1.s
97; CHECK-NEXT:    ret
98  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.fcmpeq.nxv4f32(<vscale x 4 x i1> %pg,
99                                                                 <vscale x 4 x float> %a,
100                                                                 <vscale x 4 x float> %b)
101  ret <vscale x 4 x i1> %out
102}
103
104define <vscale x 2 x i1> @fcmeq_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {
105; CHECK-LABEL: fcmeq_d:
106; CHECK:       // %bb.0:
107; CHECK-NEXT:    fcmeq p0.d, p0/z, z0.d, z1.d
108; CHECK-NEXT:    ret
109  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.fcmpeq.nxv2f64(<vscale x 2 x i1> %pg,
110                                                                 <vscale x 2 x double> %a,
111                                                                 <vscale x 2 x double> %b)
112  ret <vscale x 2 x i1> %out
113}
114
115define <vscale x 2 x i1> @fcmeq_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) {
116; CHECK-LABEL: fcmeq_zero:
117; CHECK:       // %bb.0:
118; CHECK-NEXT:    fcmeq p0.d, p0/z, z0.d, #0.0
119; CHECK-NEXT:    ret
120  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.fcmpeq.nxv2f64(<vscale x 2 x i1> %pg,
121                                                                 <vscale x 2 x double> %a,
122                                                                 <vscale x 2 x double> zeroinitializer)
123  ret <vscale x 2 x i1> %out
124}
125
126;
127; FCMGE
128;
129
130define <vscale x 8 x i1> @fcmge_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
131; CHECK-LABEL: fcmge_h:
132; CHECK:       // %bb.0:
133; CHECK-NEXT:    fcmge p0.h, p0/z, z0.h, z1.h
134; CHECK-NEXT:    ret
135  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.fcmpge.nxv8f16(<vscale x 8 x i1> %pg,
136                                                                 <vscale x 8 x half> %a,
137                                                                 <vscale x 8 x half> %b)
138  ret <vscale x 8 x i1> %out
139}
140
141define <vscale x 4 x i1> @fcmge_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
142; CHECK-LABEL: fcmge_s:
143; CHECK:       // %bb.0:
144; CHECK-NEXT:    fcmge p0.s, p0/z, z0.s, z1.s
145; CHECK-NEXT:    ret
146  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.fcmpge.nxv4f32(<vscale x 4 x i1> %pg,
147                                                                 <vscale x 4 x float> %a,
148                                                                 <vscale x 4 x float> %b)
149  ret <vscale x 4 x i1> %out
150}
151
152define <vscale x 2 x i1> @fcmge_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {
153; CHECK-LABEL: fcmge_d:
154; CHECK:       // %bb.0:
155; CHECK-NEXT:    fcmge p0.d, p0/z, z0.d, z1.d
156; CHECK-NEXT:    ret
157  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.fcmpge.nxv2f64(<vscale x 2 x i1> %pg,
158                                                                 <vscale x 2 x double> %a,
159                                                                 <vscale x 2 x double> %b)
160  ret <vscale x 2 x i1> %out
161}
162
163define <vscale x 2 x i1> @fcmge_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) {
164; CHECK-LABEL: fcmge_zero:
165; CHECK:       // %bb.0:
166; CHECK-NEXT:    fcmge p0.d, p0/z, z0.d, #0.0
167; CHECK-NEXT:    ret
168  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.fcmpge.nxv2f64(<vscale x 2 x i1> %pg,
169                                                                 <vscale x 2 x double> %a,
170                                                                 <vscale x 2 x double> zeroinitializer)
171  ret <vscale x 2 x i1> %out
172}
173;
174; FCMGT
175;
176
177define <vscale x 8 x i1> @fcmgt_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
178; CHECK-LABEL: fcmgt_h:
179; CHECK:       // %bb.0:
180; CHECK-NEXT:    fcmgt p0.h, p0/z, z0.h, z1.h
181; CHECK-NEXT:    ret
182  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.fcmpgt.nxv8f16(<vscale x 8 x i1> %pg,
183                                                                 <vscale x 8 x half> %a,
184                                                                 <vscale x 8 x half> %b)
185  ret <vscale x 8 x i1> %out
186}
187
188define <vscale x 4 x i1> @fcmgt_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
189; CHECK-LABEL: fcmgt_s:
190; CHECK:       // %bb.0:
191; CHECK-NEXT:    fcmgt p0.s, p0/z, z0.s, z1.s
192; CHECK-NEXT:    ret
193  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.fcmpgt.nxv4f32(<vscale x 4 x i1> %pg,
194                                                                 <vscale x 4 x float> %a,
195                                                                 <vscale x 4 x float> %b)
196  ret <vscale x 4 x i1> %out
197}
198
199define <vscale x 2 x i1> @fcmgt_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {
200; CHECK-LABEL: fcmgt_d:
201; CHECK:       // %bb.0:
202; CHECK-NEXT:    fcmgt p0.d, p0/z, z0.d, z1.d
203; CHECK-NEXT:    ret
204  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.fcmpgt.nxv2f64(<vscale x 2 x i1> %pg,
205                                                                 <vscale x 2 x double> %a,
206                                                                 <vscale x 2 x double> %b)
207  ret <vscale x 2 x i1> %out
208}
209
210define <vscale x 2 x i1> @fcmgt_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) {
211; CHECK-LABEL: fcmgt_zero:
212; CHECK:       // %bb.0:
213; CHECK-NEXT:    fcmgt p0.d, p0/z, z0.d, #0.0
214; CHECK-NEXT:    ret
215  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.fcmpgt.nxv2f64(<vscale x 2 x i1> %pg,
216                                                                 <vscale x 2 x double> %a,
217                                                                 <vscale x 2 x double> zeroinitializer)
218  ret <vscale x 2 x i1> %out
219}
220;
221; FCMNE
222;
223
224define <vscale x 8 x i1> @fcmne_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
225; CHECK-LABEL: fcmne_h:
226; CHECK:       // %bb.0:
227; CHECK-NEXT:    fcmne p0.h, p0/z, z0.h, z1.h
228; CHECK-NEXT:    ret
229  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.fcmpne.nxv8f16(<vscale x 8 x i1> %pg,
230                                                                 <vscale x 8 x half> %a,
231                                                                 <vscale x 8 x half> %b)
232  ret <vscale x 8 x i1> %out
233}
234
235define <vscale x 4 x i1> @fcmne_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
236; CHECK-LABEL: fcmne_s:
237; CHECK:       // %bb.0:
238; CHECK-NEXT:    fcmne p0.s, p0/z, z0.s, z1.s
239; CHECK-NEXT:    ret
240  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.fcmpne.nxv4f32(<vscale x 4 x i1> %pg,
241                                                                 <vscale x 4 x float> %a,
242                                                                 <vscale x 4 x float> %b)
243  ret <vscale x 4 x i1> %out
244}
245
246define <vscale x 2 x i1> @fcmne_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {
247; CHECK-LABEL: fcmne_d:
248; CHECK:       // %bb.0:
249; CHECK-NEXT:    fcmne p0.d, p0/z, z0.d, z1.d
250; CHECK-NEXT:    ret
251  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.fcmpne.nxv2f64(<vscale x 2 x i1> %pg,
252                                                                 <vscale x 2 x double> %a,
253                                                                 <vscale x 2 x double> %b)
254  ret <vscale x 2 x i1> %out
255}
256
257define <vscale x 2 x i1> @fcmne_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) {
258; CHECK-LABEL: fcmne_zero:
259; CHECK:       // %bb.0:
260; CHECK-NEXT:    fcmne p0.d, p0/z, z0.d, #0.0
261; CHECK-NEXT:    ret
262  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.fcmpne.nxv2f64(<vscale x 2 x i1> %pg,
263                                                                 <vscale x 2 x double> %a,
264                                                                 <vscale x 2 x double> zeroinitializer)
265  ret <vscale x 2 x i1> %out
266}
267
268;
269; FCMPUO
270;
271
272define <vscale x 8 x i1> @fcmuo_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
273; CHECK-LABEL: fcmuo_h:
274; CHECK:       // %bb.0:
275; CHECK-NEXT:    fcmuo p0.h, p0/z, z0.h, z1.h
276; CHECK-NEXT:    ret
277  %out = call <vscale x 8 x i1> @llvm.aarch64.sve.fcmpuo.nxv8f16(<vscale x 8 x i1> %pg,
278                                                                 <vscale x 8 x half> %a,
279                                                                 <vscale x 8 x half> %b)
280  ret <vscale x 8 x i1> %out
281}
282
283define <vscale x 4 x i1> @fcmuo_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {
284; CHECK-LABEL: fcmuo_s:
285; CHECK:       // %bb.0:
286; CHECK-NEXT:    fcmuo p0.s, p0/z, z0.s, z1.s
287; CHECK-NEXT:    ret
288  %out = call <vscale x 4 x i1> @llvm.aarch64.sve.fcmpuo.nxv4f32(<vscale x 4 x i1> %pg,
289                                                                 <vscale x 4 x float> %a,
290                                                                 <vscale x 4 x float> %b)
291  ret <vscale x 4 x i1> %out
292}
293
294define <vscale x 2 x i1> @fcmuo_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {
295; CHECK-LABEL: fcmuo_d:
296; CHECK:       // %bb.0:
297; CHECK-NEXT:    fcmuo p0.d, p0/z, z0.d, z1.d
298; CHECK-NEXT:    ret
299  %out = call <vscale x 2 x i1> @llvm.aarch64.sve.fcmpuo.nxv2f64(<vscale x 2 x i1> %pg,
300                                                                 <vscale x 2 x double> %a,
301                                                                 <vscale x 2 x double> %b)
302  ret <vscale x 2 x i1> %out
303}
304
305declare <vscale x 8 x i1> @llvm.aarch64.sve.facge.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
306declare <vscale x 4 x i1> @llvm.aarch64.sve.facge.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
307declare <vscale x 2 x i1> @llvm.aarch64.sve.facge.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
308
309declare <vscale x 8 x i1> @llvm.aarch64.sve.facgt.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
310declare <vscale x 4 x i1> @llvm.aarch64.sve.facgt.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
311declare <vscale x 2 x i1> @llvm.aarch64.sve.facgt.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
312
313declare <vscale x 8 x i1> @llvm.aarch64.sve.fcmpeq.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
314declare <vscale x 4 x i1> @llvm.aarch64.sve.fcmpeq.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
315declare <vscale x 2 x i1> @llvm.aarch64.sve.fcmpeq.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
316
317declare <vscale x 8 x i1> @llvm.aarch64.sve.fcmpge.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
318declare <vscale x 4 x i1> @llvm.aarch64.sve.fcmpge.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
319declare <vscale x 2 x i1> @llvm.aarch64.sve.fcmpge.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
320
321declare <vscale x 8 x i1> @llvm.aarch64.sve.fcmpgt.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
322declare <vscale x 4 x i1> @llvm.aarch64.sve.fcmpgt.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
323declare <vscale x 2 x i1> @llvm.aarch64.sve.fcmpgt.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
324
325declare <vscale x 8 x i1> @llvm.aarch64.sve.fcmpne.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
326declare <vscale x 4 x i1> @llvm.aarch64.sve.fcmpne.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
327declare <vscale x 2 x i1> @llvm.aarch64.sve.fcmpne.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
328
329declare <vscale x 8 x i1> @llvm.aarch64.sve.fcmpuo.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
330declare <vscale x 4 x i1> @llvm.aarch64.sve.fcmpuo.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)
331declare <vscale x 2 x i1> @llvm.aarch64.sve.fcmpuo.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)
332