1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s 3 4define void @fptrunc2_f64_f32(ptr %dst, ptr %src) { 5; CHECK-LABEL: fptrunc2_f64_f32: 6; CHECK: // %bb.0: // %entry 7; CHECK-NEXT: ptrue p0.d 8; CHECK-NEXT: ld1d { z0.d }, p0/z, [x1] 9; CHECK-NEXT: fcvt z0.s, p0/m, z0.d 10; CHECK-NEXT: st1w { z0.d }, p0, [x0] 11; CHECK-NEXT: ret 12entry: 13 %0 = load <vscale x 2 x double>, ptr %src, align 8 14 %1 = fptrunc <vscale x 2 x double> %0 to <vscale x 2 x float> 15 store <vscale x 2 x float> %1, ptr %dst, align 4 16 ret void 17} 18 19define void @fptrunc2_f64_f16(ptr %dst, ptr %src) { 20; CHECK-LABEL: fptrunc2_f64_f16: 21; CHECK: // %bb.0: // %entry 22; CHECK-NEXT: ptrue p0.d 23; CHECK-NEXT: ld1d { z0.d }, p0/z, [x1] 24; CHECK-NEXT: fcvt z0.h, p0/m, z0.d 25; CHECK-NEXT: st1h { z0.d }, p0, [x0] 26; CHECK-NEXT: ret 27entry: 28 %0 = load <vscale x 2 x double>, ptr %src, align 8 29 %1 = fptrunc <vscale x 2 x double> %0 to <vscale x 2 x half> 30 store <vscale x 2 x half> %1, ptr %dst, align 2 31 ret void 32} 33 34define void @fptrunc4_f32_f16(ptr %dst, ptr %src) { 35; CHECK-LABEL: fptrunc4_f32_f16: 36; CHECK: // %bb.0: // %entry 37; CHECK-NEXT: ptrue p0.s 38; CHECK-NEXT: ld1w { z0.s }, p0/z, [x1] 39; CHECK-NEXT: fcvt z0.h, p0/m, z0.s 40; CHECK-NEXT: st1h { z0.s }, p0, [x0] 41; CHECK-NEXT: ret 42entry: 43 %0 = load <vscale x 4 x float>, ptr %src, align 8 44 %1 = fptrunc <vscale x 4 x float> %0 to <vscale x 4 x half> 45 store <vscale x 4 x half> %1, ptr %dst, align 2 46 ret void 47} 48 49define void @fptrunc2_f32_f16(ptr %dst, ptr %src) { 50; CHECK-LABEL: fptrunc2_f32_f16: 51; CHECK: // %bb.0: // %entry 52; CHECK-NEXT: ptrue p0.d 53; CHECK-NEXT: ld1w { z0.d }, p0/z, [x1] 54; CHECK-NEXT: fcvt z0.h, p0/m, z0.s 55; CHECK-NEXT: st1h { z0.d }, p0, [x0] 56; CHECK-NEXT: ret 57entry: 58 %0 = load <vscale x 2 x float>, ptr %src, align 8 59 %1 = fptrunc <vscale x 2 x float> %0 to <vscale x 2 x half> 60 store <vscale x 2 x half> %1, ptr %dst, align 2 61 ret void 62} 63 64define void @fptrunc8_f64_f16(ptr %dst, ptr %src) { 65; CHECK-LABEL: fptrunc8_f64_f16: 66; CHECK: // %bb.0: // %entry 67; CHECK-NEXT: ptrue p0.d 68; CHECK-NEXT: ld1d { z0.d }, p0/z, [x1, #3, mul vl] 69; CHECK-NEXT: ld1d { z1.d }, p0/z, [x1] 70; CHECK-NEXT: ld1d { z2.d }, p0/z, [x1, #1, mul vl] 71; CHECK-NEXT: ld1d { z3.d }, p0/z, [x1, #2, mul vl] 72; CHECK-NEXT: fcvt z0.h, p0/m, z0.d 73; CHECK-NEXT: fcvt z2.h, p0/m, z2.d 74; CHECK-NEXT: fcvt z1.h, p0/m, z1.d 75; CHECK-NEXT: fcvt z3.h, p0/m, z3.d 76; CHECK-NEXT: ptrue p0.h 77; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s 78; CHECK-NEXT: uzp1 z0.s, z3.s, z0.s 79; CHECK-NEXT: uzp1 z0.h, z1.h, z0.h 80; CHECK-NEXT: st1h { z0.h }, p0, [x0] 81; CHECK-NEXT: ret 82entry: 83 %0 = load <vscale x 8 x double>, ptr %src, align 8 84 %1 = fptrunc <vscale x 8 x double> %0 to <vscale x 8 x half> 85 store <vscale x 8 x half> %1, ptr %dst, align 2 86 ret void 87} 88