xref: /llvm-project/llvm/test/CodeGen/AArch64/sve-fp-combine.ll (revision db158c7c830807caeeb0691739c41f1d522029e9) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s
3
4define <vscale x 8 x half> @fmla_h_sel(<vscale x 8 x i1> %pred, <vscale x 8 x half> %acc, <vscale x 8 x half> %m1, <vscale x 8 x half> %m2) {
5; CHECK-LABEL: fmla_h_sel:
6; CHECK:       // %bb.0:
7; CHECK-NEXT:    fmla z0.h, p0/m, z1.h, z2.h
8; CHECK-NEXT:    ret
9  %mul = fmul contract <vscale x 8 x half> %m1, %m2
10  %add = fadd contract <vscale x 8 x half> %acc, %mul
11  %res = select <vscale x 8 x i1> %pred, <vscale x 8 x half> %add, <vscale x 8 x half> %acc
12  ret <vscale x 8 x half> %res
13}
14
15define <vscale x 4 x half> @fmla_hx4_sel(<vscale x 4 x i1> %pred, <vscale x 4 x half> %acc, <vscale x 4 x half> %m1, <vscale x 4 x half> %m2) {
16; CHECK-LABEL: fmla_hx4_sel:
17; CHECK:       // %bb.0:
18; CHECK-NEXT:    fmla z0.h, p0/m, z1.h, z2.h
19; CHECK-NEXT:    ret
20  %mul = fmul contract <vscale x 4 x half> %m1, %m2
21  %add = fadd contract <vscale x 4 x half> %acc, %mul
22  %res = select <vscale x 4 x i1> %pred, <vscale x 4 x half> %add, <vscale x 4 x half> %acc
23  ret <vscale x 4 x half> %res
24}
25
26define <vscale x 2 x half> @fmla_hx2_sel(<vscale x 2 x i1> %pred, <vscale x 2 x half> %acc, <vscale x 2 x half> %m1, <vscale x 2 x half> %m2) {
27; CHECK-LABEL: fmla_hx2_sel:
28; CHECK:       // %bb.0:
29; CHECK-NEXT:    fmla z0.h, p0/m, z1.h, z2.h
30; CHECK-NEXT:    ret
31  %mul = fmul contract <vscale x 2 x half> %m1, %m2
32  %add = fadd contract <vscale x 2 x half> %acc, %mul
33  %res = select <vscale x 2 x i1> %pred, <vscale x 2 x half> %add, <vscale x 2 x half> %acc
34  ret <vscale x 2 x half> %res
35}
36
37define <vscale x 4 x float> @fmla_s_sel(<vscale x 4 x i1> %pred, <vscale x 4 x float> %acc, <vscale x 4 x float> %m1, <vscale x 4 x float> %m2) {
38; CHECK-LABEL: fmla_s_sel:
39; CHECK:       // %bb.0:
40; CHECK-NEXT:    fmla z0.s, p0/m, z1.s, z2.s
41; CHECK-NEXT:    ret
42  %mul = fmul contract <vscale x 4 x float> %m1, %m2
43  %add = fadd contract <vscale x 4 x float> %acc, %mul
44  %res = select <vscale x 4 x i1> %pred, <vscale x 4 x float> %add, <vscale x 4 x float> %acc
45  ret <vscale x 4 x float> %res
46}
47
48define <vscale x 2 x float> @fmla_sx2_sel(<vscale x 2 x i1> %pred, <vscale x 2 x float> %acc, <vscale x 2 x float> %m1, <vscale x 2 x float> %m2) {
49; CHECK-LABEL: fmla_sx2_sel:
50; CHECK:       // %bb.0:
51; CHECK-NEXT:    fmla z0.s, p0/m, z1.s, z2.s
52; CHECK-NEXT:    ret
53  %mul = fmul contract <vscale x 2 x float> %m1, %m2
54  %add = fadd contract <vscale x 2 x float> %acc, %mul
55  %res = select <vscale x 2 x i1> %pred, <vscale x 2 x float> %add, <vscale x 2 x float> %acc
56  ret <vscale x 2 x float> %res
57}
58
59define <vscale x 2 x double> @fmla_d_sel(<vscale x 2 x i1> %pred, <vscale x 2 x double> %acc, <vscale x 2 x double> %m1, <vscale x 2 x double> %m2) {
60; CHECK-LABEL: fmla_d_sel:
61; CHECK:       // %bb.0:
62; CHECK-NEXT:    fmla z0.d, p0/m, z1.d, z2.d
63; CHECK-NEXT:    ret
64  %mul = fmul contract <vscale x 2 x double> %m1, %m2
65  %add = fadd contract <vscale x 2 x double> %acc, %mul
66  %res = select <vscale x 2 x i1> %pred, <vscale x 2 x double> %add, <vscale x 2 x double> %acc
67  ret <vscale x 2 x double> %res
68}
69
70define <vscale x 8 x half> @fmls_h_sel(<vscale x 8 x i1> %pred, <vscale x 8 x half> %acc, <vscale x 8 x half> %m1, <vscale x 8 x half> %m2) {
71; CHECK-LABEL: fmls_h_sel:
72; CHECK:       // %bb.0:
73; CHECK-NEXT:    fmls z0.h, p0/m, z1.h, z2.h
74; CHECK-NEXT:    ret
75  %mul = fmul contract <vscale x 8 x half> %m1, %m2
76  %sub = fsub contract <vscale x 8 x half> %acc, %mul
77  %res = select <vscale x 8 x i1> %pred, <vscale x 8 x half> %sub, <vscale x 8 x half> %acc
78  ret <vscale x 8 x half> %res
79}
80
81define <vscale x 4 x half> @fmls_hx4_sel(<vscale x 4 x i1> %pred, <vscale x 4 x half> %acc, <vscale x 4 x half> %m1, <vscale x 4 x half> %m2) {
82; CHECK-LABEL: fmls_hx4_sel:
83; CHECK:       // %bb.0:
84; CHECK-NEXT:    fmls z0.h, p0/m, z1.h, z2.h
85; CHECK-NEXT:    ret
86  %mul = fmul contract <vscale x 4 x half> %m1, %m2
87  %sub = fsub contract <vscale x 4 x half> %acc, %mul
88  %res = select <vscale x 4 x i1> %pred, <vscale x 4 x half> %sub, <vscale x 4 x half> %acc
89  ret <vscale x 4 x half> %res
90}
91
92define <vscale x 2 x half> @fmls_hx2_sel(<vscale x 2 x i1> %pred, <vscale x 2 x half> %acc, <vscale x 2 x half> %m1, <vscale x 2 x half> %m2) {
93; CHECK-LABEL: fmls_hx2_sel:
94; CHECK:       // %bb.0:
95; CHECK-NEXT:    fmls z0.h, p0/m, z1.h, z2.h
96; CHECK-NEXT:    ret
97  %mul = fmul contract <vscale x 2 x half> %m1, %m2
98  %sub = fsub contract <vscale x 2 x half> %acc, %mul
99  %res = select <vscale x 2 x i1> %pred, <vscale x 2 x half> %sub, <vscale x 2 x half> %acc
100  ret <vscale x 2 x half> %res
101}
102
103define <vscale x 4 x float> @fmls_s_sel(<vscale x 4 x i1> %pred, <vscale x 4 x float> %acc, <vscale x 4 x float> %m1, <vscale x 4 x float> %m2) {
104; CHECK-LABEL: fmls_s_sel:
105; CHECK:       // %bb.0:
106; CHECK-NEXT:    fmls z0.s, p0/m, z1.s, z2.s
107; CHECK-NEXT:    ret
108  %mul = fmul contract <vscale x 4 x float> %m1, %m2
109  %sub = fsub contract <vscale x 4 x float> %acc, %mul
110  %res = select <vscale x 4 x i1> %pred, <vscale x 4 x float> %sub, <vscale x 4 x float> %acc
111  ret <vscale x 4 x float> %res
112}
113
114define <vscale x 2 x float> @fmls_sx2_sel(<vscale x 2 x i1> %pred, <vscale x 2 x float> %acc, <vscale x 2 x float> %m1, <vscale x 2 x float> %m2) {
115; CHECK-LABEL: fmls_sx2_sel:
116; CHECK:       // %bb.0:
117; CHECK-NEXT:    fmls z0.s, p0/m, z1.s, z2.s
118; CHECK-NEXT:    ret
119  %mul = fmul contract <vscale x 2 x float> %m1, %m2
120  %sub = fsub contract <vscale x 2 x float> %acc, %mul
121  %res = select <vscale x 2 x i1> %pred, <vscale x 2 x float> %sub, <vscale x 2 x float> %acc
122  ret <vscale x 2 x float> %res
123}
124
125define <vscale x 2 x double> @fmls_d_sel(<vscale x 2 x i1> %pred, <vscale x 2 x double> %acc, <vscale x 2 x double> %m1, <vscale x 2 x double> %m2) {
126; CHECK-LABEL: fmls_d_sel:
127; CHECK:       // %bb.0:
128; CHECK-NEXT:    fmls z0.d, p0/m, z1.d, z2.d
129; CHECK-NEXT:    ret
130  %mul = fmul contract <vscale x 2 x double> %m1, %m2
131  %sub = fsub contract <vscale x 2 x double> %acc, %mul
132  %res = select <vscale x 2 x i1> %pred, <vscale x 2 x double> %sub, <vscale x 2 x double> %acc
133  ret <vscale x 2 x double> %res
134}
135
136define <vscale x 8 x half> @fmad_h(<vscale x 8 x half> %m1, <vscale x 8 x half> %m2, <vscale x 8 x half> %acc) {
137; CHECK-LABEL: fmad_h:
138; CHECK:       // %bb.0:
139; CHECK-NEXT:    ptrue p0.h
140; CHECK-NEXT:    fmad z0.h, p0/m, z1.h, z2.h
141; CHECK-NEXT:    ret
142  %mul = fmul contract <vscale x 8 x half> %m1, %m2
143  %res = fadd contract <vscale x 8 x half> %acc, %mul
144  ret <vscale x 8 x half> %res
145}
146
147define <vscale x 4 x half> @fmad_hx4(<vscale x 4 x half> %m1, <vscale x 4 x half> %m2, <vscale x 4 x half> %acc) {
148; CHECK-LABEL: fmad_hx4:
149; CHECK:       // %bb.0:
150; CHECK-NEXT:    ptrue p0.s
151; CHECK-NEXT:    fmad z0.h, p0/m, z1.h, z2.h
152; CHECK-NEXT:    ret
153  %mul = fmul contract <vscale x 4 x half> %m1, %m2
154  %res = fadd contract <vscale x 4 x half> %acc, %mul
155  ret <vscale x 4 x half> %res
156}
157
158define <vscale x 2 x half> @fmad_hx2(<vscale x 2 x half> %m1, <vscale x 2 x half> %m2, <vscale x 2 x half> %acc) {
159; CHECK-LABEL: fmad_hx2:
160; CHECK:       // %bb.0:
161; CHECK-NEXT:    ptrue p0.d
162; CHECK-NEXT:    fmad z0.h, p0/m, z1.h, z2.h
163; CHECK-NEXT:    ret
164  %mul = fmul contract <vscale x 2 x half> %m1, %m2
165  %res = fadd contract <vscale x 2 x half> %acc, %mul
166  ret <vscale x 2 x half> %res
167}
168
169define <vscale x 4 x float> @fmad_s(<vscale x 4 x float> %m1, <vscale x 4 x float> %m2, <vscale x 4 x float> %acc) {
170; CHECK-LABEL: fmad_s:
171; CHECK:       // %bb.0:
172; CHECK-NEXT:    ptrue p0.s
173; CHECK-NEXT:    fmad z0.s, p0/m, z1.s, z2.s
174; CHECK-NEXT:    ret
175  %mul = fmul contract <vscale x 4 x float> %m1, %m2
176  %res = fadd contract <vscale x 4 x float> %acc, %mul
177  ret <vscale x 4 x float> %res
178}
179
180define <vscale x 2 x float> @fmad_sx2(<vscale x 2 x float> %m1, <vscale x 2 x float> %m2, <vscale x 2 x float> %acc) {
181; CHECK-LABEL: fmad_sx2:
182; CHECK:       // %bb.0:
183; CHECK-NEXT:    ptrue p0.d
184; CHECK-NEXT:    fmad z0.s, p0/m, z1.s, z2.s
185; CHECK-NEXT:    ret
186  %mul = fmul contract <vscale x 2 x float> %m1, %m2
187  %res = fadd contract <vscale x 2 x float> %acc, %mul
188  ret <vscale x 2 x float> %res
189}
190
191define <vscale x 2 x double> @fmad_d(<vscale x 2 x double> %m1, <vscale x 2 x double> %m2, <vscale x 2 x double> %acc) {
192; CHECK-LABEL: fmad_d:
193; CHECK:       // %bb.0:
194; CHECK-NEXT:    ptrue p0.d
195; CHECK-NEXT:    fmad z0.d, p0/m, z1.d, z2.d
196; CHECK-NEXT:    ret
197  %mul = fmul contract <vscale x 2 x double> %m1, %m2
198  %res = fadd contract <vscale x 2 x double> %acc, %mul
199  ret <vscale x 2 x double> %res
200}
201
202define <vscale x 8 x half> @fmla_h(<vscale x 8 x half> %acc, <vscale x 8 x half> %m1, <vscale x 8 x half> %m2) {
203; CHECK-LABEL: fmla_h:
204; CHECK:       // %bb.0:
205; CHECK-NEXT:    ptrue p0.h
206; CHECK-NEXT:    fmla z0.h, p0/m, z1.h, z2.h
207; CHECK-NEXT:    ret
208  %mul = fmul contract <vscale x 8 x half> %m1, %m2
209  %res = fadd contract <vscale x 8 x half> %acc, %mul
210  ret <vscale x 8 x half> %res
211}
212
213define <vscale x 4 x half> @fmla_hx4(<vscale x 4 x half> %acc, <vscale x 4 x half> %m1, <vscale x 4 x half> %m2) {
214; CHECK-LABEL: fmla_hx4:
215; CHECK:       // %bb.0:
216; CHECK-NEXT:    ptrue p0.s
217; CHECK-NEXT:    fmla z0.h, p0/m, z1.h, z2.h
218; CHECK-NEXT:    ret
219  %mul = fmul contract <vscale x 4 x half> %m1, %m2
220  %res = fadd contract <vscale x 4 x half> %acc, %mul
221  ret <vscale x 4 x half> %res
222}
223
224define <vscale x 2 x half> @fmla_hx2(<vscale x 2 x half> %acc, <vscale x 2 x half> %m1, <vscale x 2 x half> %m2) {
225; CHECK-LABEL: fmla_hx2:
226; CHECK:       // %bb.0:
227; CHECK-NEXT:    ptrue p0.d
228; CHECK-NEXT:    fmla z0.h, p0/m, z1.h, z2.h
229; CHECK-NEXT:    ret
230  %mul = fmul contract <vscale x 2 x half> %m1, %m2
231  %res = fadd contract <vscale x 2 x half> %acc, %mul
232  ret <vscale x 2 x half> %res
233}
234
235define <vscale x 4 x float> @fmla_s(<vscale x 4 x float> %acc, <vscale x 4 x float> %m1, <vscale x 4 x float> %m2) {
236; CHECK-LABEL: fmla_s:
237; CHECK:       // %bb.0:
238; CHECK-NEXT:    ptrue p0.s
239; CHECK-NEXT:    fmla z0.s, p0/m, z1.s, z2.s
240; CHECK-NEXT:    ret
241  %mul = fmul contract <vscale x 4 x float> %m1, %m2
242  %res = fadd contract <vscale x 4 x float> %acc, %mul
243  ret <vscale x 4 x float> %res
244}
245
246define <vscale x 2 x float> @fmla_sx2(<vscale x 2 x float> %acc, <vscale x 2 x float> %m1, <vscale x 2 x float> %m2) {
247; CHECK-LABEL: fmla_sx2:
248; CHECK:       // %bb.0:
249; CHECK-NEXT:    ptrue p0.d
250; CHECK-NEXT:    fmla z0.s, p0/m, z1.s, z2.s
251; CHECK-NEXT:    ret
252  %mul = fmul contract <vscale x 2 x float> %m1, %m2
253  %res = fadd contract <vscale x 2 x float> %acc, %mul
254  ret <vscale x 2 x float> %res
255}
256
257define <vscale x 2 x double> @fmla_d(<vscale x 2 x double> %acc, <vscale x 2 x double> %m1, <vscale x 2 x double> %m2) {
258; CHECK-LABEL: fmla_d:
259; CHECK:       // %bb.0:
260; CHECK-NEXT:    ptrue p0.d
261; CHECK-NEXT:    fmla z0.d, p0/m, z1.d, z2.d
262; CHECK-NEXT:    ret
263  %mul = fmul contract <vscale x 2 x double> %m1, %m2
264  %res = fadd contract <vscale x 2 x double> %acc, %mul
265  ret <vscale x 2 x double> %res
266}
267
268define <vscale x 8 x half> @fmls_h(<vscale x 8 x half> %acc, <vscale x 8 x half> %m1, <vscale x 8 x half> %m2) {
269; CHECK-LABEL: fmls_h:
270; CHECK:       // %bb.0:
271; CHECK-NEXT:    ptrue p0.h
272; CHECK-NEXT:    fmls z0.h, p0/m, z1.h, z2.h
273; CHECK-NEXT:    ret
274  %mul = fmul contract <vscale x 8 x half> %m1, %m2
275  %res = fsub contract <vscale x 8 x half> %acc, %mul
276  ret <vscale x 8 x half> %res
277}
278
279define <vscale x 4 x half> @fmls_hx4(<vscale x 4 x half> %acc, <vscale x 4 x half> %m1, <vscale x 4 x half> %m2) {
280; CHECK-LABEL: fmls_hx4:
281; CHECK:       // %bb.0:
282; CHECK-NEXT:    ptrue p0.s
283; CHECK-NEXT:    fmls z0.h, p0/m, z1.h, z2.h
284; CHECK-NEXT:    ret
285  %mul = fmul contract <vscale x 4 x half> %m1, %m2
286  %res = fsub contract <vscale x 4 x half> %acc, %mul
287  ret <vscale x 4 x half> %res
288}
289
290define <vscale x 2 x half> @fmls_hx2(<vscale x 2 x half> %acc, <vscale x 2 x half> %m1, <vscale x 2 x half> %m2) {
291; CHECK-LABEL: fmls_hx2:
292; CHECK:       // %bb.0:
293; CHECK-NEXT:    ptrue p0.d
294; CHECK-NEXT:    fmls z0.h, p0/m, z1.h, z2.h
295; CHECK-NEXT:    ret
296  %mul = fmul contract <vscale x 2 x half> %m1, %m2
297  %res = fsub contract <vscale x 2 x half> %acc, %mul
298  ret <vscale x 2 x half> %res
299}
300
301define <vscale x 4 x float> @fmls_s(<vscale x 4 x float> %acc, <vscale x 4 x float> %m1, <vscale x 4 x float> %m2) {
302; CHECK-LABEL: fmls_s:
303; CHECK:       // %bb.0:
304; CHECK-NEXT:    ptrue p0.s
305; CHECK-NEXT:    fmls z0.s, p0/m, z1.s, z2.s
306; CHECK-NEXT:    ret
307  %mul = fmul contract <vscale x 4 x float> %m1, %m2
308  %res = fsub contract <vscale x 4 x float> %acc, %mul
309  ret <vscale x 4 x float> %res
310}
311
312define <vscale x 2 x float> @fmls_sx2(<vscale x 2 x float> %acc, <vscale x 2 x float> %m1, <vscale x 2 x float> %m2) {
313; CHECK-LABEL: fmls_sx2:
314; CHECK:       // %bb.0:
315; CHECK-NEXT:    ptrue p0.d
316; CHECK-NEXT:    fmls z0.s, p0/m, z1.s, z2.s
317; CHECK-NEXT:    ret
318  %mul = fmul contract <vscale x 2 x float> %m1, %m2
319  %res = fsub contract <vscale x 2 x float> %acc, %mul
320  ret <vscale x 2 x float> %res
321}
322
323define <vscale x 2 x double> @fmls_d(<vscale x 2 x double> %acc, <vscale x 2 x double> %m1, <vscale x 2 x double> %m2) {
324; CHECK-LABEL: fmls_d:
325; CHECK:       // %bb.0:
326; CHECK-NEXT:    ptrue p0.d
327; CHECK-NEXT:    fmls z0.d, p0/m, z1.d, z2.d
328; CHECK-NEXT:    ret
329  %mul = fmul contract <vscale x 2 x double> %m1, %m2
330  %res = fsub contract <vscale x 2 x double> %acc, %mul
331  ret <vscale x 2 x double> %res
332}
333
334define <vscale x 8 x half> @fmsb_h(<vscale x 8 x half> %m1, <vscale x 8 x half> %m2, <vscale x 8 x half> %acc) {
335; CHECK-LABEL: fmsb_h:
336; CHECK:       // %bb.0:
337; CHECK-NEXT:    ptrue p0.h
338; CHECK-NEXT:    fmsb z0.h, p0/m, z1.h, z2.h
339; CHECK-NEXT:    ret
340  %mul = fmul contract <vscale x 8 x half> %m1, %m2
341  %res = fsub contract <vscale x 8 x half> %acc, %mul
342  ret <vscale x 8 x half> %res
343}
344
345define <vscale x 4 x half> @fmsb_hx4(<vscale x 4 x half> %m1, <vscale x 4 x half> %m2, <vscale x 4 x half> %acc) {
346; CHECK-LABEL: fmsb_hx4:
347; CHECK:       // %bb.0:
348; CHECK-NEXT:    ptrue p0.s
349; CHECK-NEXT:    fmsb z0.h, p0/m, z1.h, z2.h
350; CHECK-NEXT:    ret
351  %mul = fmul contract <vscale x 4 x half> %m1, %m2
352  %res = fsub contract <vscale x 4 x half> %acc, %mul
353  ret <vscale x 4 x half> %res
354}
355
356define <vscale x 2 x half> @fmsb_hx2(<vscale x 2 x half> %m1, <vscale x 2 x half> %m2, <vscale x 2 x half> %acc) {
357; CHECK-LABEL: fmsb_hx2:
358; CHECK:       // %bb.0:
359; CHECK-NEXT:    ptrue p0.d
360; CHECK-NEXT:    fmsb z0.h, p0/m, z1.h, z2.h
361; CHECK-NEXT:    ret
362  %mul = fmul contract <vscale x 2 x half> %m1, %m2
363  %res = fsub contract <vscale x 2 x half> %acc, %mul
364  ret <vscale x 2 x half> %res
365}
366
367define <vscale x 4 x float> @fmsb_s(<vscale x 4 x float> %m1, <vscale x 4 x float> %m2, <vscale x 4 x float> %acc) {
368; CHECK-LABEL: fmsb_s:
369; CHECK:       // %bb.0:
370; CHECK-NEXT:    ptrue p0.s
371; CHECK-NEXT:    fmsb z0.s, p0/m, z1.s, z2.s
372; CHECK-NEXT:    ret
373  %mul = fmul contract <vscale x 4 x float> %m1, %m2
374  %res = fsub contract <vscale x 4 x float> %acc, %mul
375  ret <vscale x 4 x float> %res
376}
377
378define <vscale x 2 x float> @fmsb_sx2(<vscale x 2 x float> %m1, <vscale x 2 x float> %m2, <vscale x 2 x float> %acc) {
379; CHECK-LABEL: fmsb_sx2:
380; CHECK:       // %bb.0:
381; CHECK-NEXT:    ptrue p0.d
382; CHECK-NEXT:    fmsb z0.s, p0/m, z1.s, z2.s
383; CHECK-NEXT:    ret
384  %mul = fmul contract <vscale x 2 x float> %m1, %m2
385  %res = fsub contract <vscale x 2 x float> %acc, %mul
386  ret <vscale x 2 x float> %res
387}
388
389define <vscale x 2 x double> @fmsb_d(<vscale x 2 x double> %m1, <vscale x 2 x double> %m2, <vscale x 2 x double> %acc) {
390; CHECK-LABEL: fmsb_d:
391; CHECK:       // %bb.0:
392; CHECK-NEXT:    ptrue p0.d
393; CHECK-NEXT:    fmsb z0.d, p0/m, z1.d, z2.d
394; CHECK-NEXT:    ret
395  %mul = fmul contract <vscale x 2 x double> %m1, %m2
396  %res = fsub contract <vscale x 2 x double> %acc, %mul
397  ret <vscale x 2 x double> %res
398}
399
400define <vscale x 8 x half> @fnmad_h(<vscale x 8 x half> %m1, <vscale x 8 x half> %m2, <vscale x 8 x half> %acc) {
401; CHECK-LABEL: fnmad_h:
402; CHECK:       // %bb.0:
403; CHECK-NEXT:    ptrue p0.h
404; CHECK-NEXT:    fnmad z0.h, p0/m, z1.h, z2.h
405; CHECK-NEXT:    ret
406  %neg_m1 = fneg contract <vscale x 8 x half> %m1
407  %mul = fmul contract <vscale x 8 x half> %neg_m1, %m2
408  %res = fsub contract <vscale x 8 x half> %mul, %acc
409  ret <vscale x 8 x half> %res
410}
411
412define <vscale x 4 x half> @fnmad_hx4(<vscale x 4 x half> %m1, <vscale x 4 x half> %m2, <vscale x 4 x half> %acc) {
413; CHECK-LABEL: fnmad_hx4:
414; CHECK:       // %bb.0:
415; CHECK-NEXT:    ptrue p0.s
416; CHECK-NEXT:    fnmad z0.h, p0/m, z1.h, z2.h
417; CHECK-NEXT:    ret
418  %neg_m1 = fneg contract <vscale x 4 x half> %m1
419  %mul = fmul contract <vscale x 4 x half> %neg_m1, %m2
420  %res = fsub contract <vscale x 4 x half> %mul, %acc
421  ret <vscale x 4 x half> %res
422}
423
424define <vscale x 2 x half> @fnmad_hx2(<vscale x 2 x half> %m1, <vscale x 2 x half> %m2, <vscale x 2 x half> %acc) {
425; CHECK-LABEL: fnmad_hx2:
426; CHECK:       // %bb.0:
427; CHECK-NEXT:    ptrue p0.d
428; CHECK-NEXT:    fnmad z0.h, p0/m, z1.h, z2.h
429; CHECK-NEXT:    ret
430  %neg_m1 = fneg contract <vscale x 2 x half> %m1
431  %mul = fmul contract <vscale x 2 x half> %neg_m1, %m2
432  %res = fsub contract <vscale x 2 x half> %mul, %acc
433  ret <vscale x 2 x half> %res
434}
435
436define <vscale x 4 x float> @fnmad_s(<vscale x 4 x float> %m1, <vscale x 4 x float> %m2, <vscale x 4 x float> %acc) {
437; CHECK-LABEL: fnmad_s:
438; CHECK:       // %bb.0:
439; CHECK-NEXT:    ptrue p0.s
440; CHECK-NEXT:    fnmad z0.s, p0/m, z1.s, z2.s
441; CHECK-NEXT:    ret
442  %neg_m1 = fneg contract <vscale x 4 x float> %m1
443  %mul = fmul contract <vscale x 4 x float> %neg_m1, %m2
444  %res = fsub contract <vscale x 4 x float> %mul, %acc
445  ret <vscale x 4 x float> %res
446}
447
448define <vscale x 2 x float> @fnmad_sx2(<vscale x 2 x float> %m1, <vscale x 2 x float> %m2, <vscale x 2 x float> %acc) {
449; CHECK-LABEL: fnmad_sx2:
450; CHECK:       // %bb.0:
451; CHECK-NEXT:    ptrue p0.d
452; CHECK-NEXT:    fnmad z0.s, p0/m, z1.s, z2.s
453; CHECK-NEXT:    ret
454  %neg_m1 = fneg contract <vscale x 2 x float> %m1
455  %mul = fmul contract <vscale x 2 x float> %neg_m1, %m2
456  %res = fsub contract <vscale x 2 x float> %mul, %acc
457  ret <vscale x 2 x float> %res
458}
459
460define <vscale x 2 x double> @fnmad_d(<vscale x 2 x double> %m1, <vscale x 2 x double> %m2, <vscale x 2 x double> %acc) {
461; CHECK-LABEL: fnmad_d:
462; CHECK:       // %bb.0:
463; CHECK-NEXT:    ptrue p0.d
464; CHECK-NEXT:    fnmad z0.d, p0/m, z1.d, z2.d
465; CHECK-NEXT:    ret
466  %neg_m1 = fneg contract <vscale x 2 x double> %m1
467  %mul = fmul contract <vscale x 2 x double> %neg_m1, %m2
468  %res = fsub contract <vscale x 2 x double> %mul, %acc
469  ret <vscale x 2 x double> %res
470}
471
472define <vscale x 8 x half> @fnmla_h(<vscale x 8 x half> %acc, <vscale x 8 x half> %m1, <vscale x 8 x half> %m2) {
473; CHECK-LABEL: fnmla_h:
474; CHECK:       // %bb.0:
475; CHECK-NEXT:    ptrue p0.h
476; CHECK-NEXT:    fnmla z0.h, p0/m, z1.h, z2.h
477; CHECK-NEXT:    ret
478  %neg_m1 = fneg contract <vscale x 8 x half> %m1
479  %mul = fmul contract <vscale x 8 x half> %neg_m1, %m2
480  %res = fsub contract <vscale x 8 x half> %mul, %acc
481  ret <vscale x 8 x half> %res
482}
483
484define <vscale x 4 x half> @fnmla_hx4(<vscale x 4 x half> %acc, <vscale x 4 x half> %m1, <vscale x 4 x half> %m2) {
485; CHECK-LABEL: fnmla_hx4:
486; CHECK:       // %bb.0:
487; CHECK-NEXT:    ptrue p0.s
488; CHECK-NEXT:    fnmla z0.h, p0/m, z1.h, z2.h
489; CHECK-NEXT:    ret
490  %neg_m1 = fneg contract <vscale x 4 x half> %m1
491  %mul = fmul contract <vscale x 4 x half> %neg_m1, %m2
492  %res = fsub contract <vscale x 4 x half> %mul, %acc
493  ret <vscale x 4 x half> %res
494}
495
496define <vscale x 2 x half> @fnmla_hx2(<vscale x 2 x half> %acc, <vscale x 2 x half> %m1, <vscale x 2 x half> %m2) {
497; CHECK-LABEL: fnmla_hx2:
498; CHECK:       // %bb.0:
499; CHECK-NEXT:    ptrue p0.d
500; CHECK-NEXT:    fnmla z0.h, p0/m, z1.h, z2.h
501; CHECK-NEXT:    ret
502  %neg_m1 = fneg contract <vscale x 2 x half> %m1
503  %mul = fmul contract <vscale x 2 x half> %neg_m1, %m2
504  %res = fsub contract <vscale x 2 x half> %mul, %acc
505  ret <vscale x 2 x half> %res
506}
507
508define <vscale x 4 x float> @fnmla_s(<vscale x 4 x float> %acc, <vscale x 4 x float> %m1, <vscale x 4 x float> %m2) {
509; CHECK-LABEL: fnmla_s:
510; CHECK:       // %bb.0:
511; CHECK-NEXT:    ptrue p0.s
512; CHECK-NEXT:    fnmla z0.s, p0/m, z1.s, z2.s
513; CHECK-NEXT:    ret
514  %neg_m1 = fneg contract <vscale x 4 x float> %m1
515  %mul = fmul contract <vscale x 4 x float> %neg_m1, %m2
516  %res = fsub contract <vscale x 4 x float> %mul, %acc
517  ret <vscale x 4 x float> %res
518}
519
520define <vscale x 2 x float> @fnmla_sx2(<vscale x 2 x float> %acc, <vscale x 2 x float> %m1, <vscale x 2 x float> %m2) {
521; CHECK-LABEL: fnmla_sx2:
522; CHECK:       // %bb.0:
523; CHECK-NEXT:    ptrue p0.d
524; CHECK-NEXT:    fnmla z0.s, p0/m, z1.s, z2.s
525; CHECK-NEXT:    ret
526  %neg_m1 = fneg contract <vscale x 2 x float> %m1
527  %mul = fmul contract <vscale x 2 x float> %neg_m1, %m2
528  %res = fsub contract <vscale x 2 x float> %mul, %acc
529  ret <vscale x 2 x float> %res
530}
531
532define <vscale x 2 x double> @fnmla_d(<vscale x 2 x double> %acc, <vscale x 2 x double> %m1, <vscale x 2 x double> %m2) {
533; CHECK-LABEL: fnmla_d:
534; CHECK:       // %bb.0:
535; CHECK-NEXT:    ptrue p0.d
536; CHECK-NEXT:    fnmla z0.d, p0/m, z1.d, z2.d
537; CHECK-NEXT:    ret
538  %neg_m1 = fneg contract <vscale x 2 x double> %m1
539  %mul = fmul contract <vscale x 2 x double> %neg_m1, %m2
540  %res = fsub contract <vscale x 2 x double> %mul, %acc
541  ret <vscale x 2 x double> %res
542}
543
544define <vscale x 8 x half> @fnmla_h_reversed(<vscale x 8 x half> %acc, <vscale x 8 x half> %m1, <vscale x 8 x half> %m2) {
545; CHECK-LABEL: fnmla_h_reversed:
546; CHECK:       // %bb.0:
547; CHECK-NEXT:    ptrue p0.h
548; CHECK-NEXT:    fnmla z0.h, p0/m, z1.h, z2.h
549; CHECK-NEXT:    ret
550  %mul = fmul contract <vscale x 8 x half> %m1, %m2
551  %add = fadd contract <vscale x 8 x half> %mul, %acc
552  %res = fneg contract nsz <vscale x 8 x half> %add
553  ret <vscale x 8 x half> %res
554}
555
556define <vscale x 4 x half> @fnmla_hx4_reversed(<vscale x 4 x half> %acc, <vscale x 4 x half> %m1, <vscale x 4 x half> %m2) {
557; CHECK-LABEL: fnmla_hx4_reversed:
558; CHECK:       // %bb.0:
559; CHECK-NEXT:    ptrue p0.s
560; CHECK-NEXT:    fnmla z0.h, p0/m, z1.h, z2.h
561; CHECK-NEXT:    ret
562  %mul = fmul contract <vscale x 4 x half> %m1, %m2
563  %add = fadd contract <vscale x 4 x half> %mul, %acc
564  %res = fneg contract nsz <vscale x 4 x half> %add
565  ret <vscale x 4 x half> %res
566}
567
568define <vscale x 2 x half> @fnmla_hx2_reversed(<vscale x 2 x half> %acc, <vscale x 2 x half> %m1, <vscale x 2 x half> %m2) {
569; CHECK-LABEL: fnmla_hx2_reversed:
570; CHECK:       // %bb.0:
571; CHECK-NEXT:    ptrue p0.d
572; CHECK-NEXT:    fnmla z0.h, p0/m, z1.h, z2.h
573; CHECK-NEXT:    ret
574  %mul = fmul contract <vscale x 2 x half> %m1, %m2
575  %add = fadd contract <vscale x 2 x half> %mul, %acc
576  %res = fneg contract nsz <vscale x 2 x half> %add
577  ret <vscale x 2 x half> %res
578}
579
580define <vscale x 4 x float> @fnmla_s_reversed(<vscale x 4 x float> %acc, <vscale x 4 x float> %m1, <vscale x 4 x float> %m2) {
581; CHECK-LABEL: fnmla_s_reversed:
582; CHECK:       // %bb.0:
583; CHECK-NEXT:    ptrue p0.s
584; CHECK-NEXT:    fnmla z0.s, p0/m, z1.s, z2.s
585; CHECK-NEXT:    ret
586  %mul = fmul contract <vscale x 4 x float> %m1, %m2
587  %add = fadd contract <vscale x 4 x float> %mul, %acc
588  %res = fneg contract nsz <vscale x 4 x float> %add
589  ret <vscale x 4 x float> %res
590}
591
592define <vscale x 2 x float> @fnmla_sx2_reversed(<vscale x 2 x float> %acc, <vscale x 2 x float> %m1, <vscale x 2 x float> %m2) {
593; CHECK-LABEL: fnmla_sx2_reversed:
594; CHECK:       // %bb.0:
595; CHECK-NEXT:    ptrue p0.d
596; CHECK-NEXT:    fnmla z0.s, p0/m, z1.s, z2.s
597; CHECK-NEXT:    ret
598  %mul = fmul contract <vscale x 2 x float> %m1, %m2
599  %add = fadd contract <vscale x 2 x float> %mul, %acc
600  %res = fneg contract nsz <vscale x 2 x float> %add
601  ret <vscale x 2 x float> %res
602}
603
604define <vscale x 2 x double> @fnmla_d_reversed(<vscale x 2 x double> %acc, <vscale x 2 x double> %m1, <vscale x 2 x double> %m2) {
605; CHECK-LABEL: fnmla_d_reversed:
606; CHECK:       // %bb.0:
607; CHECK-NEXT:    ptrue p0.d
608; CHECK-NEXT:    fnmla z0.d, p0/m, z1.d, z2.d
609; CHECK-NEXT:    ret
610  %mul = fmul contract <vscale x 2 x double> %m1, %m2
611  %add = fadd contract <vscale x 2 x double> %mul, %acc
612  %res = fneg contract nsz <vscale x 2 x double> %add
613  ret <vscale x 2 x double> %res
614}
615
616define <vscale x 8 x half> @signed_zeros_negtest_fnmla_h_reversed(<vscale x 8 x half> %acc, <vscale x 8 x half> %m1, <vscale x 8 x half> %m2) {
617; CHECK-LABEL: signed_zeros_negtest_fnmla_h_reversed:
618; CHECK:       // %bb.0:
619; CHECK-NEXT:    ptrue p0.h
620; CHECK-NEXT:    fmla z0.h, p0/m, z1.h, z2.h
621; CHECK-NEXT:    fneg z0.h, p0/m, z0.h
622; CHECK-NEXT:    ret
623  %mul = fmul contract <vscale x 8 x half> %m1, %m2
624  %add = fadd contract <vscale x 8 x half> %mul, %acc
625  %res = fneg contract <vscale x 8 x half> %add
626  ret <vscale x 8 x half> %res
627}
628
629define <vscale x 4 x half> @signed_zeros_negtest_fnmla_hx4_reversed(<vscale x 4 x half> %acc, <vscale x 4 x half> %m1, <vscale x 4 x half> %m2) {
630; CHECK-LABEL: signed_zeros_negtest_fnmla_hx4_reversed:
631; CHECK:       // %bb.0:
632; CHECK-NEXT:    ptrue p0.s
633; CHECK-NEXT:    fmla z0.h, p0/m, z1.h, z2.h
634; CHECK-NEXT:    fneg z0.h, p0/m, z0.h
635; CHECK-NEXT:    ret
636  %mul = fmul contract <vscale x 4 x half> %m1, %m2
637  %add = fadd contract <vscale x 4 x half> %mul, %acc
638  %res = fneg contract <vscale x 4 x half> %add
639  ret <vscale x 4 x half> %res
640}
641
642define <vscale x 2 x half> @signed_zeros_negtest_fnmla_hx2_reversed(<vscale x 2 x half> %acc, <vscale x 2 x half> %m1, <vscale x 2 x half> %m2) {
643; CHECK-LABEL: signed_zeros_negtest_fnmla_hx2_reversed:
644; CHECK:       // %bb.0:
645; CHECK-NEXT:    ptrue p0.d
646; CHECK-NEXT:    fmla z0.h, p0/m, z1.h, z2.h
647; CHECK-NEXT:    fneg z0.h, p0/m, z0.h
648; CHECK-NEXT:    ret
649  %mul = fmul contract <vscale x 2 x half> %m1, %m2
650  %add = fadd contract <vscale x 2 x half> %mul, %acc
651  %res = fneg contract <vscale x 2 x half> %add
652  ret <vscale x 2 x half> %res
653}
654
655define <vscale x 4 x float> @signed_zeros_negtest_fnmla_s_reversed(<vscale x 4 x float> %acc, <vscale x 4 x float> %m1, <vscale x 4 x float> %m2) {
656; CHECK-LABEL: signed_zeros_negtest_fnmla_s_reversed:
657; CHECK:       // %bb.0:
658; CHECK-NEXT:    ptrue p0.s
659; CHECK-NEXT:    fmla z0.s, p0/m, z1.s, z2.s
660; CHECK-NEXT:    fneg z0.s, p0/m, z0.s
661; CHECK-NEXT:    ret
662  %mul = fmul contract <vscale x 4 x float> %m1, %m2
663  %add = fadd contract <vscale x 4 x float> %mul, %acc
664  %res = fneg contract <vscale x 4 x float> %add
665  ret <vscale x 4 x float> %res
666}
667
668define <vscale x 2 x float> @signed_zeros_negtest_fnmla_sx2_reversed(<vscale x 2 x float> %acc, <vscale x 2 x float> %m1, <vscale x 2 x float> %m2) {
669; CHECK-LABEL: signed_zeros_negtest_fnmla_sx2_reversed:
670; CHECK:       // %bb.0:
671; CHECK-NEXT:    ptrue p0.d
672; CHECK-NEXT:    fmla z0.s, p0/m, z1.s, z2.s
673; CHECK-NEXT:    fneg z0.s, p0/m, z0.s
674; CHECK-NEXT:    ret
675  %mul = fmul contract <vscale x 2 x float> %m1, %m2
676  %add = fadd contract <vscale x 2 x float> %mul, %acc
677  %res = fneg contract <vscale x 2 x float> %add
678  ret <vscale x 2 x float> %res
679}
680
681define <vscale x 2 x double> @signed_zeros_negtest_fnmla_d_reversed(<vscale x 2 x double> %acc, <vscale x 2 x double> %m1, <vscale x 2 x double> %m2) {
682; CHECK-LABEL: signed_zeros_negtest_fnmla_d_reversed:
683; CHECK:       // %bb.0:
684; CHECK-NEXT:    ptrue p0.d
685; CHECK-NEXT:    fmla z0.d, p0/m, z1.d, z2.d
686; CHECK-NEXT:    fneg z0.d, p0/m, z0.d
687; CHECK-NEXT:    ret
688  %mul = fmul contract <vscale x 2 x double> %m1, %m2
689  %add = fadd contract <vscale x 2 x double> %mul, %acc
690  %res = fneg contract <vscale x 2 x double> %add
691  ret <vscale x 2 x double> %res
692}
693
694define <vscale x 8 x half> @fnmls_h(<vscale x 8 x half> %acc, <vscale x 8 x half> %m1, <vscale x 8 x half> %m2) {
695; CHECK-LABEL: fnmls_h:
696; CHECK:       // %bb.0:
697; CHECK-NEXT:    ptrue p0.h
698; CHECK-NEXT:    fnmls z0.h, p0/m, z1.h, z2.h
699; CHECK-NEXT:    ret
700  %mul = fmul contract <vscale x 8 x half> %m1, %m2
701  %res = fsub contract <vscale x 8 x half> %mul, %acc
702  ret <vscale x 8 x half> %res
703}
704
705define <vscale x 4 x half> @fnmls_hx4(<vscale x 4 x half> %acc, <vscale x 4 x half> %m1, <vscale x 4 x half> %m2) {
706; CHECK-LABEL: fnmls_hx4:
707; CHECK:       // %bb.0:
708; CHECK-NEXT:    ptrue p0.s
709; CHECK-NEXT:    fnmls z0.h, p0/m, z1.h, z2.h
710; CHECK-NEXT:    ret
711  %mul = fmul contract <vscale x 4 x half> %m1, %m2
712  %res = fsub contract <vscale x 4 x half> %mul, %acc
713  ret <vscale x 4 x half> %res
714}
715
716define <vscale x 2 x half> @fnmls_hx2(<vscale x 2 x half> %acc, <vscale x 2 x half> %m1, <vscale x 2 x half> %m2) {
717; CHECK-LABEL: fnmls_hx2:
718; CHECK:       // %bb.0:
719; CHECK-NEXT:    ptrue p0.d
720; CHECK-NEXT:    fnmls z0.h, p0/m, z1.h, z2.h
721; CHECK-NEXT:    ret
722  %mul = fmul contract <vscale x 2 x half> %m1, %m2
723  %res = fsub contract <vscale x 2 x half> %mul, %acc
724  ret <vscale x 2 x half> %res
725}
726
727define <vscale x 4 x float> @fnmls_s(<vscale x 4 x float> %acc, <vscale x 4 x float> %m1, <vscale x 4 x float> %m2) {
728; CHECK-LABEL: fnmls_s:
729; CHECK:       // %bb.0:
730; CHECK-NEXT:    ptrue p0.s
731; CHECK-NEXT:    fnmls z0.s, p0/m, z1.s, z2.s
732; CHECK-NEXT:    ret
733  %mul = fmul contract <vscale x 4 x float> %m1, %m2
734  %res = fsub contract <vscale x 4 x float> %mul, %acc
735  ret <vscale x 4 x float> %res
736}
737
738define <vscale x 2 x float> @fnmls_sx2(<vscale x 2 x float> %acc, <vscale x 2 x float> %m1, <vscale x 2 x float> %m2) {
739; CHECK-LABEL: fnmls_sx2:
740; CHECK:       // %bb.0:
741; CHECK-NEXT:    ptrue p0.d
742; CHECK-NEXT:    fnmls z0.s, p0/m, z1.s, z2.s
743; CHECK-NEXT:    ret
744  %mul = fmul contract <vscale x 2 x float> %m1, %m2
745  %res = fsub contract <vscale x 2 x float> %mul, %acc
746  ret <vscale x 2 x float> %res
747}
748
749define <vscale x 2 x double> @fnmls_d(<vscale x 2 x double> %acc, <vscale x 2 x double> %m1, <vscale x 2 x double> %m2) {
750; CHECK-LABEL: fnmls_d:
751; CHECK:       // %bb.0:
752; CHECK-NEXT:    ptrue p0.d
753; CHECK-NEXT:    fnmls z0.d, p0/m, z1.d, z2.d
754; CHECK-NEXT:    ret
755  %mul = fmul contract <vscale x 2 x double> %m1, %m2
756  %res = fsub contract <vscale x 2 x double> %mul, %acc
757  ret <vscale x 2 x double> %res
758}
759
760define <vscale x 8 x half> @fnmsb_h(<vscale x 8 x half> %m1, <vscale x 8 x half> %m2, <vscale x 8 x half> %acc) {
761; CHECK-LABEL: fnmsb_h:
762; CHECK:       // %bb.0:
763; CHECK-NEXT:    ptrue p0.h
764; CHECK-NEXT:    fnmsb z0.h, p0/m, z1.h, z2.h
765; CHECK-NEXT:    ret
766  %mul = fmul contract <vscale x 8 x half> %m1, %m2
767  %res = fsub contract <vscale x 8 x half> %mul, %acc
768  ret <vscale x 8 x half> %res
769}
770
771define <vscale x 4 x half> @fnmsb_hx4(<vscale x 4 x half> %m1, <vscale x 4 x half> %m2, <vscale x 4 x half> %acc) {
772; CHECK-LABEL: fnmsb_hx4:
773; CHECK:       // %bb.0:
774; CHECK-NEXT:    ptrue p0.s
775; CHECK-NEXT:    fnmsb z0.h, p0/m, z1.h, z2.h
776; CHECK-NEXT:    ret
777  %mul = fmul contract <vscale x 4 x half> %m1, %m2
778  %res = fsub contract <vscale x 4 x half> %mul, %acc
779  ret <vscale x 4 x half> %res
780}
781
782define <vscale x 2 x half> @fnmsb_hx2(<vscale x 2 x half> %m1, <vscale x 2 x half> %m2, <vscale x 2 x half> %acc) {
783; CHECK-LABEL: fnmsb_hx2:
784; CHECK:       // %bb.0:
785; CHECK-NEXT:    ptrue p0.d
786; CHECK-NEXT:    fnmsb z0.h, p0/m, z1.h, z2.h
787; CHECK-NEXT:    ret
788  %mul = fmul contract <vscale x 2 x half> %m1, %m2
789  %res = fsub contract <vscale x 2 x half> %mul, %acc
790  ret <vscale x 2 x half> %res
791}
792
793define <vscale x 4 x float> @fnmsb_s(<vscale x 4 x float> %m1, <vscale x 4 x float> %m2, <vscale x 4 x float> %acc) {
794; CHECK-LABEL: fnmsb_s:
795; CHECK:       // %bb.0:
796; CHECK-NEXT:    ptrue p0.s
797; CHECK-NEXT:    fnmsb z0.s, p0/m, z1.s, z2.s
798; CHECK-NEXT:    ret
799  %mul = fmul contract <vscale x 4 x float> %m1, %m2
800  %res = fsub contract <vscale x 4 x float> %mul, %acc
801  ret <vscale x 4 x float> %res
802}
803
804define <vscale x 2 x float> @fnmsb_sx2(<vscale x 2 x float> %m1, <vscale x 2 x float> %m2, <vscale x 2 x float> %acc) {
805; CHECK-LABEL: fnmsb_sx2:
806; CHECK:       // %bb.0:
807; CHECK-NEXT:    ptrue p0.d
808; CHECK-NEXT:    fnmsb z0.s, p0/m, z1.s, z2.s
809; CHECK-NEXT:    ret
810  %mul = fmul contract <vscale x 2 x float> %m1, %m2
811  %res = fsub contract <vscale x 2 x float> %mul, %acc
812  ret <vscale x 2 x float> %res
813}
814
815define <vscale x 2 x double> @fnmsb_d(<vscale x 2 x double> %m1, <vscale x 2 x double> %m2, <vscale x 2 x double> %acc) {
816; CHECK-LABEL: fnmsb_d:
817; CHECK:       // %bb.0:
818; CHECK-NEXT:    ptrue p0.d
819; CHECK-NEXT:    fnmsb z0.d, p0/m, z1.d, z2.d
820; CHECK-NEXT:    ret
821  %mul = fmul contract <vscale x 2 x double> %m1, %m2
822  %res = fsub contract <vscale x 2 x double> %mul, %acc
823  ret <vscale x 2 x double> %res
824}
825
826
827define <vscale x 8 x half> @fadd_h_sel(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x i1> %mask) {
828; CHECK-LABEL: fadd_h_sel:
829; CHECK:       // %bb.0:
830; CHECK-NEXT:    fadd z0.h, p0/m, z0.h, z1.h
831; CHECK-NEXT:    ret
832  %sel = select <vscale x 8 x i1> %mask, <vscale x 8 x half> %b, <vscale x 8 x half> zeroinitializer
833  %fadd = fadd nsz <vscale x 8 x half> %a, %sel
834  ret <vscale x 8 x half> %fadd
835}
836
837define <vscale x 4 x float> @fadd_s_sel(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x i1> %mask) {
838; CHECK-LABEL: fadd_s_sel:
839; CHECK:       // %bb.0:
840; CHECK-NEXT:    fadd z0.s, p0/m, z0.s, z1.s
841; CHECK-NEXT:    ret
842  %sel = select <vscale x 4 x i1> %mask, <vscale x 4 x float> %b, <vscale x 4 x float> zeroinitializer
843  %fadd = fadd nsz <vscale x 4 x float> %a, %sel
844  ret <vscale x 4 x float> %fadd
845}
846
847define <vscale x 2 x double> @fadd_d_sel(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x i1> %mask) {
848; CHECK-LABEL: fadd_d_sel:
849; CHECK:       // %bb.0:
850; CHECK-NEXT:    fadd z0.d, p0/m, z0.d, z1.d
851; CHECK-NEXT:    ret
852  %sel = select <vscale x 2 x i1> %mask, <vscale x 2 x double> %b, <vscale x 2 x double> zeroinitializer
853  %fadd = fadd nsz <vscale x 2 x double> %a, %sel
854  ret <vscale x 2 x double> %fadd
855}
856
857define <vscale x 8 x half> @fsub_h_sel(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x i1> %mask) {
858; CHECK-LABEL: fsub_h_sel:
859; CHECK:       // %bb.0:
860; CHECK-NEXT:    fsub z0.h, p0/m, z0.h, z1.h
861; CHECK-NEXT:    ret
862  %sel = select <vscale x 8 x i1> %mask, <vscale x 8 x half> %b, <vscale x 8 x half> zeroinitializer
863  %fsub = fsub <vscale x 8 x half> %a, %sel
864  ret <vscale x 8 x half> %fsub
865}
866
867define <vscale x 4 x float> @fsub_s_sel(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x i1> %mask) {
868; CHECK-LABEL: fsub_s_sel:
869; CHECK:       // %bb.0:
870; CHECK-NEXT:    fsub z0.s, p0/m, z0.s, z1.s
871; CHECK-NEXT:    ret
872  %sel = select <vscale x 4 x i1> %mask, <vscale x 4 x float> %b, <vscale x 4 x float> zeroinitializer
873  %fsub = fsub <vscale x 4 x float> %a, %sel
874  ret <vscale x 4 x float> %fsub
875}
876
877define <vscale x 2 x double> @fsub_d_sel(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x i1> %mask) {
878; CHECK-LABEL: fsub_d_sel:
879; CHECK:       // %bb.0:
880; CHECK-NEXT:    fsub z0.d, p0/m, z0.d, z1.d
881; CHECK-NEXT:    ret
882  %sel = select <vscale x 2 x i1> %mask, <vscale x 2 x double> %b, <vscale x 2 x double> zeroinitializer
883  %fsub = fsub <vscale x 2 x double> %a, %sel
884  ret <vscale x 2 x double> %fsub
885}
886
887
888
889define <vscale x 8 x half> @fadd_h_sel_negzero(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x i1> %mask) {
890; CHECK-LABEL: fadd_h_sel_negzero:
891; CHECK:       // %bb.0:
892; CHECK-NEXT:    fadd z0.h, p0/m, z0.h, z1.h
893; CHECK-NEXT:    ret
894  %nz = fneg <vscale x 8 x half> zeroinitializer
895  %sel = select <vscale x 8 x i1> %mask, <vscale x 8 x half> %b, <vscale x 8 x half> %nz
896  %fadd = fadd <vscale x 8 x half> %a, %sel
897  ret <vscale x 8 x half> %fadd
898}
899
900define <vscale x 4 x float> @fadd_s_sel_negzero(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x i1> %mask) {
901; CHECK-LABEL: fadd_s_sel_negzero:
902; CHECK:       // %bb.0:
903; CHECK-NEXT:    fadd z0.s, p0/m, z0.s, z1.s
904; CHECK-NEXT:    ret
905  %nz = fneg <vscale x 4 x float> zeroinitializer
906  %sel = select <vscale x 4 x i1> %mask, <vscale x 4 x float> %b, <vscale x 4 x float> %nz
907  %fadd = fadd <vscale x 4 x float> %a, %sel
908  ret <vscale x 4 x float> %fadd
909}
910
911define <vscale x 2 x double> @fadd_d_sel_negzero(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x i1> %mask) {
912; CHECK-LABEL: fadd_d_sel_negzero:
913; CHECK:       // %bb.0:
914; CHECK-NEXT:    fadd z0.d, p0/m, z0.d, z1.d
915; CHECK-NEXT:    ret
916  %nz = fneg <vscale x 2 x double> zeroinitializer
917  %sel = select <vscale x 2 x i1> %mask, <vscale x 2 x double> %b, <vscale x 2 x double> %nz
918  %fadd = fadd <vscale x 2 x double> %a, %sel
919  ret <vscale x 2 x double> %fadd
920}
921
922define <vscale x 8 x half> @fsub_h_sel_negzero(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x i1> %mask) {
923; CHECK-LABEL: fsub_h_sel_negzero:
924; CHECK:       // %bb.0:
925; CHECK-NEXT:    fsub z0.h, p0/m, z0.h, z1.h
926; CHECK-NEXT:    ret
927  %nz = fneg <vscale x 8 x half> zeroinitializer
928  %sel = select <vscale x 8 x i1> %mask, <vscale x 8 x half> %b, <vscale x 8 x half> %nz
929  %fsub = fsub nsz <vscale x 8 x half> %a, %sel
930  ret <vscale x 8 x half> %fsub
931}
932
933define <vscale x 4 x float> @fsub_s_sel_negzero(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x i1> %mask) {
934; CHECK-LABEL: fsub_s_sel_negzero:
935; CHECK:       // %bb.0:
936; CHECK-NEXT:    fsub z0.s, p0/m, z0.s, z1.s
937; CHECK-NEXT:    ret
938  %nz = fneg <vscale x 4 x float> zeroinitializer
939  %sel = select <vscale x 4 x i1> %mask, <vscale x 4 x float> %b, <vscale x 4 x float> %nz
940  %fsub = fsub nsz <vscale x 4 x float> %a, %sel
941  ret <vscale x 4 x float> %fsub
942}
943
944define <vscale x 2 x double> @fsub_d_sel_negzero(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x i1> %mask) {
945; CHECK-LABEL: fsub_d_sel_negzero:
946; CHECK:       // %bb.0:
947; CHECK-NEXT:    fsub z0.d, p0/m, z0.d, z1.d
948; CHECK-NEXT:    ret
949  %nz = fneg <vscale x 2 x double> zeroinitializer
950  %sel = select <vscale x 2 x i1> %mask, <vscale x 2 x double> %b, <vscale x 2 x double> %nz
951  %fsub = fsub nsz <vscale x 2 x double> %a, %sel
952  ret <vscale x 2 x double> %fsub
953}
954
955
956define <vscale x 8 x half> @fadd_sel_fmul_h(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %mask) {
957; CHECK-LABEL: fadd_sel_fmul_h:
958; CHECK:       // %bb.0:
959; CHECK-NEXT:    fmul z1.h, z1.h, z2.h
960; CHECK-NEXT:    mov z2.h, #0 // =0x0
961; CHECK-NEXT:    sel z1.h, p0, z1.h, z2.h
962; CHECK-NEXT:    fadd z0.h, z0.h, z1.h
963; CHECK-NEXT:    ret
964  %fmul = fmul <vscale x 8 x half> %b, %c
965  %sel = select <vscale x 8 x i1> %mask, <vscale x 8 x half> %fmul, <vscale x 8 x half> zeroinitializer
966  %fadd = fadd contract <vscale x 8 x half> %a, %sel
967  ret <vscale x 8 x half> %fadd
968}
969
970define <vscale x 4 x float> @fadd_sel_fmul_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %mask) {
971; CHECK-LABEL: fadd_sel_fmul_s:
972; CHECK:       // %bb.0:
973; CHECK-NEXT:    fmul z1.s, z1.s, z2.s
974; CHECK-NEXT:    mov z2.s, #0 // =0x0
975; CHECK-NEXT:    sel z1.s, p0, z1.s, z2.s
976; CHECK-NEXT:    fadd z0.s, z0.s, z1.s
977; CHECK-NEXT:    ret
978  %fmul = fmul <vscale x 4 x float> %b, %c
979  %sel = select <vscale x 4 x i1> %mask, <vscale x 4 x float> %fmul, <vscale x 4 x float> zeroinitializer
980  %fadd = fadd contract <vscale x 4 x float> %a, %sel
981  ret <vscale x 4 x float> %fadd
982}
983
984define <vscale x 2 x double> @fadd_sel_fmul_d(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %mask) {
985; CHECK-LABEL: fadd_sel_fmul_d:
986; CHECK:       // %bb.0:
987; CHECK-NEXT:    fmul z1.d, z1.d, z2.d
988; CHECK-NEXT:    mov z2.d, #0 // =0x0
989; CHECK-NEXT:    sel z1.d, p0, z1.d, z2.d
990; CHECK-NEXT:    fadd z0.d, z0.d, z1.d
991; CHECK-NEXT:    ret
992  %fmul = fmul <vscale x 2 x double> %b, %c
993  %sel = select <vscale x 2 x i1> %mask, <vscale x 2 x double> %fmul, <vscale x 2 x double> zeroinitializer
994  %fadd = fadd contract <vscale x 2 x double> %a, %sel
995  ret <vscale x 2 x double> %fadd
996}
997
998define <vscale x 8 x half> @fsub_sel_fmul_h(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %mask) {
999; CHECK-LABEL: fsub_sel_fmul_h:
1000; CHECK:       // %bb.0:
1001; CHECK-NEXT:    fmls z0.h, p0/m, z1.h, z2.h
1002; CHECK-NEXT:    ret
1003  %fmul = fmul <vscale x 8 x half> %b, %c
1004  %sel = select <vscale x 8 x i1> %mask, <vscale x 8 x half> %fmul, <vscale x 8 x half> zeroinitializer
1005  %fsub = fsub contract <vscale x 8 x half> %a, %sel
1006  ret <vscale x 8 x half> %fsub
1007}
1008
1009define <vscale x 4 x float> @fsub_sel_fmul_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %mask) {
1010; CHECK-LABEL: fsub_sel_fmul_s:
1011; CHECK:       // %bb.0:
1012; CHECK-NEXT:    fmls z0.s, p0/m, z1.s, z2.s
1013; CHECK-NEXT:    ret
1014  %fmul = fmul <vscale x 4 x float> %b, %c
1015  %sel = select <vscale x 4 x i1> %mask, <vscale x 4 x float> %fmul, <vscale x 4 x float> zeroinitializer
1016  %fsub = fsub contract <vscale x 4 x float> %a, %sel
1017  ret <vscale x 4 x float> %fsub
1018}
1019
1020define <vscale x 2 x double> @fsub_sel_fmul_d(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %mask) {
1021; CHECK-LABEL: fsub_sel_fmul_d:
1022; CHECK:       // %bb.0:
1023; CHECK-NEXT:    fmls z0.d, p0/m, z1.d, z2.d
1024; CHECK-NEXT:    ret
1025  %fmul = fmul <vscale x 2 x double> %b, %c
1026  %sel = select <vscale x 2 x i1> %mask, <vscale x 2 x double> %fmul, <vscale x 2 x double> zeroinitializer
1027  %fsub = fsub contract <vscale x 2 x double> %a, %sel
1028  ret <vscale x 2 x double> %fsub
1029}
1030
1031define <vscale x 8 x half> @fadd_sel_fmul_h_nsz(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %mask) {
1032; CHECK-LABEL: fadd_sel_fmul_h_nsz:
1033; CHECK:       // %bb.0:
1034; CHECK-NEXT:    fmla z0.h, p0/m, z1.h, z2.h
1035; CHECK-NEXT:    ret
1036  %fmul = fmul <vscale x 8 x half> %b, %c
1037  %sel = select <vscale x 8 x i1> %mask, <vscale x 8 x half> %fmul, <vscale x 8 x half> zeroinitializer
1038  %fadd = fadd nsz contract <vscale x 8 x half> %a, %sel
1039  ret <vscale x 8 x half> %fadd
1040}
1041
1042define <vscale x 4 x float> @fadd_sel_fmul_s_nsz(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %mask) {
1043; CHECK-LABEL: fadd_sel_fmul_s_nsz:
1044; CHECK:       // %bb.0:
1045; CHECK-NEXT:    fmla z0.s, p0/m, z1.s, z2.s
1046; CHECK-NEXT:    ret
1047  %fmul = fmul <vscale x 4 x float> %b, %c
1048  %sel = select <vscale x 4 x i1> %mask, <vscale x 4 x float> %fmul, <vscale x 4 x float> zeroinitializer
1049  %fadd = fadd nsz contract <vscale x 4 x float> %a, %sel
1050  ret <vscale x 4 x float> %fadd
1051}
1052
1053define <vscale x 2 x double> @fadd_sel_fmul_d_nsz(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %mask) {
1054; CHECK-LABEL: fadd_sel_fmul_d_nsz:
1055; CHECK:       // %bb.0:
1056; CHECK-NEXT:    fmla z0.d, p0/m, z1.d, z2.d
1057; CHECK-NEXT:    ret
1058  %fmul = fmul <vscale x 2 x double> %b, %c
1059  %sel = select <vscale x 2 x i1> %mask, <vscale x 2 x double> %fmul, <vscale x 2 x double> zeroinitializer
1060  %fadd = fadd nsz contract <vscale x 2 x double> %a, %sel
1061  ret <vscale x 2 x double> %fadd
1062}
1063
1064define <vscale x 8 x half> @fsub_sel_fmul_h_nsz(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %mask) {
1065; CHECK-LABEL: fsub_sel_fmul_h_nsz:
1066; CHECK:       // %bb.0:
1067; CHECK-NEXT:    fmls z0.h, p0/m, z1.h, z2.h
1068; CHECK-NEXT:    ret
1069  %fmul = fmul <vscale x 8 x half> %b, %c
1070  %sel = select <vscale x 8 x i1> %mask, <vscale x 8 x half> %fmul, <vscale x 8 x half> zeroinitializer
1071  %fsub = fsub nsz contract <vscale x 8 x half> %a, %sel
1072  ret <vscale x 8 x half> %fsub
1073}
1074
1075define <vscale x 4 x float> @fsub_sel_fmul_s_nsz(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %mask) {
1076; CHECK-LABEL: fsub_sel_fmul_s_nsz:
1077; CHECK:       // %bb.0:
1078; CHECK-NEXT:    fmls z0.s, p0/m, z1.s, z2.s
1079; CHECK-NEXT:    ret
1080  %fmul = fmul <vscale x 4 x float> %b, %c
1081  %sel = select <vscale x 4 x i1> %mask, <vscale x 4 x float> %fmul, <vscale x 4 x float> zeroinitializer
1082  %fsub = fsub nsz contract <vscale x 4 x float> %a, %sel
1083  ret <vscale x 4 x float> %fsub
1084}
1085
1086define <vscale x 2 x double> @fsub_sel_fmul_d_nsz(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %mask) {
1087; CHECK-LABEL: fsub_sel_fmul_d_nsz:
1088; CHECK:       // %bb.0:
1089; CHECK-NEXT:    fmls z0.d, p0/m, z1.d, z2.d
1090; CHECK-NEXT:    ret
1091  %fmul = fmul <vscale x 2 x double> %b, %c
1092  %sel = select <vscale x 2 x i1> %mask, <vscale x 2 x double> %fmul, <vscale x 2 x double> zeroinitializer
1093  %fsub = fsub nsz contract <vscale x 2 x double> %a, %sel
1094  ret <vscale x 2 x double> %fsub
1095}
1096
1097
1098define <vscale x 8 x half> @fadd_sel_fmul_h_negzero(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %mask) {
1099; CHECK-LABEL: fadd_sel_fmul_h_negzero:
1100; CHECK:       // %bb.0:
1101; CHECK-NEXT:    fmla z0.h, p0/m, z1.h, z2.h
1102; CHECK-NEXT:    ret
1103  %fmul = fmul <vscale x 8 x half> %b, %c
1104  %nz = fneg <vscale x 8 x half> zeroinitializer
1105  %sel = select <vscale x 8 x i1> %mask, <vscale x 8 x half> %fmul, <vscale x 8 x half> %nz
1106  %fadd = fadd contract <vscale x 8 x half> %a, %sel
1107  ret <vscale x 8 x half> %fadd
1108}
1109
1110define <vscale x 4 x float> @fadd_sel_fmul_s_negzero(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %mask) {
1111; CHECK-LABEL: fadd_sel_fmul_s_negzero:
1112; CHECK:       // %bb.0:
1113; CHECK-NEXT:    fmla z0.s, p0/m, z1.s, z2.s
1114; CHECK-NEXT:    ret
1115  %fmul = fmul <vscale x 4 x float> %b, %c
1116  %nz = fneg <vscale x 4 x float> zeroinitializer
1117  %sel = select <vscale x 4 x i1> %mask, <vscale x 4 x float> %fmul, <vscale x 4 x float> %nz
1118  %fadd = fadd contract <vscale x 4 x float> %a, %sel
1119  ret <vscale x 4 x float> %fadd
1120}
1121
1122define <vscale x 2 x double> @fadd_sel_fmul_d_negzero(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %mask) {
1123; CHECK-LABEL: fadd_sel_fmul_d_negzero:
1124; CHECK:       // %bb.0:
1125; CHECK-NEXT:    fmla z0.d, p0/m, z1.d, z2.d
1126; CHECK-NEXT:    ret
1127  %fmul = fmul <vscale x 2 x double> %b, %c
1128  %nz = fneg <vscale x 2 x double> zeroinitializer
1129  %sel = select <vscale x 2 x i1> %mask, <vscale x 2 x double> %fmul, <vscale x 2 x double> %nz
1130  %fadd = fadd contract <vscale x 2 x double> %a, %sel
1131  ret <vscale x 2 x double> %fadd
1132}
1133
1134define <vscale x 8 x half> @fsub_sel_fmul_h_negzero(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %mask) {
1135; CHECK-LABEL: fsub_sel_fmul_h_negzero:
1136; CHECK:       // %bb.0:
1137; CHECK-NEXT:    mov w8, #32768 // =0x8000
1138; CHECK-NEXT:    fmul z1.h, z1.h, z2.h
1139; CHECK-NEXT:    mov z2.h, w8
1140; CHECK-NEXT:    sel z1.h, p0, z1.h, z2.h
1141; CHECK-NEXT:    fsub z0.h, z0.h, z1.h
1142; CHECK-NEXT:    ret
1143  %fmul = fmul <vscale x 8 x half> %b, %c
1144  %nz = fneg <vscale x 8 x half> zeroinitializer
1145  %sel = select <vscale x 8 x i1> %mask, <vscale x 8 x half> %fmul, <vscale x 8 x half> %nz
1146  %fsub = fsub contract <vscale x 8 x half> %a, %sel
1147  ret <vscale x 8 x half> %fsub
1148}
1149
1150define <vscale x 4 x float> @fsub_sel_fmul_s_negzero(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %mask) {
1151; CHECK-LABEL: fsub_sel_fmul_s_negzero:
1152; CHECK:       // %bb.0:
1153; CHECK-NEXT:    mov w8, #-2147483648 // =0x80000000
1154; CHECK-NEXT:    fmul z1.s, z1.s, z2.s
1155; CHECK-NEXT:    mov z2.s, w8
1156; CHECK-NEXT:    sel z1.s, p0, z1.s, z2.s
1157; CHECK-NEXT:    fsub z0.s, z0.s, z1.s
1158; CHECK-NEXT:    ret
1159  %fmul = fmul <vscale x 4 x float> %b, %c
1160  %nz = fneg <vscale x 4 x float> zeroinitializer
1161  %sel = select <vscale x 4 x i1> %mask, <vscale x 4 x float> %fmul, <vscale x 4 x float> %nz
1162  %fsub = fsub contract <vscale x 4 x float> %a, %sel
1163  ret <vscale x 4 x float> %fsub
1164}
1165
1166define <vscale x 2 x double> @fsub_sel_fmul_d_negzero(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %mask) {
1167; CHECK-LABEL: fsub_sel_fmul_d_negzero:
1168; CHECK:       // %bb.0:
1169; CHECK-NEXT:    mov x8, #-9223372036854775808 // =0x8000000000000000
1170; CHECK-NEXT:    fmul z1.d, z1.d, z2.d
1171; CHECK-NEXT:    mov z2.d, x8
1172; CHECK-NEXT:    sel z1.d, p0, z1.d, z2.d
1173; CHECK-NEXT:    fsub z0.d, z0.d, z1.d
1174; CHECK-NEXT:    ret
1175  %fmul = fmul <vscale x 2 x double> %b, %c
1176  %nz = fneg <vscale x 2 x double> zeroinitializer
1177  %sel = select <vscale x 2 x i1> %mask, <vscale x 2 x double> %fmul, <vscale x 2 x double> %nz
1178  %fsub = fsub contract <vscale x 2 x double> %a, %sel
1179  ret <vscale x 2 x double> %fsub
1180}
1181
1182
1183
1184define <vscale x 8 x half> @fadd_sel_fmul_h_negzero_nsz(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %mask) {
1185; CHECK-LABEL: fadd_sel_fmul_h_negzero_nsz:
1186; CHECK:       // %bb.0:
1187; CHECK-NEXT:    fmla z0.h, p0/m, z1.h, z2.h
1188; CHECK-NEXT:    ret
1189  %fmul = fmul <vscale x 8 x half> %b, %c
1190  %nz = fneg <vscale x 8 x half> zeroinitializer
1191  %sel = select <vscale x 8 x i1> %mask, <vscale x 8 x half> %fmul, <vscale x 8 x half> %nz
1192  %fadd = fadd nsz contract <vscale x 8 x half> %a, %sel
1193  ret <vscale x 8 x half> %fadd
1194}
1195
1196define <vscale x 4 x float> @fadd_sel_fmul_s_negzero_nsz(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %mask) {
1197; CHECK-LABEL: fadd_sel_fmul_s_negzero_nsz:
1198; CHECK:       // %bb.0:
1199; CHECK-NEXT:    fmla z0.s, p0/m, z1.s, z2.s
1200; CHECK-NEXT:    ret
1201  %fmul = fmul <vscale x 4 x float> %b, %c
1202  %nz = fneg <vscale x 4 x float> zeroinitializer
1203  %sel = select <vscale x 4 x i1> %mask, <vscale x 4 x float> %fmul, <vscale x 4 x float> %nz
1204  %fadd = fadd nsz contract <vscale x 4 x float> %a, %sel
1205  ret <vscale x 4 x float> %fadd
1206}
1207
1208define <vscale x 2 x double> @fadd_sel_fmul_d_negzero_nsz(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %mask) {
1209; CHECK-LABEL: fadd_sel_fmul_d_negzero_nsz:
1210; CHECK:       // %bb.0:
1211; CHECK-NEXT:    fmla z0.d, p0/m, z1.d, z2.d
1212; CHECK-NEXT:    ret
1213  %fmul = fmul <vscale x 2 x double> %b, %c
1214  %nz = fneg <vscale x 2 x double> zeroinitializer
1215  %sel = select <vscale x 2 x i1> %mask, <vscale x 2 x double> %fmul, <vscale x 2 x double> %nz
1216  %fadd = fadd nsz contract <vscale x 2 x double> %a, %sel
1217  ret <vscale x 2 x double> %fadd
1218}
1219
1220define <vscale x 8 x half> @fsub_sel_fmul_h_negzero_nsz(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c, <vscale x 8 x i1> %mask) {
1221; CHECK-LABEL: fsub_sel_fmul_h_negzero_nsz:
1222; CHECK:       // %bb.0:
1223; CHECK-NEXT:    fmls z0.h, p0/m, z1.h, z2.h
1224; CHECK-NEXT:    ret
1225  %fmul = fmul <vscale x 8 x half> %b, %c
1226  %nz = fneg <vscale x 8 x half> zeroinitializer
1227  %sel = select <vscale x 8 x i1> %mask, <vscale x 8 x half> %fmul, <vscale x 8 x half> %nz
1228  %fsub = fsub nsz contract <vscale x 8 x half> %a, %sel
1229  ret <vscale x 8 x half> %fsub
1230}
1231
1232define <vscale x 4 x float> @fsub_sel_fmul_s_negzero_nsz(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %mask) {
1233; CHECK-LABEL: fsub_sel_fmul_s_negzero_nsz:
1234; CHECK:       // %bb.0:
1235; CHECK-NEXT:    fmls z0.s, p0/m, z1.s, z2.s
1236; CHECK-NEXT:    ret
1237  %fmul = fmul <vscale x 4 x float> %b, %c
1238  %nz = fneg <vscale x 4 x float> zeroinitializer
1239  %sel = select <vscale x 4 x i1> %mask, <vscale x 4 x float> %fmul, <vscale x 4 x float> %nz
1240  %fsub = fsub nsz contract <vscale x 4 x float> %a, %sel
1241  ret <vscale x 4 x float> %fsub
1242}
1243
1244define <vscale x 2 x double> @fsub_sel_fmul_d_negzero_nsz(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c, <vscale x 2 x i1> %mask) {
1245; CHECK-LABEL: fsub_sel_fmul_d_negzero_nsz:
1246; CHECK:       // %bb.0:
1247; CHECK-NEXT:    fmls z0.d, p0/m, z1.d, z2.d
1248; CHECK-NEXT:    ret
1249  %fmul = fmul <vscale x 2 x double> %b, %c
1250  %nz = fneg <vscale x 2 x double> zeroinitializer
1251  %sel = select <vscale x 2 x i1> %mask, <vscale x 2 x double> %fmul, <vscale x 2 x double> %nz
1252  %fsub = fsub nsz contract <vscale x 2 x double> %a, %sel
1253  ret <vscale x 2 x double> %fsub
1254}
1255
1256
1257
1258; Verify combine requires contract fast-math flag.
1259define <vscale x 4 x float> @fadd_sel_fmul_no_contract_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c, <vscale x 4 x i1> %mask) {
1260; CHECK-LABEL: fadd_sel_fmul_no_contract_s:
1261; CHECK:       // %bb.0:
1262; CHECK-NEXT:    fmul z1.s, z1.s, z2.s
1263; CHECK-NEXT:    fadd z0.s, p0/m, z0.s, z1.s
1264; CHECK-NEXT:    ret
1265  %fmul = fmul <vscale x 4 x float> %b, %c
1266  %sel = select <vscale x 4 x i1> %mask, <vscale x 4 x float> %fmul, <vscale x 4 x float> zeroinitializer
1267  %fadd = fadd nsz <vscale x 4 x float> %a, %sel
1268  ret <vscale x 4 x float> %fadd
1269}
1270
1271define <vscale x 8 x half> @fma_sel_h_different_arg_order(<vscale x 8 x i1> %pred, <vscale x 8 x half> %m1, <vscale x 8 x half> %m2, <vscale x 8 x half> %acc) {
1272; CHECK-LABEL: fma_sel_h_different_arg_order:
1273; CHECK:       // %bb.0:
1274; CHECK-NEXT:    fmla z2.h, p0/m, z0.h, z1.h
1275; CHECK-NEXT:    mov z0.d, z2.d
1276; CHECK-NEXT:    ret
1277  %mul.add = call <vscale x 8 x half> @llvm.fma.nxv8f16(<vscale x 8 x half> %m1, <vscale x 8 x half> %m2, <vscale x 8 x half> %acc)
1278  %masked.mul.add = select <vscale x 8 x i1> %pred, <vscale x 8 x half> %mul.add, <vscale x 8 x half> %acc
1279  ret <vscale x 8 x half> %masked.mul.add
1280}
1281
1282define <vscale x 4 x float> @fma_sel_s_different_arg_order(<vscale x 4 x i1> %pred, <vscale x 4 x float> %m1, <vscale x 4 x float> %m2, <vscale x 4 x float> %acc) {
1283; CHECK-LABEL: fma_sel_s_different_arg_order:
1284; CHECK:       // %bb.0:
1285; CHECK-NEXT:    fmla z2.s, p0/m, z0.s, z1.s
1286; CHECK-NEXT:    mov z0.d, z2.d
1287; CHECK-NEXT:    ret
1288  %mul.add = call <vscale x 4 x float> @llvm.fma.nxv4f32(<vscale x 4 x float> %m1, <vscale x 4 x float> %m2, <vscale x 4 x float> %acc)
1289  %masked.mul.add = select <vscale x 4 x i1> %pred, <vscale x 4 x float> %mul.add, <vscale x 4 x float> %acc
1290  ret <vscale x 4 x float> %masked.mul.add
1291}
1292
1293define <vscale x 2 x double> @fma_sel_d_different_arg_order(<vscale x 2 x i1> %pred, <vscale x 2 x double> %m1, <vscale x 2 x double> %m2, <vscale x 2 x double> %acc) {
1294; CHECK-LABEL: fma_sel_d_different_arg_order:
1295; CHECK:       // %bb.0:
1296; CHECK-NEXT:    fmla z2.d, p0/m, z0.d, z1.d
1297; CHECK-NEXT:    mov z0.d, z2.d
1298; CHECK-NEXT:    ret
1299  %mul.add = call <vscale x 2 x double> @llvm.fma.nxv2f64(<vscale x 2 x double> %m1, <vscale x 2 x double> %m2, <vscale x 2 x double> %acc)
1300  %masked.mul.add = select <vscale x 2 x i1> %pred, <vscale x 2 x double> %mul.add, <vscale x 2 x double> %acc
1301  ret <vscale x 2 x double> %masked.mul.add
1302}
1303
1304define <vscale x 8 x half> @fnma_sel_h_different_arg_order(<vscale x 8 x i1> %pred, <vscale x 8 x half> %m1, <vscale x 8 x half> %m2, <vscale x 8 x half> %acc) {
1305; CHECK-LABEL: fnma_sel_h_different_arg_order:
1306; CHECK:       // %bb.0:
1307; CHECK-NEXT:    fmls z2.h, p0/m, z0.h, z1.h
1308; CHECK-NEXT:    mov z0.d, z2.d
1309; CHECK-NEXT:    ret
1310  %neg_m1 = fneg contract <vscale x 8 x half> %m1
1311  %mul.add = call <vscale x 8 x half> @llvm.fma.nxv8f16(<vscale x 8 x half> %neg_m1, <vscale x 8 x half> %m2, <vscale x 8 x half> %acc)
1312  %masked.mul.add = select <vscale x 8 x i1> %pred, <vscale x 8 x half> %mul.add, <vscale x 8 x half> %acc
1313  ret <vscale x 8 x half> %masked.mul.add
1314}
1315
1316define <vscale x 4 x float> @fnma_sel_s_different_arg_order(<vscale x 4 x i1> %pred, <vscale x 4 x float> %m1, <vscale x 4 x float> %m2, <vscale x 4 x float> %acc) {
1317; CHECK-LABEL: fnma_sel_s_different_arg_order:
1318; CHECK:       // %bb.0:
1319; CHECK-NEXT:    fmls z2.s, p0/m, z0.s, z1.s
1320; CHECK-NEXT:    mov z0.d, z2.d
1321; CHECK-NEXT:    ret
1322  %neg_m1 = fneg contract <vscale x 4 x float> %m1
1323  %mul.add = call <vscale x 4 x float> @llvm.fma.nxv4f32(<vscale x 4 x float> %neg_m1, <vscale x 4 x float> %m2, <vscale x 4 x float> %acc)
1324  %masked.mul.add = select <vscale x 4 x i1> %pred, <vscale x 4 x float> %mul.add, <vscale x 4 x float> %acc
1325  ret <vscale x 4 x float> %masked.mul.add
1326}
1327
1328define <vscale x 2 x double> @fnma_sel_d_different_arg_order(<vscale x 2 x i1> %pred, <vscale x 2 x double> %m1, <vscale x 2 x double> %m2, <vscale x 2 x double> %acc) {
1329; CHECK-LABEL: fnma_sel_d_different_arg_order:
1330; CHECK:       // %bb.0:
1331; CHECK-NEXT:    fmls z2.d, p0/m, z0.d, z1.d
1332; CHECK-NEXT:    mov z0.d, z2.d
1333; CHECK-NEXT:    ret
1334  %neg_m1 = fneg contract <vscale x 2 x double> %m1
1335  %mul.add = call <vscale x 2 x double> @llvm.fma.nxv2f64(<vscale x 2 x double> %neg_m1, <vscale x 2 x double> %m2, <vscale x 2 x double> %acc)
1336  %masked.mul.add = select <vscale x 2 x i1> %pred, <vscale x 2 x double> %mul.add, <vscale x 2 x double> %acc
1337  ret <vscale x 2 x double> %masked.mul.add
1338}
1339
1340declare <vscale x 8 x half> @llvm.fma.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>)
1341declare <vscale x 4 x float> @llvm.fma.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>)
1342declare <vscale x 2 x double> @llvm.fma.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>)
1343