1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s | FileCheck %s 3 4target triple = "aarch64-unknown-linux-gnu" 5 6; == Matching first N elements == 7 8define <4 x i1> @reshuffle_v4i1_nxv4i1(<vscale x 4 x i1> %a) #0 { 9; CHECK-LABEL: reshuffle_v4i1_nxv4i1: 10; CHECK: // %bb.0: 11; CHECK-NEXT: mov z1.s, p0/z, #1 // =0x1 12; CHECK-NEXT: mov w8, v1.s[1] 13; CHECK-NEXT: mov v0.16b, v1.16b 14; CHECK-NEXT: mov w9, v1.s[2] 15; CHECK-NEXT: mov v0.h[1], w8 16; CHECK-NEXT: mov w8, v1.s[3] 17; CHECK-NEXT: mov v0.h[2], w9 18; CHECK-NEXT: mov v0.h[3], w8 19; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 20; CHECK-NEXT: ret 21 %el0 = extractelement <vscale x 4 x i1> %a, i32 0 22 %el1 = extractelement <vscale x 4 x i1> %a, i32 1 23 %el2 = extractelement <vscale x 4 x i1> %a, i32 2 24 %el3 = extractelement <vscale x 4 x i1> %a, i32 3 25 %v0 = insertelement <4 x i1> undef, i1 %el0, i32 0 26 %v1 = insertelement <4 x i1> %v0, i1 %el1, i32 1 27 %v2 = insertelement <4 x i1> %v1, i1 %el2, i32 2 28 %v3 = insertelement <4 x i1> %v2, i1 %el3, i32 3 29 ret <4 x i1> %v3 30} 31 32attributes #0 = { "target-features"="+sve" } 33