xref: /llvm-project/llvm/test/CodeGen/AArch64/sve-fixed-length-masked-128bit-loads.ll (revision cc82f1290a1e2157a6c0530d78d8cc84d2b8553d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mattr=+sve < %s | FileCheck %s
3
4
5target triple = "aarch64-unknown-linux-gnu"
6
7;
8; Masked Load
9;
10
11define <16 x i8> @masked_load_v16i8(ptr %src, <16 x i1> %mask) {
12; CHECK-LABEL: masked_load_v16i8:
13; CHECK:       // %bb.0:
14; CHECK-NEXT:    shl v0.16b, v0.16b, #7
15; CHECK-NEXT:    ptrue p0.b, vl16
16; CHECK-NEXT:    cmlt v0.16b, v0.16b, #0
17; CHECK-NEXT:    cmpne p0.b, p0/z, z0.b, #0
18; CHECK-NEXT:    ld1b { z0.b }, p0/z, [x0]
19; CHECK-NEXT:    // kill: def $q0 killed $q0 killed $z0
20; CHECK-NEXT:    ret
21  %load = call <16 x i8> @llvm.masked.load.v16i8(ptr %src, i32 8, <16 x i1> %mask, <16 x i8> zeroinitializer)
22  ret <16 x i8> %load
23}
24
25define <8 x half> @masked_load_v8f16(ptr %src, <8 x i1> %mask) {
26; CHECK-LABEL: masked_load_v8f16:
27; CHECK:       // %bb.0:
28; CHECK-NEXT:    ushll v0.8h, v0.8b, #0
29; CHECK-NEXT:    ptrue p0.h, vl8
30; CHECK-NEXT:    shl v0.8h, v0.8h, #15
31; CHECK-NEXT:    cmlt v0.8h, v0.8h, #0
32; CHECK-NEXT:    cmpne p0.h, p0/z, z0.h, #0
33; CHECK-NEXT:    ld1h { z0.h }, p0/z, [x0]
34; CHECK-NEXT:    // kill: def $q0 killed $q0 killed $z0
35; CHECK-NEXT:    ret
36  %load = call <8 x half> @llvm.masked.load.v8f16(ptr %src, i32 8, <8 x i1> %mask, <8 x half> zeroinitializer)
37  ret <8 x half> %load
38}
39
40define <4 x float> @masked_load_v4f32(ptr %src, <4 x i1> %mask) {
41; CHECK-LABEL: masked_load_v4f32:
42; CHECK:       // %bb.0:
43; CHECK-NEXT:    ushll v0.4s, v0.4h, #0
44; CHECK-NEXT:    ptrue p0.s, vl4
45; CHECK-NEXT:    shl v0.4s, v0.4s, #31
46; CHECK-NEXT:    cmlt v0.4s, v0.4s, #0
47; CHECK-NEXT:    cmpne p0.s, p0/z, z0.s, #0
48; CHECK-NEXT:    ld1w { z0.s }, p0/z, [x0]
49; CHECK-NEXT:    // kill: def $q0 killed $q0 killed $z0
50; CHECK-NEXT:    ret
51  %load = call <4 x float> @llvm.masked.load.v4f32(ptr %src, i32 8, <4 x i1> %mask, <4 x float> zeroinitializer)
52  ret <4 x float> %load
53}
54
55define <2 x double> @masked_load_v2f64(ptr %src, <2 x i1> %mask) {
56; CHECK-LABEL: masked_load_v2f64:
57; CHECK:       // %bb.0:
58; CHECK-NEXT:    ushll v0.2d, v0.2s, #0
59; CHECK-NEXT:    ptrue p0.d, vl2
60; CHECK-NEXT:    shl v0.2d, v0.2d, #63
61; CHECK-NEXT:    cmlt v0.2d, v0.2d, #0
62; CHECK-NEXT:    cmpne p0.d, p0/z, z0.d, #0
63; CHECK-NEXT:    ld1d { z0.d }, p0/z, [x0]
64; CHECK-NEXT:    // kill: def $q0 killed $q0 killed $z0
65; CHECK-NEXT:    ret
66  %load = call <2 x double> @llvm.masked.load.v2f64(ptr %src, i32 8, <2 x i1> %mask, <2 x double> zeroinitializer)
67  ret <2 x double> %load
68}
69
70define <2 x double> @masked_load_passthru_v2f64(ptr %src, <2 x i1> %mask, <2 x double> %passthru) {
71; CHECK-LABEL: masked_load_passthru_v2f64:
72; CHECK:       // %bb.0:
73; CHECK-NEXT:    ushll v0.2d, v0.2s, #0
74; CHECK-NEXT:    ptrue p0.d, vl2
75; CHECK-NEXT:    // kill: def $q1 killed $q1 def $z1
76; CHECK-NEXT:    shl v0.2d, v0.2d, #63
77; CHECK-NEXT:    cmlt v0.2d, v0.2d, #0
78; CHECK-NEXT:    cmpne p0.d, p0/z, z0.d, #0
79; CHECK-NEXT:    ld1d { z0.d }, p0/z, [x0]
80; CHECK-NEXT:    sel z0.d, p0, z0.d, z1.d
81; CHECK-NEXT:    // kill: def $q0 killed $q0 killed $z0
82; CHECK-NEXT:    ret
83  %load = call <2 x double> @llvm.masked.load.v2f64(ptr %src, i32 8, <2 x i1> %mask, <2 x double> %passthru)
84  ret <2 x double> %load
85}
86
87declare <16 x i8> @llvm.masked.load.v16i8(ptr, i32, <16 x i1>, <16 x i8>)
88declare <8 x half> @llvm.masked.load.v8f16(ptr, i32, <8 x i1>, <8 x half>)
89declare <4 x float> @llvm.masked.load.v4f32(ptr, i32, <4 x i1>, <4 x float>)
90declare <2 x double> @llvm.masked.load.v2f64(ptr, i32, <2 x i1>, <2 x double>)
91