xref: /llvm-project/llvm/test/CodeGen/AArch64/sve-fixed-length-fp-convert.ll (revision 0e520300580a77f1d7c01ada9a047a7fadb5eb1f)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s | FileCheck %s
3
4target triple = "aarch64-unknown-linux-gnu"
5
6; Ensure we don't crash when trying to combine fp<->int conversions
7define void @fp_convert_combine_crash(ptr %a, ptr %b) #0 {
8; CHECK-LABEL: fp_convert_combine_crash:
9; CHECK:       // %bb.0:
10; CHECK-NEXT:    ptrue p0.s
11; CHECK-NEXT:    fmov z1.s, #8.00000000
12; CHECK-NEXT:    ld1w { z0.s }, p0/z, [x0]
13; CHECK-NEXT:    fmul z0.s, z0.s, z1.s
14; CHECK-NEXT:    fcvtzs z0.s, p0/m, z0.s
15; CHECK-NEXT:    st1w { z0.s }, p0, [x1]
16; CHECK-NEXT:    ret
17  %f = load <8 x float>, ptr %a
18  %mul.i = fmul <8 x float> %f, <float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00,
19                                 float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00>
20  %vcvt.i = fptosi <8 x float> %mul.i to <8 x i32>
21  store <8 x i32> %vcvt.i, ptr %b
22  ret void
23}
24
25attributes #0 = { vscale_range(2,2) "target-features"="+sve" }
26